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The LS1028A has a clock domain PXLCLK0 used for the Display output
interface in the display core, independent of the system bus frequency,
for flexible clock design. This display core has its own pixel clock.
This patch enable the pixel clock provider on the LS1028A.
Signed-off-by: Wen He <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Lx2160a platform, the i2c input clock is actually platform pll CLK / 16
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Ls1028a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Ls1012a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Ls1088a platform, the i2c input clock is actually platform pll CLK / 8
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Update the nodes to include little-endian
property to be consistent with the hardware.
Signed-off-by: Song Hui <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The Thermal Monitoring Unit (TMU) monitors and reports the
temperature from 2 remote temperature measurement sites
located on ls1028a chip.
Add TMU dts node to enable this feature.
Signed-off-by: Yuantian Tang <[email protected]>
Acked-by: Eduardo Valentin <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of Feb
12, 2019, the base address of the IPMMU-VC0 block on R-Car V3H is
0xfe990000.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Ulrich Hecht <[email protected]>
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* According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
August 24, 2018, the TX clock internal delay mode isn't supported
on R-Car E3 (r8a77990) and D3 (r8a77995).
* TX clock internal delay mode is required for reliable 1Gbps communication
using the KSZ9031RNX phy present on the Ebisu and Draak boards.
Thus, the E3 based Ebisu and D3 based Draak boards can not reliably
use 1Gbps and the speed should be limited to 100Mbps.
Based on work by Kazuya Mizuguchi.
Signed-off-by: Simon Horman <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
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This patch adds support for HDMI audio to the device tree
common to the HiHope RZ/G2M and the HiHope RZ/G2N.
Signed-off-by: Fabrizio Castro <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
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Hook up HSCIF serial devices that are part of the CPG/MSTP Clock Domain
to the SYSC "always-on" PM Domain, for a more consistent
device-power-area description in DT.
Cfr. commit 751e29bbb64ad091 ("ARM: dts: r8a7779: Use SYSC "always-on"
PM Domain").
Fixes: 055d15a88f66b096 ("ARM: dts: r8a7779: Add HSCIF0/1 device nodes")
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Reviewed-by: Ulrich Hecht <[email protected]>
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Add I2C child node for switch watchdog present on CFU1.
Signed-off-by: Andrey Smirnov <[email protected]>
Signed-off-by: Cory Tusar <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: [email protected]
Cc: [email protected]
Tested-by: Chris Healy <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Since commit fe2585e9c29a ("doc: dt: mtd: support partitions in a
special 'partitions' subnode") and commit 5cfdedb7b9a0 ("mtd: ofpart:
move ofpart partitions to a dedicated dt node") the partitioning should
be within a partitions sub-node.
Baseboard device trees following that scheme will get a dtc warning due
to the predefined #address-cells and #size-cells properties:
arch/arm/boot/dts/imx6qdl.dtsi:171.26-189.5: Warning (avoid_unnecessary_addr_size): /soc/gpmi-nand@112000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
I found no upstream imx6 baseboard using the old partitioning scheme, so
we can drop the two properties to avoid such warnings.
Signed-off-by: Marco Felsch <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Replace it to fix the following DTC warnings:
arch/arm/boot/dts/imx6qdl.dtsi:702.19-715.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-1p1: missing or empty reg/ranges property
arch/arm/boot/dts/imx6qdl.dtsi:717.19-730.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-3p0: missing or empty reg/ranges property
arch/arm/boot/dts/imx6qdl.dtsi:732.19-745.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-2p5: missing or empty reg/ranges property
arch/arm/boot/dts/imx6qdl.dtsi:747.32-762.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore: missing or empty reg/ranges property
arch/arm/boot/dts/imx6qdl.dtsi:764.29-779.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu: missing or empty reg/ranges property
arch/arm/boot/dts/imx6qdl.dtsi:781.31-796.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc: missing or empty reg/ranges property
Signed-off-by: Marco Felsch <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the phy-node and mdio bus to the fec-node, represented as is on
hardware.
This commit includes micrel,led-mode that is set to the default
value, prepared for someone who wants to change this.
Signed-off-by: Philippe Schenker <[email protected]>
Acked-by: Marcel Ziswiler <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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- add recovery mode for applicable i2c buses for
Colibri iMX7 module.
Signed-off-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Philippe Schenker <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add sleep pinmux to the fec so it can properly sleep.
Signed-off-by: Philippe Schenker <[email protected]>
Acked-by: Marcel Ziswiler <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Prepare FlexCAN use on SODIMM 55/63 178/188. Those SODIMM pins are
compatible for CAN bus use with several modules from the Colibri
family.
Add Better drivestrength and also add flexcan2.
Signed-off-by: Philippe Schenker <[email protected]>
Acked-by: Marcel Ziswiler <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Force HS200 by masking bit 63 of the SDHCI capability register.
The i.MX ESDHC driver uses SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400. With
that the stack checks bit 63 to descide whether HS400 is available.
Using sdhci-caps-mask allows to mask bit 63. The stack then selects
HS200 as operating mode.
This prevents rare communication errors with minimal effect on
performance:
sdhci-esdhc-imx 30b60000.usdhc: warning! HS400 strobe DLL
status REF not lock!
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Philippe Schenker <[email protected]>
Reviewed-by: Oleksandr Suvorov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Prevent regulators from being switched off.
Signed-off-by: Marcel Ziswiler <[email protected]>
Signed-off-by: Philippe Schenker <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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While not strictly needed as "ethernet-phy-ieee802.3-c22"
is assumed by default if not given explicitly, having
the compatible string here makes it more clear what
this is and which driver handles this - an Ethernet
phy attached to mdio, handled by of_mdio.c
Signed-off-by: André Draszik <[email protected]>
CC: Ilya Ledvich <[email protected]>
CC: Igor Grinberg <[email protected]>
CC: Rob Herring <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Shawn Guo <[email protected]>
CC: Sascha Hauer <[email protected]>
CC: Pengutronix Kernel Team <[email protected]>
CC: Fabio Estevam <[email protected]>
CC: NXP Linux Team <[email protected]>
CC: [email protected]
CC: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Recent changes to the atheros at803x driver caused
ethernet to stop working on this board.
In particular commit 6d4cd041f0af
("net: phy: at803x: disable delay only for RGMII mode")
and commit cd28d1d6e52e
("net: phy: at803x: Disable phy delay for RGMII mode")
fix the AR8031 driver to configure the phy's (RX/TX)
delays as per the 'phy-mode' in the device tree.
This now prevents ethernet from working on this board.
It used to work before those commits, because the
AR8031 comes out of reset with RX delay enabled, and
the at803x driver didn't touch the delay configuration
at all when "rgmii" mode was selected, and because
arch/arm/mach-imx/mach-imx7d.c:ar8031_phy_fixup()
unconditionally enables TX delay.
Since above commits ar8031_phy_fixup() also has no
effect anymore, and the end-result is that all delays
are disabled in the phy, no ethernet.
Update the device tree to restore functionality.
Signed-off-by: André Draszik <[email protected]>
CC: Ilya Ledvich <[email protected]>
CC: Igor Grinberg <[email protected]>
CC: Rob Herring <[email protected]>
CC: Mark Rutland <[email protected]>
CC: Shawn Guo <[email protected]>
CC: Sascha Hauer <[email protected]>
CC: Pengutronix Kernel Team <[email protected]>
CC: Fabio Estevam <[email protected]>
CC: NXP Linux Team <[email protected]>
CC: [email protected]
CC: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Add csi node for i.MX6UL SoC.
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Sébastien Szymanski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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'7d0c76bdf227 ("clk: qcom: Add WCSS gcc clock control for QCS404")'
introduces two new clocks to gcc. These are not used before
clk_disable_unused() and as such the clock framework tries to disable
them.
But on the EVB these registers are only accessible through TrustZone, so
these clocks must be marked as "protected" to prevent the clock code
from touching them.
Numerical values are used as the constants are not yet available in a
common tree.
Reviewed-by: Niklas Cassel <[email protected]>
Reported-by: Mark Brown <[email protected]>
Reported-by: Niklas Cassel <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
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The Mecer Xtreme Mini S6 features a Rockchip RK3229 SoC,
1GB DDR3 RAM, 8GB eMMC, MicroSD port, 10/100Mbps Ethernet,
Realtek 8723BS WLAN module, 2 x USB 2.0 ports, HDMI output,
and S/PDIF output.
Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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P710 is a RK3399 based SBC, designed by Leez [0].
Specification
- Rockchip RK3399
- 4/2GB LPDDR4
- TF sd scard slot
- eMMC
- M.2 B-Key for 4G LTE
- AP6256 for WiFi + BT
- Gigabit ethernet
- HDMI out
- 40 pin header
- USB 2.0 x 2
- USB 3.0 x 1
- USB 3.0 Type-C x 1
- TYPE-C Power supply
[0]https://leez.lenovo.com
Signed-off-by: Andy Yan <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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The rockpro64 contains a nor-flash chip connected to spi1.
Signed-off-by: Andrius Štikonas <[email protected]>
[a number of cleanups]
Signed-off-by: Heiko Stuebner <[email protected]>
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This reverts commit 1f45e8c6d0161f044d679f242fe7514e2625af4a.
This 100 ms mystery delay is not on downstream kernels and no longer
seems needed on upstream kernels either [1]. Presumably something in the
meantime has made things better. A few possibilities for patches that
have landed in the meantime that could have made this better are
commit 3157694d8c7f ("pwm-backlight: Add support for PWM delays
proprieties."), commit 5fb5caee92ba ("pwm-backlight: Enable/disable
the PWM before/after LCD enable toggle."), and commit 6d5922dd0d60
("ARM: dts: rockchip: set PWM delay backlight settings for Veyron")
Let's revert and get our 100 ms back.
[1] https://lkml.kernel.org/r/2226970.BAPq4liE1j@diego
Signed-off-by: Douglas Anderson <[email protected]>
[rebased on top of the recent veyron display cleanup]
Signed-off-by: Heiko Stuebner <[email protected]>
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This pull request prepares the BCM2835 DTS files for the introduction
of the new SoC BCM2711.
Signed-off-by: Florian Fainelli <[email protected]>
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There might be headless setups of the Compute Module without HDMI,
so better enable HDMI at board level. Btw this allows moving HDMI
base definition into upcoming bcm2835-common.dtsi.
Signed-off-by: Stefan Wahren <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv7 Vexpress DTS updates for v5.4
Couple of updates adding missing: SPDX GPL-2.0 license identifier
and newline at the end of the file
* tag 'vexpress-dt-updates-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: Add missing newline at end of file
ARM: dts: vexpress: add missing SPDX GPL-2.0 license identifier
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno/FVP update for v5.4
Single patch removing optional 'max-memory-bandwidth' property for CLCD
that enables to allocate and use 32bpp buffers(used on FVP for Android
development)
* tag 'juno-update-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: fast models: Remove clcd's max-memory-bandwidth
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM64 DT updates for v5.4
- CAN, BT, and WLAN support for the HiHope RZ/G2[MN] boards,
- Sound support for RZ/G2M,
- Sort nodes in various SoC and board DTSes,
- Small fixes and improvements.
* tag 'renesas-arm64-dt-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (23 commits)
arm64: dts: renesas: ulcb: Sort nodes
arm64: dts: renesas: ulcb-kf: Sort nodes
arm64: dts: renesas: salvator-common: Sort nodes
arm64: dts: renesas: r8a7796: salvator-xs: Sort nodes
arm64: dts: renesas: r8a7796: salvator-x: Sort nodes
arm64: dts: renesas: r8a7795: salvator-xs: Sort nodes
arm64: dts: renesas: r8a7795: salvator-x: Sort nodes
arm64: dts: renesas: r8a7795-es1: salvator-x: Sort nodes
arm64: dts: renesas: r8a77965: Sort nodes
arm64: dts: renesas: r8a7795-es1: Sort nodes
arm64: dts: renesas: r8a7795: Sort nodes
arm64: dts: renesas: r8a774a1: Add SSIU support for sound
arm64: dts: renesas: r8a774a1: Use extended audio dmac registers
arm64: dts: renesas: hihope-common: Add WLAN support
arm64: dts: renesas: hihope-common: Add BT support
arm64: dts: renesas: hihope-common: Add PCA9654 I/O expander
arm64: dts: renesas: hihope-rzg2-ex: Enable CAN interfaces
arm64: dts: renesas: r8a774a1: Add CANFD support
arm64: dts: renesas: r8a774a1: Add missing assigned-clocks for CAN[01]
arm64: dts: renesas: r8a774c0: Add missing assigned-clocks for CAN[01]
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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The Mihawk BMC is an ASPEED ast2500 based BMC that is part of an
OpenPower Power9 server.
Signed-off-by: Ben Pai <[email protected]>
Reviewed-by: Andrew Jeffery <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
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There are two PSU on i2c11. PSU0's address is 0x58, PSU1's address is
`0x59`, not `0x5a`.
Signed-off-by: John Wang <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
DTS updates for the Gemini platform:
- Fix up some pin config confusion
- Use redboot partition parsing on the SL93512r
- Mount root on mtdblock3 by default
* tag 'gemini-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: gemini: Mount root from mtdblock3
ARM: dts: gemini: Switch to redboot partition parsing
ARM: dts: gemini: Fix up confused pin settings
Link: https://lore.kernel.org/r/CACRpkdarsQNfXgXMQKfYwOyiqhKY67gKd3ufQ+wexwO3v=LE5w@mail.gmail.com
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.4, round 1
Highlights:
----------
MPU part:
-Add FMC2 NAND controller support on stm32mp157c-ev1.
-Add M4 remoteproc support:
-Add support in stm32mp157c.dtsi.
-Declare copro reserved memories region on stm32mp157 EV1 and DK1
boards.
-Enable M4 copro support on stm32mp157 EV1 and DK1.
-Add booster for ADC on stm32mp157c.
-Add audio codec support on stm32mp157 DK1.
MCU part:
-Remove fixed regulator unit address on stm32429i-eval used by ADC.
-Add missing vdd-supply required by ADC on stm32429i-eval and
stm32h743i-eval.
-Add pwm cells on f746 and f429.
* tag 'stm32-dt-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (21 commits)
ARM: dts: stm32: remove useless pinctrl entries in stm32mp157-pinctrl
ARM: dts: stm32: add phy-dsi-supply property on stm32mp157c-ev1
ARM: dts: stm32: add audio codec support on stm32mp157a-dk1 board
ARM: dts: stm32: add syscfg to ADC on stm32mp157c
ARM: dts: stm32: add pwm cells to stm32f746
ARM: dts: stm32: add pwm cells to stm32f429
ARM: dts: stm32: add pwm cells to stm32mp157c
ARM: dts: stm32: fix -Wall W=1 compilation in stm32mp157 pinctrl for mcan
ARM: dts: stm32: add booster for ADC analog switches on stm32mp157c
ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1
ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1
ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1
ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1
ARM: dts: stm32: add m4 remoteproc support on STM32MP157c
ARM: dts: stm32: add missing vdda-supply to adc on stm32h743i-eval
ARM: dts: stm32: add missing vdda-supply to adc on stm32429i-eval
ARM: dts: stm32: remove fixed regulator unit address on stm32429i-eval
ARM: dts: stm32: enable FMC2 NAND controller on stm32mp157c-ev1
ARM: dts: stm32: add FMC2 NAND controller pins muxing on stm32mp157c-ev1
ARM: dts: stm32: add FMC2 NAND controller support on stm32mp157c
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.4
- RZ/G2 updates for the R-Car CAN and CANFD DT bindings.
* tag 'renesas-dt-bindings-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: can: rcar_can: Complete documentation for RZ/G2[EM]
dt-bindings: can: rcar_canfd: document r8a774a1 support
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
This are some DTS changes for the Ux500 for the v5.4 kernel cycle:
- Update the CoreSight blocks to use the latest and greatest
bindings
- Push the thermal driver config down to the main SoC DTSI
as it applies to all ASICs.
- Set a pull-up on the ST UIB right.
* tag 'ux500-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500: set pull-up on STUIB STMPE IRQ line
ARM: dts: ux500: Fix up the thermal nodes
ARM: dts: ste: Update coresight DT bindings
Link: https://lore.kernel.org/r/CACRpkdbKX7a15SC-zwxmH_ygGzOKrn0h-pzzm22UpRcLRfRVNA@mail.gmail.com
Signed-off-by: Arnd Bergmann <[email protected]>
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The DRM subsystem graphics drivers require more granular
definition of the connection between display drivers and
panels, and a proper panel compatible. This utilizes the
bindings merged to the DRM subsystem to properly define
the display on the NSPIRE devices.
We also do away with the undocumented DT binding
"lcd-type".
We add both the clocks to the CLCD block so the driver
have full control over its clocking.
Link: https://lore.kernel.org/r/[email protected]
Cc: Daniel Tang <[email protected]>
Cc: Fabian Vogt <[email protected]>
Tested-by: Fabian Vogt <[email protected]>
Acked-by: Sam Ravnborg <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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Now that the SPI GPIO driver knows how to handle these
chip select GPIOs and we get nasty messages about the
core having to enforce active low on the GPIO, fix this
up by actually requesting the CS GPIO line as active
low.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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This makes use of the am335x-osd335x-common.dtsi file that contains the
common device tree components for Octavo Systems AM335x System-in-
Package that is used on the BeagleBone Blue.
This has two minor side-effects:
1. pinmux_i2c0_pins is renamed to pinmux-i2c0-pins
2. the 1000MHz cpufreq operating point is enabled
Cc: Robert Nelson <[email protected]>
Signed-off-by: David Lechner <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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This allows to remove the console= entry in the kernel command line.
Signed-off-by: H. Nikolaus Schaller <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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This property was never supported upstream. Get rid of it.
Signed-off-by: Ezequiel Garcia <[email protected]>
Acked-by: Sebastian Reichel <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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This property was never supported upstream. Get rid of it.
Signed-off-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add prefix for Acme Systems srl
https://www.acmesystems.it
Signed-off-by: Uwe Kleine-König <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Ludovic Desroches <[email protected]>
Signed-off-by: Alexandre Belloni <[email protected]>
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Now with the varity of several RPi boards, the memory should be defined
at board level. This step gives us the chance to fix the memory size
of the RPi 1 B+, Zero (incl. W) and Compute Module 1.
Signed-off-by: Stefan Wahren <[email protected]>
Acked-by: Eric Anholt <[email protected]>
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Starting with RPi 4 this is the first board, which doesn't use sdhost
as default SD interface. So the MMC interfaces should be defined finally at
board level. Since all boards using sdhci already does this, we can drop the
pinctrl part from bcm2835-rpi.dtsi.
Signed-off-by: Stefan Wahren <[email protected]>
Acked-by: Eric Anholt <[email protected]>
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Odroid-C1 uses the MAC address stored in eFuse at offset 0x1b4 (which is
defined as a "standard" offset for all Meson8 and Meson8b boards, but
testing shows that MXQ doesn't have the eFuse values programmed and
EC-100 stores it's MAC address in eMMC).
Add the nvmem cell which points to the MAC address and asssign it to the
Ethernet controller as "mac-address".
As result of this the MAC address which is stored in the eFuse is now
assigned to the Ethernet controller and consistent across reboots.
Signed-off-by: Martin Blumenstingl <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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Enable DVFS for the Odroid-N2 by setting the clock, OPP and supply
for each cores of each CPU clusters.
The first cluster uses the "VDDCPU_B" power supply, and the second
cluster uses the "VDDCPU_A" power supply.
Each power supply can achieve 0.73V to 1.01V using 2 distinct PWM
outputs clocked at 800KHz with an inverse duty-cycle.
DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations of each cluster and
checking the final frequency using the clock-measurer, script at [2].
[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
Reviewed-by: Martin Blumenstingl <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Kevin Hilman <[email protected]>
Tested-by: Kevin Hilman <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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