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add ls1088a gpio specify compatible.
Signed-off-by: Song Hui <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add basic dts support for i.MX8MQ NITROGEN8M.
Signed-off-by: Gary Bisson <[email protected]>
Signed-off-by: Troy Kisky <[email protected]>
[Dafna: porting vendor's code to mainline]
Signed-off-by: Dafna Hirschfeld <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The Nitrogen8M is an ARM based single board computer (SBC)
designed to leverage the full capabilities of NXP’s i.MX8M
Quad processor.
Signed-off-by: Gary Bisson <[email protected]>
Signed-off-by: Troy Kisky <[email protected]>
[Dafna: porting vendor's code to mainline]
Signed-off-by: Dafna Hirschfeld <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This patch adds the spi-flash nodes under the DSPI controller for
ls1088a-qds boards.
Signed-off-by: Chuanhua Han <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This patch adds the DSPI controller node for ls1088a boards.
Signed-off-by: Chuanhua Han <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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new compatible string: "fsl,ls1088a-dspi".
Signed-off-by: Chuanhua Han <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The rtc8564 is made by Epson but is similar to the NXP pcf8563. Use the
correct vendor name.
Signed-off-by: Alexandre Belloni <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add binding documentation of mediatek,sysirq for mt6779 SoC.
Signed-off-by: Mars Cheng <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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Add documentation for mt6779 uart dt-bindings
Signed-off-by: Mars Cheng <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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Update binding document for mt6779 reference board
Signed-off-by: Mars Cheng <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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Document SoC specific bindings for R-Car RZ/G1C(r8a77470) SoC.
Signed-off-by: Cao Van Dong <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
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Adds compatible strings for the R-Car CAN FD controller in the D3 SoC.
Signed-off-by: Ulrich Hecht <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
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Adds compatible strings for the R-Car CAN controller in the D3 SoC.
Signed-off-by: Ulrich Hecht <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Reviewed-by: Wolfram Sang <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
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Document the support for rcar_can on R8A77990 SoC devices.
Add R8A77990 to the list of SoCs which require the "assigned-clocks"
and "assigned-clock-rates" properties.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Marc Kleine-Budde <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
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Orange Pi 3 has AP6256 WiFi/BT module. WiFi part of the module is called
bcm43356 and can be used with the brcmfmac driver. The module is powered by
the two always on regulators (not AXP805).
WiFi uses a PG port with 1.8V voltage level signals. SoC needs to be
configured so that it sets up an 1.8V input bias on this port. This is done
by the pio driver by reading the vcc-pg-supply voltage.
You'll need a fw_bcm43456c5_ag.bin firmware file and nvram.txt
configuration that can be found in the Xulongs's repository for H6:
https://github.com/orangepi-xunlong/OrangePiH6_external/tree/master/ap6256
Mainline brcmfmac driver expects the firmware and nvram at the following
paths relative to the firmware directory:
brcm/brcmfmac43456-sdio.bin
brcm/brcmfmac43456-sdio.txt
Signed-off-by: Ondrej Jirman <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The watchdog has a clock on all our SoCs, but it wasn't always listed.
Add it to the devicetree where it's missing.
Signed-off-by: Maxime Ripard <[email protected]>
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The watchdog has an interrupt on all our SoCs, but it wasn't always listed.
Add it to the devicetree where it's missing.
Acked-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This patch adds RTC node and fixes the clock properties and nodes
to reflect the real clock tree.
The device nodes for the internal oscillator and osc32k are removed,
as these clocks are now provided by the RTC device. Clock references
are fixed accordingly, too.
Signed-off-by: Ondrej Jirman <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The CSI controller embedded in the A20 can be supported by our new driver.
Let's add it to our DT.
Signed-off-by: Maxime Ripard <[email protected]>
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A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.
This patch has been tested on A64-OLinuXino-1Ge16GW with Linux 5.0 from Debain.
Basic benchmarks using Flexible IO Tester show reasonable performance from the
eMMC.
eMMC - Random Write: 21.3MiB/s
eMMC - Sequential Write: 68.2MiB/s
SD Card - Random Write: 1690KiB/s
SD Card - Sequential Write: 11.0MiB/s
Changes:
v3: Separate dts for eMMC variants
v2: Fix descriptions for VCC and VCCQ
Link: https://github.com/armbian/build/commit/174953de1eb09e6aa1ef7075066b573dba625398
Signed-off-by: Martin Ayotte <[email protected]>
[[email protected] Fix descriptions for VCC and VCCQ, separate dts for eMMC]
Signed-off-by: Sunil Mohan Adapa <[email protected]>
Tested-by: Sunil Mohan Adapa <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.
Add new compatible string to the bindings documentation for the A64 OlinuXino
board variant with on-board eMMC.
Signed-off-by: Sunil Mohan Adapa <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Unlike the A10 that has 6 timers available, the v3s has only three, with only
three interrupts. Let's change the compatible to reflect that, and add the
missing interrupts.
Signed-off-by: Maxime Ripard <[email protected]>
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Unlike the A10 that has 6 timers available, the H3 has only two, with only
two interrupts, just like the A23. Let's change the compatible to reflect
that.
Signed-off-by: Maxime Ripard <[email protected]>
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Unlike the A10 that has 6 timers available, the A83t has only two, with
only two interrupts, just like the A23. Let's change the compatible to
reflect that.
Signed-off-by: Maxime Ripard <[email protected]>
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Unlike the A10 that has 6 timers available, the A23 and A33 has only two,
with only two interrupts. Let's change the compatible to reflect that.
Signed-off-by: Maxime Ripard <[email protected]>
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The timer unit in the A31 has 6 interrupts available. List all of them.
Signed-off-by: Maxime Ripard <[email protected]>
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The timer unit in the sun5i die has 6 interrupts available. List all of
them.
Signed-off-by: Maxime Ripard <[email protected]>
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The timer unit in the A10 has 6 interrupts available. List all of them.
Signed-off-by: Maxime Ripard <[email protected]>
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The Allwinner SoCs have an embedded GPADC that is doing thermal reading as
well, supported in Linux, with a matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Tanix TX6 is an Allwinner H6 based TV box, which supports:
- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
- GPU Mali-T720
- 4GiB DDR3 RAM (3GiB useable)
- 100Mbps EMAC via AC200 EPHY
- Cdtech 47822BS Wifi/BT
- 2x USB 2.0 Host and 1x USB 3.0 Host
- HDMI port
- IR receiver
- 64GiB eMMC
- 5V/2A DC power supply
Signed-off-by: Jernej Skrabec <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Add new Oranth Tanix TX6 board compatible string to the bindings
documentation.
Signed-off-by: Jernej Skrabec <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
nodes.
Suggested-by: Icenowy Zheng <[email protected]>
Signed-off-by: Bhushan Shah <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Allwinner H6 have a mv64xxx i2c interface available to be used.
Signed-off-by: Bhushan Shah <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The DWMAC binding never supported having the Ethernet PHY node as a
direct child to the controller, nor did it support the "phy" property
as a way to specify which Ethernet PHY to use. What seemed to work
was simply the implementation ignoring the "phy" property and instead
probing all addresses on the MDIO bus and using the first available
one.
The recent switch from "phy" to "phy-handle" breaks the assumptions
of the implementation, and does not match what the binding requires.
The binding requires that if an MDIO bus is described, it shall be
a sub-node with the "snps,dwmac-mdio" compatible string.
Add a device node for the MDIO bus, and move the Ethernet PHY node
under it. Also fix up the #address-cells and #size-cells properties
where needed.
Fixes: de332de26d19 ("ARM: dts: sunxi: Switch from phy to phy-handle")
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Beelink GS1 has a DDC I2C bus voltage shifter. This is actually missing
and video is limited to 1024x768 due to missing EDID information.
Add the DDC regulator in the device-tree.
Signed-off-by: Clément Péron <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Beelink GS1 board has a SPDIF out connector, so enable it in
the device-tree and add a simple SPDIF soundcard.
Signed-off-by: Clément Péron <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
Only one pinmuxing is available so set it as default.
Signed-off-by: Clément Péron <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Lichee zero plus is a core board made by Sipeed, which includes on-board
TF slot or SMT SD NAND, and optional SPI NOR or eMMC, a UART debug
header, a microUSB slot and a gold finger connector for expansion. It
can use either Sochip S3 or Allwinner S3L SoC.
Add the basic device tree for the core board, w/o optional onboard
storage, and with S3 SoC.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The Allwinner S3/S3L/V3 SoCs all share the same die with the V3s SoC,
but with more GPIO wired out of the package.
Add a DTSI file for these SoCs. It just replaces some compatible strings
of the V3s DTSI now. As these SoCs share the same feature set on Linux,
we use the first known chip (V3) as the file's name.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The Lichee Zero Plus is a core board made by Sipeed, with a microUSB
connector on it, TF slot or WSON8 SD chip, optional eMMC or SPI Flash.
It has a gold finger connector for expansion, and UART is available from
reserved pins w/ 2.54mm pitch. The board can use either SoChip S3 or
Allwinner V3L SoCs.
Add the device tree binding of the basic version of the core board --
w/o eMMC or SPI Flash, w/ TF slot or WSON8 SD, and use S3 SoC.
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Orange Pi 3 has a DDC_CEC_EN signal connected to PH2, that enables the DDC
I2C bus voltage shifter. Before EDID can be read, we need to pull PH2 high.
This is realized by the ddc-en-gpios property.
Signed-off-by: Ondrej Jirman <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The Cubietruck Plus has an HDMI connector tied to the HDMI output of the
SoC.
Enables display output via HDMI on the Cubietruck Plus. The connector
device node is named "hdmi-connector" as there is also a display port
connector, which is tied to the MIPI DSI output of the SoC through a
MIPI-DSI-to-DP bridge. This part is not supported yet.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The rk3288 fennec board has been removed, remove the binding document at
the same time.
Signed-off-by: Kever Yang <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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Since there is no one using this board, remove it.
Signed-off-by: Kever Yang <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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Support for the USB regulator of AB8500 was removed in
commit 41a06aa738ad ("regulator: ab8500: Remove USB regulator").
However, the configuration was never removed from the device tree.
It does no longer have any effect, remove it from the device tree.
Signed-off-by: Stephan Gerhold <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
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Some Ux500 devices use the newer AB8505 PMIC instead of AB8500.
Although they are very similar, there are subtle differences
like the number of regulators or the available GPIO pins.
At the moment, ste-dbx5x0.dtsi always configures the AB8500 PMIC.
To support devices with AB8505, it is necessary to split the
AB8500-specific parts into a separate .dtsi file. Boards can then
select the PMIC by including either ste-ab8500.dtsi or ste-ab8505.dtsi.
Signed-off-by: Stephan Gerhold <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
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Add i2c nodes to mt8183 and mt8183-evb.
Signed-off-by: Qii Wang <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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The correct gic number of pwrap is 185 instead of 209. This patch fixes
it to avoid triggering error interrupt.
Fixes: e526c9bc11f8 ("arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile")
Signed-off-by: Hsin-Hsiung Wang <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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This adds basic support for MT7629 reference board.
Tested-by: Kevin Hilman <[email protected]>
Signed-off-by: Ryder Lee <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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Swift contains an eMMC device attached to the second SDHCI controller.
Reviewed-by: Adriana Kobylak <[email protected]>
Signed-off-by: Joel Stanley <[email protected]>
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