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Running reboot command on the TQMa7 board would just hang infinite
at the end of the system shutdown process.
Handling of i.MX7 errata e10574:
Watchdog: A watchdog timeout or software trigger will not reset the SOC.
Moved pinctrl from common mba7 to common tqma7 dtsi as it improves
readability of errata handling. Most integrators of this SoM will
likely use the development board as inspiration for handling this
SoC issue.
Signed-off-by: Bruno Thomsen <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add device tree for the Menlosystems board based on i.MX53 M53 SoM.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: NXP Linux Team <[email protected]>
To: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Rename the touchscreen node to match contemporary design.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: NXP Linux Team <[email protected]>
To: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Update i.MX6DL automotive part's opp table according to i.MX6DL
automotive datasheet Rev.9, 11/2018, it adds 996MHz set-point
support as below:
LDO enabled(min value):
996MHz: VDDARM: 1.275V, VDDSOC: 1.175V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.125V, VDDSOC: 1.150V;
Adding 25mV to cover board IR drop, for LDO enabled mode of 996MHz,
as the max value of LDO output can NOT exceed 1.3V, so 25mV is NOT
added for VDDARM.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The devicetree specification recommends using generic node names.
Some Zii dts files already follow such recommendation, but some don't,
so use generic node names for consistency among the Zii dts files.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The LCD power sequencer is very finicky. The backlight cannot
be driven until after the sequencer is done. Until now, the
regulators were marked with 'regulator-always-on' to make sure
it came up before the backlight. This patch allows the LCD
regulators to power down and prevent the backlight from being
used again until the sequencer is ready. This reduces
standby power consumption by ~100mW.
Signed-off-by: Adam Ford <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The original submission had functional audio out and was based
on reviewing other boards using the same wm8962 codec. However,
the Logic PD board uses an analog microphone which was being
disabled for a digital mic. This patch corrects that and
explicitly sets the gpio-cfg pins all to 0x0000 which allows the
analog microphone to capture audio.
Signed-off-by: Adam Ford <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add #cooling-cells for i.MX6SLL cpu-freq cooling device usage.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The Kobo Aura is an e-book reader released in 2013.
With the devicetree in its current state, the kernel will boot and run
for about ten seconds. To solve this, the embedded controller needs to
be told that the system should stay powered on. This will be done in a
later patchset.
- The IOMUXC mode bits for the SD interfaces were taken from the
vendor's U-Boot fork.
- The bus width of the eMMC is 4 bits in the vendor kernel, but I
achieved better performance with 8 bits.
- The SDIO clock frequency for the WiFi chip is 25MHz in the vendor
kernel, but the WiFi chip (BCM43362) supports 50MHz, which works
reliably on this board and gives slightly better performance.
- The I2C pins' IOMUXC settings come from the vendor's U-Boot fork.
Signed-off-by: Jonathan Neuschäfer <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.
Signed-off-by: Andrew F. Davis <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.
Signed-off-by: Andrew F. Davis <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.
Note the GPIO polarity in the driver was ignored before and always
assumed to be active low, when all the DTs are fixed we will start
respecting the specified polarity. Switch polarity in DT to the
currently assumed one, this way when the driver changes the
behavior will not change.
Signed-off-by: Andrew F. Davis <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SL_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SL_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SLL_CLK_SDMA result in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SLL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6UL_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6UL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX7D_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX7D_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SX_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SX_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality(this at least
breaks RAVE SP serdev driver on RDU2). Fix the code to specify
IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect
clock ratio.
Signed-off-by: Andrey Smirnov <[email protected]>
Reviewed-by: Lucas Stach <[email protected]>
Cc: Angus Ainslie (Purism) <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Tested-by: Adam Ford <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Warp7 comes with a Omnivision OV2680 sensor, add the node here to make
complete the camera data path for this system. Add the needed regulator
to the analog voltage supply, the port and endpoints in mipi_csi node
and the pinctrl for the reset gpio.
Signed-off-by: Rui Miguel Silva <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add and enable csi and mipi_csi nodes.
Signed-off-by: Rui Miguel Silva <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add device tree nodes for csi, video multiplexer and mipi-csi.
Signed-off-by: Rui Miguel Silva <[email protected]>
Reviewed-by: Laurent Pinchart <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The IOMUXC General Purpose Register has bitfield to control video bus
multiplexer to control the CSI input between the MIPI-CSI2 and parallel
interface. Add that register and mask.
Signed-off-by: Rui Miguel Silva <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add power domain index 0 related with mipi-phy to imx7s.
While at it rename pcie power-domain node to remove pgc prefix.
Signed-off-by: Rui Miguel Silva <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This adds support for the TQ TQMa7D SoM together with
the MBa7 carrier board and it's based on the NXP i.MX7Dual SoC.
Signed-off-by: Bruno Thomsen <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This adds support for the TQ TQMa7S SoM together with
the MBa7 carrier board and it's based on the NXP i.MX7Solo SoC.
Signed-off-by: Bruno Thomsen <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This adds TQMa7 and MBa7 board support.
TQMa7 can be mounted with either i.MX7 Solo or Dual.
All TQMa7 board variants can be mounted in MBa7 carrier board.
Signed-off-by: Bruno Thomsen <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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i.MX6 comes with 4 viewports, so configure PCIE node accordingly so
that the driver won't assume we only have 2.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Richard Zhu <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: [email protected]
Cc: [email protected]
Reviewed-by: Lucas Stach <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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i.MX7D comes with 4 viewports, so configure PCIE node accordingly so
that the driver won't assume we only have 2.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Richard Zhu <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: [email protected]
Cc: [email protected]
Reviewed-by: Lucas Stach <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Only a certain number of CFU1's come with NOR flash populated. Disable
it by default to avoid trying to probe NOR flash on devices that don't
have it. Devices that do have it can rely on the bootloader to enable
this node.
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Add Device Tree for VF610 based Zodiac Seat Power Box.
Signed-off-by: Andrey Smirnov <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Heiner Kallweit <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Shawn Guo <[email protected]>
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Add i.MX7ULP OCOTP support, its clock source is from
M4 BUS clock which is NOT available in Linux clock tree,
but M4 BUS clock is always ON when A7 (Linux) is alive,
so just use dummy clock here.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This is one of two boards that make use of the recently introduced SIOX
bus. Apart from the devices described in the dts it features a display
with touch that I didn't include here because it needs some non-mainline
change to operate correctly.
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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After switching to the new FSL QSPI driver the properties
'fsl,qspi-has-second-chip' and 'big-endian' are not used anymore.
The driver now uses the 'reg' property to determine the bus and
the chipselect. The endianness is selected by the driver depending
on which SoC is used.
Signed-off-by: Frieder Schrempf <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Even though the ChipIdea USB controller binding[1] doesn't specify the
properties that reference a PHY as required, the Linux driver
requires[2] such a reference.
The clock situation is like on i.MX53: The USB controller is clocked
from IMX5_CLK_USBOH3_GATE and the PHY from IMX5_CLK_USB_PHY1_GATE.
[1]: Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
[2]: Search for EINVAL in drivers/usb/chipidea/ci_hdrc_imx.c
Signed-off-by: Jonathan Neuschäfer <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Using aliases, the devices will be enumerated properly.
Signed-off-by: Alexander Kurz <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Using aliases, the devices will be enumerated properly.
Signed-off-by: Alexander Kurz <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Using aliases, the devices will be enumerated properly.
Signed-off-by: Alexander Kurz <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The 'max-brightness' property is not a valid one as per
Documentation/devicetree/bindings/leds/leds-gpio.txt, so remove it.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add MMDC1 compatible string which is missing, and also set
it to be disabled by default, as most of the platforms ONLY
use single channel MMDC0, if dual MMDC channels are used, it
can be enabled in board dts file.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Node name should be generic, so use "memory-controller"
instead of "mmdc" for MMDC node name, also remove "mmdc"
label for platforms with single MMDC node.
Signed-off-by: Anson Huang <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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i.MX7ULP has a MMDC module to control DDR, it reuses
i.MX6Q's MMDC module, add support for it.
Signed-off-by: Anson Huang <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The imx6q Technical reference manual shows the interrupt is
available to wake from sleep using the power button. The driver
has been available for quite some time, and other variants of the
i.MX6 have it enabled, so this implements it much like the others.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Now that the backlight driver is upstream, we can properly manage the
backlight from the panel.
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This adds the i2c device node for the ethernet switch watchdog.
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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PMIC swbst regulator is used for the MikroBUS socket (pin +5V).
We have to set the regulator to "boot-on" and "always-on"
to output a voltage of 5V on this socket.
Signed-off-by: Pierre-Jean Texier <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This patch is to enable esdhc controller in ls1021aqds
Signed-off-by: Yinbo Zhu <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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