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This issue is a regression from 70790f4f819875e8f390871fd15bbbf823f28e1b,
and causes us to miss a special-case for C51 (NV4E) chipsets and return
the wrong reference frequency for the VPLLs.
Should fix fdo#56202
Signed-off-by: Ben Skeggs <[email protected]>
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Purely a cosmetic issue at this point.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Buggy firmware leads to bad things happening otherwise..
Signed-off-by: Ben Skeggs <[email protected]>
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Without checking, we could detect vbios size as 0, allocate 0-byte array
(kmalloc returns invalid pointer for such allocation) and crash in
nouveau_bios_score while checking for vbios signature.
Reported-by: Heinz Diehl <[email protected]>
Signed-off-by: Marcin Slusarz <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Marcin Slusarz <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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v2: use already existing parent
Signed-off-by: Marcin Slusarz <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Reported-by: Pawel Sikora <[email protected]>
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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It's questionable use case, but weston/wayland already relies on this
behaviour, and other drivers don't care about it, so it's a matter of
compatibility. Without it, process invoking such page flip hangs in
unkillable state, trying to reserve the same buffer twice.
Signed-off-by: Marcin Slusarz <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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ttm_agp_tt_create is itself defined under CONFIG_AGP, so there's no
point calling it otherwise.
Signed-off-by: Max Filippov <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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nouveau_fb_destroy already calls nouveau_mm_fini on vram mm.
Signed-off-by: Marcin Slusarz <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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With the introduction of fan management modes, fan may not be drivable.
We should allow reclocking nonetheless.
This return was stupid to begin with since it may have left the card
in an intermediate state (clocks corresponding to a perflvl and voltage
corresponding to another one). The reclocking code will need to be
rewritten in a near-future in order to provide a better error handling.
Reported-by: Marcin Slusarz <[email protected]>
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Reported-by: Vekin on IRC
Reported-by: Emil Velikov <[email protected]>
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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This is needed for automatic fan management where some delays
can be over 0xffffffff ns.
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Reported-by: Jukka Hopeavuori <[email protected]>
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Fixes crash during reclocking.
Call Trace:
pll_calc == NULL
calc_pll
calc_mclk
nv50_pm_clocks_pre
nouveau_pm_perflvl_set
nouveau_pm_trigger
nouveau_pm_profile_set
nouveau_pm_set_perflvl
dev_attr_store
sysfs_write_file
vfs_write
sys_write
system_call_fastpath
Signed-off-by: Marcin Slusarz <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Marcin Slusarz <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Details of the problem, and solution, are in comments in the commit
proper.
Signed-off-by: Ben Skeggs <[email protected]>
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Hopefully fixed the tlb flush timeout issue. Was able to observe this
condition occur occasionally, and it appears the binary driver doesn't
wait on the old condition either..
Should give 39-bit DMA addressing on the relevant chipsets.
Signed-off-by: Ben Skeggs <[email protected]>
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Something seems to be missing in regards to flushing specific ranges of
the TLB. For the moment, flushing the entire thing seems to make it
work alright.
Should give 39-bit DMA addressing on the relevant chipsets.
v2: allocate contig 16KiB for dummy pages, reported by mwk on irc
Signed-off-by: Ben Skeggs <[email protected]>
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We don't need to pull the page address out of the page tables on nv4x
chips that have a real GART.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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For now, only 2 control modes are available:
- NONE: The fan is never touched (default)
- MANUAL: The fan is set to the user-defined fan speed (pwm1)
This patch introduces a distinction between ptherm internal fan management
and external fan management. The latter is bound to respect the fan mode
while the first can still select the speed it wants unless the NONE mode
is selected. This is important for automatic fan management.
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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This was reported by tizbac on IRC.
Signed-off-by: Martin Peres <[email protected]>
Reviewed-by: Ben Skeggs <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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v2: Martin Peres <[email protected]>
- fixed unintentional use of floating point
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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The previous driver waited for 250ms to accumulate data. This version times a
complete fan rotation and extrapolates to RPM.
The fan rotational speed should now be read in less than 250ms (worst case)
and usually in less 50ms.
Signed-off-by: Martin Peres <[email protected]>
Reviewed-by: Ben Skeggs <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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It looks scary because of the size, but I tried to keep the differences minimal.
Further patches will fix the actual "driver" code and add new features.
v2: change filenames, split to submodules
v3: add a missing include
v4: Ben Skeggs <[email protected]>
- fixed set_defaults() to allow min_duty < 30 (thermal table will
override this if it's actually necessary)
- fixed set_defaults() to not provide pwm_freq so nv4x (which only has
pwm_div) can actually work. the boards using pwm_freq will have a
thermal table entry to provide us the value.
- removed unused files
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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v2: perf_table now is more in line with the other functions
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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This commit also adds a static list of all known devices and their possible
i2c addresses.
v2: use the common table parsing technique as suggested by darktama
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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As an accident, it should also fix temperature reading on nv4x.
v2: introduce nvbios_therm_entry as advised by darktama
Signed-off-by: Martin Peres <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Martin Peres <[email protected]>
Reviewed-by: Ben Skeggs <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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If nouveau_pm_perflvl_get() fails, pm->profiles list will be left
uninitialized, which causes oops during nouveau_pm_fini().
Move INIT_LIST_HEAD before call to nouveau_pm_perflvl_get().
Signed-off-by: Dmitry Eremin-Solenikov <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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drm client
This will make it more obvious which application caused particular messages.
Signed-off-by: Ben Skeggs <[email protected]>
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May kill the DRM version completely at some point, undecided..
Signed-off-by: Ben Skeggs <[email protected]>
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Can be somewhat more informative that way...
Signed-off-by: Ben Skeggs <[email protected]>
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Seems to be required to "re-arm" the engines after a vm fault.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Not really sure how to confirm this 100%, but, the numbers match on all the
traces I have for NVCx (2 LTS), NVD9 (1LTS) and NVEx (4LTS).
Signed-off-by: Ben Skeggs <[email protected]>
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Graphics acceleration is still disabled by default due to lingering issues
that need to be solved.
Signed-off-by: Ben Skeggs <[email protected]>
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Triggers PIBUS interrupts due to register not existing anymore, and as
a result HUB_SET_CHAN times out.
After this commit, our fuc loads and can accelerate at least fbcon, X,
glxgears and OA on NVE4. NVE7 not tested as of yet.
Signed-off-by: Ben Skeggs <[email protected]>
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Currently identical except the available chipset register lists. This will
*not* currently work and is disabled by default because of this.
May get merged again later, remains to be seen what further changes will be
required.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Came in useful for debugging another issue earlier, so keep it around.
Signed-off-by: Ben Skeggs <[email protected]>
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