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2015-08-24clk: ux500: delete the non-DT U8500 clock implementationLinus Walleij3-528/+0
This code is unused and not coming back. Let's kill it off. Cc: Ulf Hansson <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: Remove unused provider APIsStephen Boyd2-82/+16
Remove these APIs now that we've converted all users to the replacement struct clk_hw based versions. Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: si5351: Convert __clk_get_name() to clk_hw_get_name()Stephen Boyd1-8/+8
This driver uses __clk_get_name() when it's dealing with struct clk_hw pointers. Use the simpler form so that we can get rid of the clk member in struct clk_hw one day. Acked-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24drm/msm/dsi: Convert to clk_hw based provider APIsStephen Boyd1-2/+2
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Wentao Xu <[email protected]> Cc: Rob Clark <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: versatile: Switch to assigned clock parentsStephen Boyd2-62/+27
We're removing struct clk from the clk provider API. This code is calling the consumer APIs to change the parent to a 1 MHz fixed rate clock for each of the clocks that the driver provides. Move to using the assigned-clock-parents DT property for this instead. Because this is an ABI break, detect if the property is missing and fall back to setting the parent explicitly before the clocks are registered. Acked-by: Pawel Moll <[email protected]> Cc: Linus Walleij <[email protected]> Tested-by: Sudeep Holla <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: versatile: Add SP810 device tree bindings documentPawel Moll1-0/+35
Signed-off-by: Pawel Moll <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: ti: Convert to clk_hw based provider APIsStephen Boyd7-35/+33
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: tegra: Convert to clk_hw based provider APIsStephen Boyd2-10/+10
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Tomeu Vizoso <[email protected]> Cc: Thierry Reding <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: sunxi: Convert to clk_hw based provider APIsStephen Boyd3-14/+14
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Maxime Ripard <[email protected]> Cc: "Emilio López" <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: spear: Convert to clk_hw based provider APIsStephen Boyd1-1/+1
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by: Viresh Kumar <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: sirf: Convert to clk_hw based provider APIsStephen Boyd1-6/+6
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Barry Song <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: samsung: Convert to clk_hw based provider APIsStephen Boyd1-2/+2
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Chanwoo Choi <[email protected]> Acked-by: Sylwester Nawrocki <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Kukjin Kim <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: rockchip: Convert to clk_hw based provider APIsStephen Boyd1-9/+9
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Reviewed-by: Heiko Stuebner <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: qcom: Convert to clk_hw based provider APIsStephen Boyd4-36/+30
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: stm32f4: Convert to clk_hw based provider APIsStephen Boyd1-2/+1
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Daniel Thompson <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: mvebu: Convert to clk_hw based provider APIsStephen Boyd1-4/+2
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. This also removes a clk_get() in this driver that can just as easily use of_clk_get_parent_name() instead. Cc: Gregory CLEMENT <[email protected]> Cc: Thomas Petazzoni <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: mmp: Convert to clk_hw based provider APIsStephen Boyd2-21/+17
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Chao Xie <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: Convert basic types to clk_hw based provider APIsStephen Boyd3-12/+11
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: bcm: Convert to clk_hw based provider APIsStephen Boyd1-10/+10
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Reviewed-by: Alex Elder <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: at91: Convert to clk_hw based provider APIsStephen Boyd3-13/+13
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by: Boris Brezillon <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24MIPS: alchemy: Convert to clk_hw based provider APIsStephen Boyd1-6/+6
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Manuel Lauss <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Linux-MIPS <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24ARM: OMAP: Convert __clk_get_rate() to provider/consumer APIsStephen Boyd1-3/+3
We're removing struct clk from the clk provider API, so switch to clk_get_rate() and clk_hw_get_rate() here appropriately. Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: ti: Remove CLK_IS_BASIC checkStephen Boyd1-6/+0
This code is never called with a basic clock type, so the check here is not doing anything useful and is blocking the removal of __clk_get_flags(). Remove the check so we can delete the __clk_get_flags() API. Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: Convert __clk_get_flags() to clk_hw_get_flags()Stephen Boyd17-21/+21
Mostly converted with the following snippet: @@ struct clk_hw *E; @@ -__clk_get_flags(E->clk) +clk_hw_get_flags(E) Acked-by: Tero Kristo <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Max Filippov <[email protected]> Acked-by: Sebastian Hesselbarth <[email protected]> Cc: Daniel Thompson <[email protected]> Cc: Coquelin <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()Stephen Boyd15-20/+20
Mostly converted with the following semantic patch: @@ struct clk_hw *E; @@ -__clk_get_num_parents(E->clk) +clk_hw_get_num_parents(E) Acked-by: Boris Brezillon <[email protected]> Cc: Chao Xie <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Javier Martinez Canillas <[email protected]> Cc: Tomasz Figa <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: "Emilio López" <[email protected]> Acked-by: Tero Kristo <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Acked-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24clk: Add clk_hw_*() APIs for use by clk providersStephen Boyd2-0/+70
clk providers shouldn't need to use the consumer APIs (clk.h). Add provider APIs to replace the __clk_*() APIs that take a struct clk_hw as their first argument instead of a struct clk. Signed-off-by: Stephen Boyd <[email protected]>
2015-08-24nfsd: Add Jeff Layton as co-maintainerJ. Bruce Fields1-0/+1
Jeff has been doing a lot of development (including much of the state-locking rewrite just as one example) plus lots of review and other miscellaneous nfsd work, so let's acknowledge the status quo. I'll continue to be the one to send regular pull requests but Jeff will should be available to cover there occasionally too. Signed-off-by: J. Bruce Fields <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2015-08-24net: Fix RCU splat in af_keyDavid Ahern1-23/+23
Hit the following splat testing VRF change for ipsec: [ 113.475692] =============================== [ 113.476194] [ INFO: suspicious RCU usage. ] [ 113.476667] 4.2.0-rc6-1+deb7u2+clUNRELEASED #3.2.65-1+deb7u2+clUNRELEASED Not tainted [ 113.477545] ------------------------------- [ 113.478013] /work/monster-14/dsa/kernel.git/include/linux/rcupdate.h:568 Illegal context switch in RCU read-side critical section! [ 113.479288] [ 113.479288] other info that might help us debug this: [ 113.479288] [ 113.480207] [ 113.480207] rcu_scheduler_active = 1, debug_locks = 1 [ 113.480931] 2 locks held by setkey/6829: [ 113.481371] #0: (&net->xfrm.xfrm_cfg_mutex){+.+.+.}, at: [<ffffffff814e9887>] pfkey_sendmsg+0xfb/0x213 [ 113.482509] #1: (rcu_read_lock){......}, at: [<ffffffff814e767f>] rcu_read_lock+0x0/0x6e [ 113.483509] [ 113.483509] stack backtrace: [ 113.484041] CPU: 0 PID: 6829 Comm: setkey Not tainted 4.2.0-rc6-1+deb7u2+clUNRELEASED #3.2.65-1+deb7u2+clUNRELEASED [ 113.485422] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.7.5.1-0-g8936dbb-20141113_115728-nilsson.home.kraxel.org 04/01/2014 [ 113.486845] 0000000000000001 ffff88001d4c7a98 ffffffff81518af2 ffffffff81086962 [ 113.487732] ffff88001d538480 ffff88001d4c7ac8 ffffffff8107ae75 ffffffff8180a154 [ 113.488628] 0000000000000b30 0000000000000000 00000000000000d0 ffff88001d4c7ad8 [ 113.489525] Call Trace: [ 113.489813] [<ffffffff81518af2>] dump_stack+0x4c/0x65 [ 113.490389] [<ffffffff81086962>] ? console_unlock+0x3d6/0x405 [ 113.491039] [<ffffffff8107ae75>] lockdep_rcu_suspicious+0xfa/0x103 [ 113.491735] [<ffffffff81064032>] rcu_preempt_sleep_check+0x45/0x47 [ 113.492442] [<ffffffff8106404d>] ___might_sleep+0x19/0x1c8 [ 113.493077] [<ffffffff81064268>] __might_sleep+0x6c/0x82 [ 113.493681] [<ffffffff81133190>] cache_alloc_debugcheck_before.isra.50+0x1d/0x24 [ 113.494508] [<ffffffff81134876>] kmem_cache_alloc+0x31/0x18f [ 113.495149] [<ffffffff814012b5>] skb_clone+0x64/0x80 [ 113.495712] [<ffffffff814e6f71>] pfkey_broadcast_one+0x3d/0xff [ 113.496380] [<ffffffff814e7b84>] pfkey_broadcast+0xb5/0x11e [ 113.497024] [<ffffffff814e82d1>] pfkey_register+0x191/0x1b1 [ 113.497653] [<ffffffff814e9770>] pfkey_process+0x162/0x17e [ 113.498274] [<ffffffff814e9895>] pfkey_sendmsg+0x109/0x213 In pfkey_sendmsg the net mutex is taken and then pfkey_broadcast takes the RCU lock. Since pfkey_broadcast takes the RCU lock the allocation argument is pointless since GFP_ATOMIC must be used between the rcu_read_{,un}lock. The one call outside of rcu can be done with GFP_KERNEL. Fixes: 7f6b9dbd5afbd ("af_key: locking change") Signed-off-by: David Ahern <[email protected]> Acked-by: Eric Dumazet <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2015-08-24perf tools: Update Intel PT documentationAdrian Hunter1-8/+186
Update Intel PT documentation to describe new features. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Add Intel PT support for decoding TRACESTOP packetsAdrian Hunter1-0/+11
A TRACESTOP packet is produced when an Intel PT trace enters a defined region of the address space at which point the tracing stops. This patch just adds decoder support. Support for specifying TRACESTOP regions is left until later. For details refer to the June 2015 or later Intel 64 and IA-32 Architectures SDM Chapter 36 Intel Processor Trace. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Add Intel PT support for using CYC packetsAdrian Hunter1-0/+6
CYC packets are a new Intel PT feature. CYC packets provide even finer grain timestamp information than MTC and TSC packets. A CYC packet contains the number of CPU cycles since the last CYC packet. Unlike MTC and TSC packets, CYC packets are only sent when another packet is also sent. Support for this feature is indicated by: /sys/bus/event_source/devices/intel_pt/caps/psb_cyc which contains "1" if the feature is supported and "0" otherwise. CYC packets can be requested using a PMU config term e.g. perf record -e intel_pt/cyc/u sleep 1 The frequency of CYC packets can also be specified. e.g. perf record -e intel_pt/cyc,cyc_thresh=2/u sleep 1 CYC packets are not requested by default. Valid cyc_thresh values are given by: /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds which contains a hexadecimal value, the bits of which represent valid values e.g. bit 2 set means value 2 is valid. The value represents the minimum number of CPU cycles that must have passed before a CYC packet can be sent. The number of CPU cycles is: 2 ^ (value - 1) e.g. value 4 means 8 CPU cycles must pass before a CYC packet can be sent. Note a CYC packet is still only sent when another packet is sent, not at, e.g. every 8 CPU cycles. If an invalid value is entered, the error message will give a list of valid values e.g. $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname Invalid cyc_thresh for intel_pt. Valid values are: 0-12 tools/perf/Documentation/intel-pt.txt is updated in a later patch as there are a number of new features being added. For more information refer to the June 2015 or later Intel 64 and IA-32 Architectures SDM Chapter 36 Intel Processor Trace. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Add Intel PT support for decoding CYC packetsAdrian Hunter1-5/+306
CYC packets provide even finer grain timestamp information than MTC and TSC packets. A CYC packet contains the number of CPU cycles since the last CYC packet. This patch just adds decoder support. The CPU frequency can be related to TSC using the Maximum Non-Turbo Ratio in combination with the CBR (core-to-bus ratio) packet. However more accuracy is achieved by simply interpolating the number of cycles between other timing packets like MTC or TSC. This patch takes the latter approach. Support for a default value and validation of values is provided by a later patch. Also documentation is updated in a separate patch. For details refer to the June 2015 or later Intel 64 and IA-32 Architectures SDM Chapter 36 Intel Processor Trace. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Add Intel PT support for using MTC packetsAdrian Hunter1-1/+25
MTC packets are a new Intel PT feature. MTC packets provide finer grain timestamp information than TSC packets. Support for this feature is indicated by: /sys/bus/event_source/devices/intel_pt/caps/mtc which contains "1" if the feature is supported and "0" otherwise. MTC packets can be requested using a PMU config term e.g. perf record -e intel_pt/mtc/u sleep 1 The frequency of MTC packets can also be specified. e.g. perf record -e intel_pt/mtc,mtc_period=2/u sleep 1 The default value is 3 or the nearest lower value that is supported. 0 is always supported. Valid values are given by: /sys/bus/event_source/devices/intel_pt/caps/mtc_periods which contains a hexadecimal value, the bits of which represent valid values e.g. bit 2 set means value 2 is valid. The value is converted to the MTC frequency as: CTC-frequency / (2 ^ value) e.g. value 3 means one eighth of CTC-frequency Where CTC is the hardware crystal clock, the frequency of which can be related to TSC via values provided in cpuid leaf 0x15. If an invalid value is entered, the error message will give a list of valid values e.g. $ perf record -e intel_pt/mtc_period=15/u uname Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9 tools/perf/Documentation/intel-pt.txt is updated in a later patch as there are a number of new features being added. For more information refer to the June 2015 or later Intel 64 and IA-32 Architectures SDM Chapter 36 Intel Processor Trace. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Add Intel PT support for decoding MTC packetsAdrian Hunter2-4/+159
MTC packets provide finer grain timestamp information than TSC packets. MTC packets record time using the hardware crystal clock (CTC) which is related to TSC packets using a TMA packet. This patch just adds decoder support. Support for a default value and validation of values is provided by a later patch. Also documentation is updated in a separate patch. For details refer to the June 2015 or later Intel 64 and IA-32 Architectures SDM Chapter 36 Intel Processor Trace. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Pass Intel PT information for decoding MTC and CYCAdrian Hunter4-11/+83
Record additional information in the AUXTRACE_INFO event in preparation for decoding MTC and CYC packets. Pass the information to the decoder. The AUXTRACE_INFO record can be extended by using the size to indicate the presence of new members. The additional information includes PMU config bit positions and the TSC to CTC (hardware crystal clock) ratio needed to decode MTC packets. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Add new Intel PT packet definitionsAdrian Hunter3-17/+201
New features have been added to Intel PT which include a number of new packet definitions. This patch adds packet definitions for new packets: TMA, MTC, CYC, VMCS, TRACESTOP and MNT. Also another bit in PIP is defined. This patch only adds support for the definitions. Later patches add support for decoding TMA, MTC, CYC and TRACESTOP which is where those packets are explained. VMCS and the newly defined bit in PIP are used with virtualization which is not supported yet. MNT is a maintenance packet which the decoder should ignore. For details, refer to the June 2015 or later Intel 64 and IA-32 Architectures SDM Chapter 36 Intel Processor Trace. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Add Intel PT support for PSB periodsAdrian Hunter1-7/+210
The PSB packet is a synchronization packet that provides a starting point for decoding or recovery from errors. This patch adds support for a new Intel PT feature that allows the frequency of PSB packets to be specified. Support for this feature is indicated by /sys/bus/event_source/devices/intel_pt/caps/psb_cyc which contains "1" if the feature is supported and "0" otherwise. The PSB period can be specified as a PMU config term e.g. perf record -e intel_pt/psb_period=2/u sleep 1 The default value is 3 or the nearest lower value that is supported. 0 is always supported. Valid values are given by: /sys/bus/event_source/devices/intel_pt/caps/psb_periods which contains a hexadecimal value, the bits of which represent valid values e.g. bit 2 set means value 2 is valid. The value is converted to the approximate number of trace bytes between PSB packets as: 2 ^ (value + 11) e.g. value 3 means 16KiB bytes between PSBs If an invalid value is entered, the error message will give a list of valid values e.g. $ perf record -e intel_pt/psb_period=15/u uname Invalid psb_period for intel_pt. Valid values are: 0-5 tools/perf/Documentation/intel-pt.txt is updated in a later patch as there are a number of new features being added. For more information about PSB periods refer to the Intel 64 and IA-32 Architectures SDM Chapter 36 Intel Processor Trace from June 2015 or later. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24perf tools: Fix Intel PT 'instructions' sample periodAdrian Hunter3-1/+8
The period on synthesized 'instructions' samples was being set to a fixed value, whereas the correct value is the number of instructions since the last sample, which is a value that the decoder can provide. So do it that way. Signed-off-by: Adrian Hunter <[email protected]> Cc: Jiri Olsa <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCIZhang Rui3-24/+13
On multi-function JMicron SATA/PATA/AHCI devices, the PATA controller at function 1 doesn't work if it is powered on before the SATA controller at function 0. The result is that PATA doesn't work after resume, and we print messages like this: pata_jmicron 0000:02:00.1: Refused to change power state, currently in D3 irq 17: nobody cared (try booting with the "irqpoll" option) Async resume was introduced in v3.15 by 76569faa62c4 ("PM / sleep: Asynchronous threads for resume_noirq"). Prior to that, we powered on the functions in order, so this problem shouldn't happen. e6b7e41cdd8c ("ata: Disabling the async PM for JMicron chip 363/361") solved the problem for JMicron 361 and 363 devices. With async suspend disabled, we always power on function 0 before function 1. Barto then reported the same problem with a JMicron 368 (see comment #57 in the bugzilla). Rather than extending the blacklist piecemeal, disable async suspend for all JMicron multi-function SATA/PATA/AHCI devices. This quirk could stay in the ahci and pata_jmicron drivers, but it's likely the problem will occur even if pata_jmicron isn't loaded until after the suspend/resume. Making it a PCI quirk ensures that we'll preserve the power-on order even if the drivers aren't loaded. [bhelgaas: changelog, limit to multi-function, limit to IDE/ATA] Link: https://bugzilla.kernel.org/show_bug.cgi?id=81551 Reported-and-tested-by: Barto <[email protected]> Signed-off-by: Zhang Rui <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> CC: [email protected] # v3.15+
2015-08-24perf ordered_events: Clear the progress bar at the end of a flushArnaldo Carvalho de Melo1-0/+3
We were depending on the next screen operation after a flush() being one that would redraw the whole screen so that the progress bar would be overwritten, when that didn't happen a screen artifact of, say, a error dialog window would be overlaid on top of the progress bar, fix it by calling ui_browser__finish(), that now has a TUI implementation. Cc: Adrian Hunter <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: David Ahern <[email protected]> Cc: Frederic Weisbecker <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Stephane Eranian <[email protected]> Link: http://lkml.kernel.org/n/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sourcesShenwei Wang3-0/+285
IMX7D contains a new version of GPC IP block (GPCv2). It has two major functions: power management and wakeup source management. When the system is in WFI (wait for interrupt) mode, the GPC block will be the first block on the platform to be activated and signaled. In normal wait mode during cpu idle, the system can be woken up by any enabled interrupts. In standby or suspend mode, the system can only be wokem up by the pre-defined wakeup sources. Based-on-patch-by: Anson Huang <[email protected]> Signed-off-by: Shenwei Wang <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2015-08-24perf ui tui progress: Implement the ui_progress_ops->finish() methodArnaldo Carvalho de Melo1-1/+18
So that we can erase the progress bar after we're done with it, avoiding things like: ------------------------------------------------------------------- ┌─Error:──────────────────────────────────────────────────────┐ │Can't annotate unmapped_area_topdown: │ │ │ │No vmlinux file with build id a826726b5ddacfab1f0bade868f1a79│ │was found in the path. │ │ │ │Note that annotation using /proc/kcore requires CAP_SYS_RAWIO│ ┌Processin│ │──┐ │ │Please use: │ │ └─────────│ │──┘ │ perf buildid-cache -vu vmlinux │ │ │ │or: │ │ │ │ --vmlinux vmlinux │ │ │ │ │ │Press any key... │ └─────────────────────────────────────────────────────────────┘ Can't annotate unmapped_area_topdown: ------------------------------------------------------------------- I.e. that finished progress bar behind the error window. It is not a problem when we end up redrawing the whole screen, but its ugly when we present such error windows, provide a TUI method so that code like the above may avoid this situation, as will be done with the annotation code in the next cset. Cc: Adrian Hunter <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: David Ahern <[email protected]> Cc: Frederic Weisbecker <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Stephane Eranian <[email protected]> Link: http://lkml.kernel.org/n/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24Merge branches 'pci/host-dra7xx', 'pci/host-imx6' and 'pci/host-spear' into nextBjorn Helgaas3-13/+4
* pci/host-dra7xx: PCI: dra7xx: Remove unneeded use of IS_ERR_VALUE() * pci/host-imx6: PCI: imx6: Simplify a trivial if-return sequence * pci/host-spear: PCI: spear: Use BUG_ON() instead of condition followed by BUG()
2015-08-24Documentation/x86: Rename IRQSTACKSIZE to IRQ_STACK_SIZEAlexander Kuleshov1-1/+1
The IRQSTACKSIZE was renamed to the IRQ_STACK_SIZE in the (26f80bd6a9 x86-64: Convert irqstacks to per-cpu) commit, but it still named IRQSTACKSIZE in the documentation. This patch fixes this. Signed-off-by: Alexander Kuleshov <[email protected]> Signed-off-by: Jonathan Corbet <[email protected]>
2015-08-24Documentation/Intel-IOMMU.txt: Modify definition of DRHDNan Xiao1-1/+1
Hi all, According to "Intel Virtualization Technology for Directed I/O" specification, DRHD stands for "DMA Remapping Hardware Unit Definition" , not "DMA Engine Reporting Structure". Signed-off-by: Nan Xiao <[email protected]>
2015-08-24docs: update HOWTO for 3.x -> 4.x versioningMario Carrillo1-14/+14
The HOWTO document needed updating for the new kernel versioning. Signed-off-by: Mario Carrillo <[email protected]> Signed-off-by: Jonathan Corbet <[email protected]>
2015-08-24perf annotate: Reset the dso find_symbol cache when removing symbolsArnaldo Carvalho de Melo3-0/+13
The 'annotate' tool does some filtering in the entries in a DSO but forgot to reset the cache done in dso__find_symbol(), cauxing a SEGV: [root@zoo ~]# perf annotate netlink_poll perf: Segmentation fault -------- backtrace -------- perf[0x526ceb] /lib64/libc.so.6(+0x34960)[0x7faedfbe0960] perf(rb_erase+0x223)[0x499d63] perf[0x4213e9] perf[0x4bc123] perf[0x4bc621] perf[0x4bf26b] perf[0x4bc855] perf(perf_session__process_events+0x340)[0x4bddc0] perf(cmd_annotate+0x6bb)[0x421b5b] perf[0x479063] perf(main+0x60a)[0x42098a] /lib64/libc.so.6(__libc_start_main+0xf0)[0x7faedfbcbfe0] perf[0x420aa9] [0x0] [root@zoo ~]# Fix it by reseting the find cache when removing symbols. Cc: Adrian Hunter <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: David Ahern <[email protected]> Cc: Frederic Weisbecker <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Stephane Eranian <[email protected]> Fixes: b685ac22b436 ("perf symbols: Add front end cache for DSO symbol lookup") Link: http://lkml.kernel.org/n/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2015-08-24crypto: qat - silence a static checker warningTadeusz Struk1-0/+4
Add range check for ring number. Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Tadeusz Struk <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2015-08-24crypto: vmx - Fixing opcode issueLeonidas Da Silva Barbosa1-0/+1
In build time vadduqm opcode is not being mapped correctly. Adding a new map in ppc-xlate to do this. Signed-off-by: Leonidas S Barbosa <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2015-08-24crypto: caam - Use the preferred style for memory allocationsFabio Estevam5-15/+11
"The preferred form for passing a size of a struct is the following: p = kmalloc(sizeof(*p), ...); .... The preferred form for allocating a zeroed array is the following: p = kcalloc(n, sizeof(...), ...); " ,so do as suggested. Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Horia Geant? <[email protected]> Signed-off-by: Herbert Xu <[email protected]>