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Removed the wrong compatible string "snps,dw-pcie", in case
match incorrect driver.
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Removed the compatible string "snps,dw-pcie", it is for the reference
platform driver for PCI RC IP Protoyping Kits based on the ARC SDP,
so it is not suitable for all platform with designware PCIe controller,
and platform vendors have themselves' drivers.
The compatible string "snsp,dw-pcie" was added by mistake and it's not
matched that time, but it is matched because PCIe drivers has been
collected recently.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The PCIe compatible string for LS1043A was lost, so add it.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Boards based on imx7 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx7s.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Boards based on imx35 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx35.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Boards based on imx31 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx31.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Vladimir Zapolskiy <[email protected]>
Tested-by: Vladimir Zapolskiy <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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According to Documentation/devicetree/bindings/media/fsl-pxp.txt,
only one PXP clock needs to be described and it should be named
"axi".
Also pass the compatible string as suggested in the bindings doc.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Remove "regulator-always-on" property for vddpu regulator
since it can be OFF when GPU power domain is OFF.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The "fsl,mf-mix-wakeup-irq" is ONLY used as a temporary
solution in NXP's internal tree for Mega/Fast Mix off
feature after suspend, upstream kernel does NOT need it,
remove it.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Boards based on imx53 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx53.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Boards based on imx51 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx51.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Enable the USB3 peripheral that is wired to CON2 on the Clearfog GT-8K
board.
Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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Add DT support for the Macchiatobin Single Shot board from SolidRun,
which is similar to the Double Shot board, but does not have the
10G 3310 PHYs - the two ethernet ports are instead connected directly
to the SFP+ cages.
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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The ESPRESSObin board has a emmc interface available on U11: declare it
and let the bootloader enable it if the emmc is present.
[[email protected]: disable the emmc by default]
Signed-off-by: Ding Tao <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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add the qDMA device tree nodes for LS1046A devices.
Signed-off-by: Wen He <[email protected]>
Signed-off-by: Peng Ma <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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add the qDMA device tree nodes for LS1043A devices.
Signed-off-by: Wen He <[email protected]>
Signed-off-by: Peng Ma <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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LS1088A has a 48-bit address size so make sure that the
dma-ranges property reflects this.
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The fsl-mc node should sit under the soc node, so move it to
its proper location.
Fixes: ac7c9ff741fb ("arm64: dts: ls1088a: add fsl-mc hardware resource manager node")
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.
Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.
Update cooling maps to include all devices affected by individual trip
points.
Signed-off-by: Viresh Kumar <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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LS1028A contains two ARM v8 CortexA72 processor cores
with 32 KB L1-D cache and 48 KB L1-I cache
Features summary
Two 32-bit / 64-bit ARM v8 Cortex-A72 CPUs
- Arranged as single clusters of two cores sharing a 1 MB L2 cache
- Speed Up to 1.3 GHz
- Support for cluster power-gating.
Cache coherent interconnect (CCI-400)
- Hardware-managed data coherency
- Up to 400 MHz
32-bit DDR4 SDRAM memory controller with ECC
Two PCIe 3.0 controllers
One serial ATA (SATA 3.0) controller
Two high-speed USB 3.0 controllers with integrated PHY
Following levels of DTSI/DTS files have been created for the LS1028A
SoC family:
- fsl-ls1028a.dtsi:
DTS-Include file for NXP LS1028A SoC.
- fsl-ls1028a-qds.dts:
DTS file for NXP LS1028A QDS board.
- fsl-ls1028a-rdb.dts:
DTS file for NXP LS1028A RDB board
Signed-off-by: Sudhanshu Gupta <[email protected]>
Signed-off-by: Rai Harninder <[email protected]>
Signed-off-by: Bhaskar Upadhaya <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Removed the wrong compatible string "snps,dw-pcie", in case
match incorrect driver.
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the status property disable the PCIe, the property will be enable
by bootloader.
Signed-off-by: Bao Xiaowei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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LS1012A-FRWY is an ls1012a based SoC board.
Key features of this board are Micro SD, USB 3.0,
upto 1GB DDR, UART
Signed-off-by: Pramod Kumar <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Move from dwc3-of-simple to dwc3-qcom glue driver to
support peripheral mode which requires qscratch wrapper
programming on VBUS event.
Fixes: a4333c3a6ba9 ("usb: dwc3: Add Qualcomm DWC3 glue driver")
Signed-off-by: Manu Gautam <[email protected]>
Tested-by: Vivek Gautam <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch sets the msm8998 xo clock name back to xo_board. Recent
clock tree changes fixed the clock tree and the change to the xo name
is causing issues where msm8998 boards do not boot properly. Let's
change it back and leave the xo label on it.
Fixes: 634da3307b08 (arm64: dts: qcom: msm8998: correct xo clock name)
Signed-off-by: Andy Gross <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Reviewed-by: Jeffrey Hugo <[email protected]>
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"arm,cortex-a15-pmu" is not a valid fallback compatible string for an
Cortex-A7 PMU, so drop it.
Cc: Maxime Ripard <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Acked-by: Will Deacon <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Technically the display-hub driver could access registers via the
specified region, though it practice it will do so via the display
controllers' register regions.
Signed-off-by: Thierry Reding <[email protected]>
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Technically the display-hub driver could access registers via the
specified region, though it practice it will do so via the display
controllers' register regions.
Signed-off-by: Thierry Reding <[email protected]>
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The RTC module on the A64 was claimed to be the same as on the A31, when
in fact it is not. It is actually compatible to the H3's RTC. The A64's
RTC has some extra crypto-related registers which the H3's does not, but
the exact function of these is not clear.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The device node for the internal oscillator is
removed, as it is internalized into the RTC device. Clock references to
the IOSC and LOSC are also fixed.
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Chen-Yu Tsai <[email protected]>
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The R40 has an RTC hardware block, which has additional registers
that are not related to RTC or clock functions, and is otherwise
compatible with the H3's RTC.
Add a device node for it, and fix up any references to the LOSC.
Acked-by: Maxime Ripard <[email protected]>
Tested-by: Corentin Labbe <[email protected]>
Signed-off-by: Chen-Yu Tsai <[email protected]>
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The RTC module on the H3 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The H5's RTC has some extra crypto-related registers compared to
the H3. Their exact functions are not clear. Also the RTC-VIO regulator
has different settings.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The device node for the internal oscillator is
removed, as it is internalized into the RTC device. Clock references to
the IOSC and LOSC are also fixed.
Acked-by: Maxime Ripard <[email protected]>
Tested-by: Corentin Labbe <[email protected]>
Signed-off-by: Chen-Yu Tsai <[email protected]>
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The RTC module on the A23 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The A33's RTC is the same as the A23.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The register range is also fixed.
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Chen-Yu Tsai <[email protected]>
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In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Signed-off-by: Rob Herring <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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Document the iW-RainboW-G20D-Qseven-RZG1N device tree bindings,
listing it as a supported board.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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Document the iW-RainboW-G20M-RZ/G1N Qseven device tree bindings,
listing it as a supported system on module.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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Arndale boards have wires for DSI and eDP panels, but in-kernel support
for eDP panels is broken for long time and breaks display support even on
boards with DSI panels.
Signed-off-by: Andrzej Hajda <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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Enable IOMMU for all SDHCI controllers in Tegra186.
Signed-off-by: Krishna Reddy <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The HDA controller can be used for audio playback over HDMI.
Signed-off-by: Thierry Reding <[email protected]>
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The CEC controller found on Tegra194 can be used to control consumer
devices using the HDMI CEC pin.
Signed-off-by: Thierry Reding <[email protected]>
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Enable the HDA controller on Jetson Xavier so that it can be used for
audio playback over HDMI.
Signed-off-by: Thierry Reding <[email protected]>
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The HDA controller found on Tegra194 can be used for audio playback over
HDMI.
Signed-off-by: Sameer Pujar <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The CEC controller found on Tegra186 can be used to control consumer
devices using the HDMI CEC pin.
Signed-off-by: Thierry Reding <[email protected]>
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Enable the HDA controller on Jetson TX2 so that it can be used for audio
playback over HDMI.
Signed-off-by: Thierry Reding <[email protected]>
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The HDA controller found on Tegra186 can be used for audio playback over
HDMI.
Signed-off-by: Thierry Reding <[email protected]>
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The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader
using a rk3188 soc. Add a devicetree for it.
Signed-off-by: Heiko Stuebner <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
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The rockpro64 does have hdmi support, so add the necessary
devicetree node to enable it.
Signed-off-by: Oskari Lemmela <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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Add the Video Processing Unit node for RK3288 SoC.
Fix the VPU IOMMU node, which was disabled and lacking
its power domain property.
Reviewed-by: Tomasz Figa <[email protected]>
Signed-off-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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Add the Video Processing Unit node for the RK3399 SoC.
Also, fix the VPU IOMMU node, which was disabled and lacking
its power domain property.
Reviewed-by: Tomasz Figa <[email protected]>
Signed-off-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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According to bindings/regulator/fixed-regulator.txt the 'clocks' and
'clock-names' properties are not valid ones.
In order to turn on the Wifi clock the correct location for describing
the CLKO2 clock is via a mmc-pwrseq handle, so do it accordingly.
Fixes: 56354959cfec ("ARM: dts: imx: add Boundary Devices Nitrogen7 board")
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Troy Kisky <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The R40 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
Acked-by: Maxime Ripard <[email protected]>
Tested-by: Corentin Labbe <[email protected]>
Signed-off-by: Chen-Yu Tsai <[email protected]>
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