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2020-11-21soc: ti: knav_dma: Fix a kernel function doc formatting issueLee Jones1-1/+1
Fixes the following W=1 kernel build warning(s): drivers/soc/ti/knav_dma.c:507: warning: Function parameter or member 'channel' not described in 'knav_dma_close_channel' Cc: Santosh Shilimkar <[email protected]> Cc: Sandeep Nair <[email protected]> Cc: Cyril Chemparathy <[email protected]> Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-21soc: ti: knav_qmss_queue: Fix a whole host of function documentation issuesLee Jones1-29/+30
Fixes the following W=1 kernel build warning(s): drivers/soc/ti/knav_qmss_queue.c:528: warning: Function parameter or member 'flags' not described in 'knav_queue_open' drivers/soc/ti/knav_qmss_queue.c:528: warning: Function parameter or member 'id' not described in 'knav_queue_open' drivers/soc/ti/knav_qmss_queue.c:528: warning: Function parameter or member 'name' not described in 'knav_queue_open' drivers/soc/ti/knav_qmss_queue.c:551: warning: Excess function parameter 'qh' description in 'knav_queue_close' drivers/soc/ti/knav_qmss_queue.c:551: warning: Function parameter or member 'qhandle' not described in 'knav_queue_close' drivers/soc/ti/knav_qmss_queue.c:583: warning: Excess function parameter 'qh' description in 'knav_queue_device_control' drivers/soc/ti/knav_qmss_queue.c:583: warning: Function parameter or member 'arg' not described in 'knav_queue_device_control' drivers/soc/ti/knav_qmss_queue.c:583: warning: Function parameter or member 'cmd' not described in 'knav_queue_device_control' drivers/soc/ti/knav_qmss_queue.c:583: warning: Function parameter or member 'qhandle' not described in 'knav_queue_device_control' drivers/soc/ti/knav_qmss_queue.c:635: warning: Excess function parameter 'data' description in 'knav_queue_push' drivers/soc/ti/knav_qmss_queue.c:635: warning: Excess function parameter 'qh' description in 'knav_queue_push' drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'dma' not described in 'knav_queue_push' drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'flags' not described in 'knav_queue_push' drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'qhandle' not described in 'knav_queue_push' drivers/soc/ti/knav_qmss_queue.c:635: warning: Function parameter or member 'size' not described in 'knav_queue_push' drivers/soc/ti/knav_qmss_queue.c:655: warning: Excess function parameter 'qh' description in 'knav_queue_pop' drivers/soc/ti/knav_qmss_queue.c:655: warning: Function parameter or member 'qhandle' not described in 'knav_queue_pop' drivers/soc/ti/knav_qmss_queue.c:655: warning: Function parameter or member 'size' not described in 'knav_queue_pop' drivers/soc/ti/knav_qmss_queue.c:759: warning: Function parameter or member 'name' not described in 'knav_pool_create' drivers/soc/ti/knav_qmss_queue.c:759: warning: Function parameter or member 'num_desc' not described in 'knav_pool_create' drivers/soc/ti/knav_qmss_queue.c:759: warning: Function parameter or member 'region_id' not described in 'knav_pool_create' drivers/soc/ti/knav_qmss_queue.c:862: warning: Excess function parameter 'pool' description in 'knav_pool_destroy' drivers/soc/ti/knav_qmss_queue.c:862: warning: Function parameter or member 'ph' not described in 'knav_pool_destroy' drivers/soc/ti/knav_qmss_queue.c:892: warning: Excess function parameter 'pool' description in 'knav_pool_desc_get' drivers/soc/ti/knav_qmss_queue.c:892: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_get' drivers/soc/ti/knav_qmss_queue.c:911: warning: Excess function parameter 'pool' description in 'knav_pool_desc_put' drivers/soc/ti/knav_qmss_queue.c:911: warning: Function parameter or member 'desc' not described in 'knav_pool_desc_put' drivers/soc/ti/knav_qmss_queue.c:911: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_put' drivers/soc/ti/knav_qmss_queue.c:931: warning: Excess function parameter 'pool' description in 'knav_pool_desc_map' drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'desc' not described in 'knav_pool_desc_map' drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'dma' not described in 'knav_pool_desc_map' drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'dma_sz' not described in 'knav_pool_desc_map' drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_map' drivers/soc/ti/knav_qmss_queue.c:931: warning: Function parameter or member 'size' not described in 'knav_pool_desc_map' drivers/soc/ti/knav_qmss_queue.c:956: warning: Excess function parameter 'pool' description in 'knav_pool_desc_unmap' drivers/soc/ti/knav_qmss_queue.c:956: warning: Function parameter or member 'dma' not described in 'knav_pool_desc_unmap' drivers/soc/ti/knav_qmss_queue.c:956: warning: Function parameter or member 'dma_sz' not described in 'knav_pool_desc_unmap' drivers/soc/ti/knav_qmss_queue.c:956: warning: Function parameter or member 'ph' not described in 'knav_pool_desc_unmap' drivers/soc/ti/knav_qmss_queue.c:975: warning: Excess function parameter 'pool' description in 'knav_pool_count' drivers/soc/ti/knav_qmss_queue.c:975: warning: Function parameter or member 'ph' not described in 'knav_pool_count' Cc: Santosh Shilimkar <[email protected]> Cc: Sandeep Nair <[email protected]> Cc: Cyril Chemparathy <[email protected]> Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-21soc: ti: knav_qmss_queue: Remove set but unchecked variable 'ret'Lee Jones1-2/+1
Fixes the following W=1 kernel build warning(s): drivers/soc/ti/knav_qmss_queue.c: In function ‘knav_setup_queue_pools’: drivers/soc/ti/knav_qmss_queue.c:1310:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable] Cc: Santosh Shilimkar <[email protected]> Cc: Sandeep Nair <[email protected]> Cc: Cyril Chemparathy <[email protected]> Signed-off-by: Lee Jones <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-21soc: ti: omap-prm: Do not check rstst bit on deassert if already deassertedTony Lindgren1-0/+4
If a rstctrl reset bit is already deasserted, we can just bail out early not wait for rstst to clear. Otherwise we can have deassert fail for already deasserted resets. Fixes: c5117a78dd88 ("soc: ti: omap-prm: poll for reset complete during de-assert") Signed-off-by: Tony Lindgren <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-21soc: ti: knav_qmss: fix reference leak in knav_queue_probeZhang Qilong1-0/+1
pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to pm_runtime_put_noidle will result in reference leak in knav_queue_probe, so we should fix it. Fixes: 41f93af900a20 ("soc: ti: add Keystone Navigator QMSS driver") Signed-off-by: Zhang Qilong <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-18dmaengine: imx-sdma: Remove unused .id_table supportFabio Estevam1-37/+1
Since 5.10-rc1 i.MX is a devicetree-only platform and the existing .id_table support in this driver was only useful for old non-devicetree platforms. Signed-off-by: Fabio Estevam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-18dmaengine: sun6i: Add support for A100 DMAYangtao Li1-0/+25
The dma of a100 is similar to h6, with some minor changes to support greater addressing capabilities. Add support for it. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/719852c6a9a597bd2e82d01a268ca02b9dee826c.1604988979.git.frank@allwinnertech.com Signed-off-by: Vinod Koul <[email protected]>
2020-11-18dt-bindings: dma: allwinner,sun50i-a64-dma: Add A100 compatibleYangtao Li1-1/+4
Add a binding for A100's dma controller. Signed-off-by: Yangtao Li <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/f15a18e9b8868e8853db1b5a3d1e411b0ac1c63a.1604988979.git.frank@allwinnertech.com Signed-off-by: Vinod Koul <[email protected]>
2020-11-18dt-bindings: dmaengine: Add X2000 bindings.周琰杰 (Zhou Yanjie)1-0/+54
Add the dmaengine bindings for the X2000 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-18dt-bindings: dmaengine: Add JZ4775 bindings.周琰杰 (Zhou Yanjie)1-0/+44
Add the dmaengine bindings for the JZ4775 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: pxa_dma: remove redundant irqsave and irqrestore in hardIRQBarry Song1-3/+2
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Acked-by: Robert Jarzmik <[email protected]> Cc: Daniel Mack <[email protected]> Cc: Haojian Zhuang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: ste_dma40: remove redundant irqsave and irqrestore in hardIRQBarry Song1-3/+2
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Cc: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: moxart-dma: remove redundant irqsave and irqrestore in hardIRQBarry Song1-3/+2
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: hisi_dma: remove redundant irqsave and irqrestore in hardIRQBarry Song1-3/+2
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Acked-by: Zhou Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: k3dma: remove redundant irqsave and irqrestore in hardIRQBarry Song1-5/+4
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: milbeaut-xdmac: remove redundant irqsave and irqrestore in hardIRQBarry Song1-3/+2
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: tegra210-adma: remove redundant irqsave and irqrestore in hardIRQBarry Song1-4/+3
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Acked-by: Jon Hunter <[email protected]> Cc: Laxman Dewangan <[email protected]> Cc: Thierry Reding <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: sf-pdma: remove redundant irqsave and irqrestore in hardIRQBarry Song1-6/+4
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Cc: Green Wan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: ti: k3-udma: remove redundant irqsave and irqrestore in hardIRQBarry Song1-6/+4
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: ipu_idmac: remove redundant irqsave and restore in hardIRQBarry Song1-6/+5
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: ti: k3-udma-glue: move psi-l pairing in channel en/dis functionsGrygorii Strashko1-26/+38
The NAVSS UDMA will stuck if target IP module is disabled by PM while PSI-L threads are paired UDMA<->IP and no further transfers is possible. This could be the case for IPs J721E Main CPSW (cpsw9g). Hence, to avoid such situation do PSI-L threads pairing only when UDMA channel is going to be enabled as at this time DMA consumer module expected to be active already. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: idma64: Switch to use __maybe_unused instead of ifdefferyAndy Shevchenko1-6/+2
ifdeffery is prone to errors and makes code harder to read. Switch to use __maybe_unused instead of ifdeffery. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: dw: Enable runtime PMAndy Shevchenko1-0/+6
When consumer requests channel power on the DMA controller device and otherwise on the freeing channel resources. Note, in some cases consumer acquires channel at the ->probe() stage and releases it at the ->remove() stage. It will mean that DMA controller device will be powered during all this time if there is no assist from hardware to idle it. The above mentioned cases should be investigated separately and individually. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Viresh Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: idxd: define table offset multiplierDave Jiang2-10/+9
Convert table offset multiplier magic number to a define. Signed-off-by: Dave Jiang <[email protected]> Link: https://lore.kernel.org/r/160407311690.839435.6941865731867828234.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <[email protected]>
2020-11-09dmaengine: idxd: Update calculation of group offset to be more readableDave Jiang2-7/+23
Create helper macros to make group offset calculation more readable. Signed-off-by: Dave Jiang <[email protected]> Link: https://lore.kernel.org/r/160407294683.839093.10740868559754142070.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <[email protected]>
2020-11-01soc: ti: k3-socinfo: Add entry for AM64X SoC familyPeter Ujfalusi1-0/+1
It's JTAG PARTNO is 0xBB38. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01soc: ti: k3-ringacc: Use correct device for allocation in RING modePeter Ujfalusi2-5/+18
In RING mode the ringacc does not access the ring memory. In this access mode the ringacc coherency does not have meaning. If the ring is configured in RING mode, then the ringacc itself will not access to the ring memory. Only the requester (user) of the ring is going to read/write to the memory. Extend the ring configuration parameters with a device pointer to be used for DMA API when the ring is configured in RING mode. Extending the ring configuration struct will allow per ring selection of device to be used for allocation, thus allowing per ring coherency. To avoid regression, fall back to use the ringacc dev in case the alloc_dev is not provided. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_opsPeter Ujfalusi2-79/+0
The ringacc driver has been converted to use the new set_cfg function to configure the ring, the old config ops can be removed. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01soc: ti: k3-ringacc: Use the ti_sci set_cfg callback for ring configurationPeter Ujfalusi1-47/+32
Switch to the new set_cfg to configure the ring. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01firmware: ti_sci: rm: Add new ops for ring configurationPeter Ujfalusi3-1/+100
The sysfw ring configuration message has been extended to include virtid and asel value for the ring. Add the ASEL_VALID to TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER as it is required for DMA rings. Instead of extending the current .config() ops - which would need same patch change in the ringacc driver - add ti_sci_msg_rm_ring_cfg struct and a new ops using it to configure the ring. This will allow easy update path in case new members are added for the ring configuration. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01firmware: ti_sci: rm: Remove ring_get_config supportPeter Ujfalusi3-130/+0
The ring_get_cfg (0x1111 message) is not used and it is not supported by sysfw for a long time. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01firmware: ti_sci: rm: Add support for extended_ch_type for tx channelPeter Ujfalusi3-0/+12
Sysfw added 'extended_ch_type' to the tx_ch_cfg_req message which should be used when BCDMA block copy channels are configured: extended_ch_type = 0 : the channel is split tx channel (tchan) extended_ch_type = 1 : the channel is block copy channel (bchan) Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01soc: ti: ti_sci_inta_msi: Add support for second range in resource rangesPeter Ujfalusi1-0/+12
Allocate MSI entries for both first and second range if they are valid Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01firmware: ti_sci: rm: Add support for second resource rangePeter Ujfalusi3-21/+43
Sysfw added support for a second range in the resource range API to be able to describe complex allocations mainly for DMA channels. Update the ti_sci part to consider the second range as well. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01firmware: ti_sci: Use struct ti_sci_resource_desc in get_range opsPeter Ujfalusi2-33/+31
Use the ti_sci_resource_desc directly and update it's start and num members directly instead of requiring individual parameters for them. This will allow easy extension of the RM parameters without changing API. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-11-01firmware: ti_sci: rm: Add support for tx_tdtype parameter for tx channelPeter Ujfalusi3-0/+10
The system controller's resource manager have support for configuring the TDTYPE of TCHAN_CFG register on j721e. With this parameter the teardown completion can be controlled: TDTYPE == 0: Return without waiting for peer to complete the teardown TDTYPE == 1: Wait for peer to complete the teardown Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Tero Kristo <[email protected]> Tested-by: Keerthy <[email protected]> Reviewed-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2020-10-30dmaengine: idxd: Add ABI documentation for shared wqDave Jiang1-0/+14
Add the sysfs attribute bits in ABI/stable for shared wq support. Signed-off-by: Jing Lin <[email protected]> Signed-off-by: Dave Jiang <[email protected]> Reviewed-by: Tony Luck <[email protected]> Reviewed-by: Dan Williams <[email protected]> Link: https://lore.kernel.org/r/160382008649.3911367.10851752182908509837.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: idxd: Clean up descriptors with fault errorDave Jiang3-12/+140
Add code to "complete" a descriptor when the descriptor or its completion address hit a fault error when SVA mode is being used. This error can be triggered due to bad programming by the user. A lock is introduced in order to protect the descriptor completion lists since the fault handler will run from the system work queue after being scheduled in the interrupt handler. Signed-off-by: Dave Jiang <[email protected]> Reviewed-by: Tony Luck <[email protected]> Reviewed-by: Dan Williams <[email protected]> Link: https://lore.kernel.org/r/160382008092.3911367.12766483427643278985.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: idxd: Add shared workqueue supportDave Jiang9-43/+398
Add shared workqueue support that includes the support of Shared Virtual memory (SVM) or in similar terms On Demand Paging (ODP). The shared workqueue uses the enqcmds command in kernel and will respond with retry if the workqueue is full. Shared workqueue only works when there is PASID support from the IOMMU. Signed-off-by: Dave Jiang <[email protected]> Reviewed-by: Tony Luck <[email protected]> Reviewed-by: Dan Williams <[email protected]> Link: https://lore.kernel.org/r/160382007499.3911367.26043087963708134.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: ppc4xx: remove xor_hw_desc assignment without readingKrzysztof Kozlowski1-2/+0
The xor_hw_desc local variable is assigned but never read: drivers/dma/ppc4xx/adma.c: In function ‘ppc440spe_desc_set_src_mult’: drivers/dma/ppc4xx/adma.c:562:17: warning: variable ‘xor_hw_desc’ set but not used [-Wunused-but-set-variable] Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: ppc4xx: make ppc440spe_adma_chan_list staticKrzysztof Kozlowski1-1/+1
The ppc440spe_adma_chan_list file-scope variable is not used outside of the unit so it can be made static. Reported-by: kernel test robot <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: at_xdmac: add AXI priority support and recommended settingsEugen Hristev1-0/+47
The sama7g5 version of the XDMAC supports priority configuration and outstanding capabilities. Add defines for the specific registers for this configuration, together with recommended settings. However the settings are very different if the XDMAC is a mem2mem or a per2mem controller. Thus, we need to differentiate according to device tree property. Signed-off-by: Eugen Hristev <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: at_xdmac: add support for sama7g5 based at_xdmacEugen Hristev1-26/+84
SAMA7G5 SoC uses a slightly different variant of the AT_XDMAC. Added support by a new compatible and a layout struct that copes to the specific version considering the compatible string. Only the differences in register map are present in the layout struct. I reworked the register access for this part that has the differences. Also the Source/Destination Interface bits are no longer valid for this variant of the XDMAC. Thus, the layout also has a bool for specifying whether these bits are required or not. Signed-off-by: Eugen Hristev <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: at_xdmac: adapt perid for mem2mem operationsEugen Hristev1-3/+3
The PERID in the CC register for mem2mem operations must match an unused PERID. The PERID field is 7 bits, but the selected value is 0x3f. On later products we can have more reserved PERIDs for actual peripherals, thus this needs to be increased to maximum size. Changing the value to 0x7f, which is the maximum for 7 bits field. Signed-off-by: Eugen Hristev <[email protected]> Reviewed-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dt-bindings: dmaengine: at_xdmac: add compatible with microchip,sama7g5Eugen Hristev1-1/+2
Add compatible to sama7g5 SoC. Signed-off-by: Eugen Hristev <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: pl330: Remove unreachable codeSurendran K1-2/+0
_setup_req(..) never returns negative value. Hence the condition ret < 0 is never met Signed-off-by: Surendran K <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: stm32-mdma: Use struct_size() in kzalloc()Gustavo A. R. Silva1-1/+1
Make use of the new struct_size() helper instead of the offsetof() idiom. Signed-off-by: Gustavo A. R. Silva <[email protected]> Link: https://lore.kernel.org/r/20201008141828.GA20325@embeddedor Signed-off-by: Vinod Koul <[email protected]>
2020-10-30dmaengine: idxd: fix wq config registers offset programmingDave Jiang4-17/+43
DSA spec v1.1 [1] updated to include a stride size register for WQ configuration that will specify how much space is reserved for the WQ configuration register set. This change is expected to be in the final gen1 DSA hardware. Fix the driver to use WQCFG_OFFSET() for all WQ offset calculation and fixup WQCFG_OFFSET() to use the new calculated wq size. [1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Signed-off-by: Dave Jiang <[email protected]> Link: https://lore.kernel.org/r/160383444959.48058.14249265538404901781.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <[email protected]>
2020-10-25Linux 5.10-rc1Linus Torvalds1-2/+2
2020-10-25treewide: Convert macro and uses of __section(foo) to __section("foo")Joe Perches117-196/+196
Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Conversion done using the script at: https://lore.kernel.org/lkml/[email protected]/2-convert_section.pl Signed-off-by: Joe Perches <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Reviewed-by: Miguel Ojeda <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
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