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2022-02-22drm/amdkfd: Fix criu_restore_bo error handlingFelix Kuehling1-2/+2
Clang static analysis reports this problem kfd_chardev.c:2327:2: warning: 1st function call argument is an uninitialized value kvfree(bo_privs); ^~~~~~~~~~~~~~~~ Make sure bo_buckets and bo_privs are initialized so freeing them in the error handling code path will never result in undefined behaviour. Fixes: 73fa13b6a511 ("drm/amdkfd: CRIU Implement KFD restore ioctl") Reported-by: Tom Rix <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Rajneesh Bhardwaj <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-22drm/amdkfd: Drop IH ring overflow message to dbgKent Russell1-1/+1
When this was first implemented, overflows weren't expected in regular operations, and tests weren't in place to cause said overflow. Now there are cases where overflows occur with real workloads, but we know that the kernel can handle this robustly, so move the message to a debug message. Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: add dm ip block for dcn 3.1.5Yifan Zhang1-0/+1
this patch adds dm ip block for dcn 3.1.5. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 DM SupportQingqing Zhuo2-1/+14
Add display manager support for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 COREQingqing Zhuo2-3/+18
DC core changes for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 blocks to MakefileQingqing Zhuo1-0/+1
Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 Command Table HelperQingqing Zhuo1-0/+1
Add vbios table support for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 ResourceQingqing Zhuo3-0/+2400
Add display resource management for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 DMUBQingqing Zhuo5-5/+139
Add support for the DMUB firmware for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 IRQQingqing Zhuo3-0/+480
Add irq interfaces for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 GPIOQingqing Zhuo7-0/+714
Add GPIO interfaces for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 CLK_MGRQingqing Zhuo6-2/+1141
Clk and SMU interfaces for DCN 3.1.5. Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/display: Add DCN315 family informationQingqing Zhuo2-0/+7
Signed-off-by: Qingqing Zhuo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/include: add DCN 3.1.5 registersQingqing Zhuo4-0/+192842
Add DCN 3.1.5 and DPCS 4.2.2 register headers. Signed-off-by: Qingqing Zhuo <[email protected]> Change-Id: I5588a1c422ae384cc76aa42380545dfc1aad1948 Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: add mp 13.0.5 header filesYifan Zhang2-0/+1127
This patch is to add mp 13.0.5 header files. v2: update headers Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/pm: add smu_v13_0_5_ppt implementationYifan Zhang8-1/+1183
this patch adds smu_v13_0_5_ppt implementation. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amd/pm: update smc message sequence for smu 13.0.5Yifan Zhang1-5/+29
this patch updates smc message sequence for smu 13.0.5. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/admgpu/pm: add smu 13.0.5 driver interface headersYifan Zhang3-0/+340
This patch is to add smu 13.0.5 driver interface headers. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: add support for psp 13.0.5Yifan Zhang3-0/+9
Enabl psp support for psp 13.0.5. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: add smuio support for smuio 13.0.10Yifan Zhang1-0/+1
this patch adds smuio support for smuio 13.0.10. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: add support for nbio 7.3.0Yifan Zhang2-0/+5
this patch adds support for nbio 7.3.0. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: enable vcn pg and cg for vcn 3.1.2Boyuan Zhang1-2/+7
Enable PG and CG for VCN/JPEG Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu/vcn: add vcn support for vcn 3.1.2Boyuan Zhang3-0/+10
Load VCN FW, set caps. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: add support for sdma 5.2.6Yifan Zhang2-1/+11
This patch adds support for sdma 5.2.6. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-18drm/amdgpu: do not enable asic reset for raven2Chen Gong1-2/+2
The GPU reset function of raven2 is not maintained or tested, so it should be very unstable. Now the amdgpu_asic_reset function is added to amdgpu_pmops_suspend, which causes the S3 test of raven2 to fail, so the asic_reset of raven2 is ignored here. Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)") Signed-off-by: Chen Gong <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdkfd: Use proper enum in pm_unmap_queues_v9()Nathan Chancellor1-1/+1
Clang warns: drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.c:267:3: error: implicit conversion from enumeration type 'enum mes_map_queues_extended_engine_sel_enum' to different enumeration type 'enum mes_unmap_queues_extended_engine_sel_enum' [-Werror,-Wenum-conversion] extended_engine_sel__mes_map_queues__sdma0_to_7_sel : ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Use 'extended_engine_sel__mes_unmap_queues__sdma0_to_7_sel' to eliminate the warning, which is the same numeric value of the proper type. Fixes: 009e9a158505 ("drm/amdkfd: navi2x requires extended engines to map and unmap sdma queues") Link: https://github.com/ClangBuiltLinux/linux/issues/1596 Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: add gc 10.3.6 supportYifan Zhang3-3/+91
this patch adds gc 10.3.6 support. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: add support for gmc10 for gc 10.3.6Yifan Zhang3-0/+5
this patch adds support for gmc10. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: add Clock and Power Gating support for gc 10.3.6Yifan Zhang1-2/+18
Add below supports: GFX Coarse Grain Clock Gating(CGCG) GFX Coarse grain light sleep/deep sleep(CGLS) GFX Medium Grain Clock Gating(MGCG) GFX Medium Grain light sleep/deep sleep(MGLS) GFX Fine Grain Clock Gating(FGCG) RLC MGLS CP MGLS MMHUB Clock Gating SDMA Clock Gating HDP Clock Gating ATHUB Clock Gating IH Clock Gating GFX Power Gating Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: add nv common init for gc 10.3.6Yifan Zhang2-0/+6
This patch adds add nv common init for gc 10.3.6. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu/smu11.5: restore cclks in vangogh_set_performance_levelAlex Deucher1-1/+19
When we disable manual clock setting, we need to restore the cclks as well as the gfxclk. Acked-by: Huang Rui <[email protected]> Acked-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: fix amdgpu_ras_block_late_init error handlerTom Rix1-6/+5
Clang build fails with amdgpu_ras.c:2416:7: error: variable 'ras_obj' is used uninitialized whenever 'if' condition is true if (adev->in_suspend || amdgpu_in_reset(adev)) { ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ amdgpu_ras.c:2453:6: note: uninitialized use occurs here if (ras_obj->ras_cb) ^~~~~~~ There is a logic error in the error handler's labels. ex/ The sysfs: is the last goto label in the normal code but is the middle of error handler. Rework the error handler. cleanup: is the first error, so it's handler should be last. interrupt: is the second error, it's handler is next. interrupt: handles the failure of amdgpu_ras_interrupt_add_hander() by calling amdgpu_ras_interrupt_remove_handler(). This is wrong, remove() assumes the interrupt has been setup, not torn down by add(). Change the goto label to cleanup. sysfs is the last error, it's handler should be first. sysfs: handles the failure of amdgpu_ras_sysfs_create() by calling amdgpu_ras_sysfs_remove(). But when the create() fails there is nothing added so there is nothing to remove. This error handler is not needed. Remove the error handler and change goto label to interrupt. Fixes: b293e891b057 ("drm/amdgpu: add helper function to do common ras_late_init/fini (v3)") Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Tom Rix <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Dynamically initialize IP instance attributesLuben Tuikov1-11/+6
Dynamically initialize IP instance attributes. This eliminates bugs stemming from adding new attributes to an IP instance. Cc: Alex Deucher <[email protected]> Reported-by: Tom StDenis <[email protected]> Fixes: 4d7ba312dd1f ("drm/amdgpu: Add "harvest" to IP discovery sysfs") Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd/amdgpu: Add APU flag to gca_config debugfs data (v3)Tom St Denis1-1/+4
Needed by umr to detect if ip discovered ASIC is an APU or not. (v2): Remove asic type from packet it's not strictly needed (v3): Correct comment Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd: Use amdgpu_device_should_use_aspm on navi umd pstate switchingMario Limonciello1-1/+2
The `program_aspm` callback is already guarded for aspm, but the `enable_aspm` callback doesn't follow the module parameter. Update it to use the helper `amdgpu_device_should_use_aspm`. Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd: Refactor `amdgpu_aspm` to be evaluated per deviceMario Limonciello9-9/+32
Evaluating `pcie_aspm_enabled` as part of driver probe has the implication that if one PCIe bridge with an AMD GPU connected doesn't support ASPM then none of them do. This is an invalid assumption as the PCIe core will configure ASPM for individual PCIe bridges. Create a new helper function that can be called by individual dGPUs to react to the `amdgpu_aspm` module parameter without having negative results for other dGPUs on the PCIe bus. Suggested-by: Lijo Lazar <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Fix ARM compilation warningLuben Tuikov1-1/+1
Fix this ARM warning: drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:664:35: warning: format '%ld' expects argument of type 'long int', but argument 4 has type 'size_t' {aka 'unsigned int'} [-Wformat=] Cc: Alex Deucher <[email protected]> Cc: [email protected] Cc: [email protected] Reported-by: kernel test robot <[email protected]> Fixes: a6c40b178092 ("drm/amdgpu: Show IP discovery in sysfs") Signed-off-by: Luben Tuikov <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd: Check if ASPM is enabled from PCIe subsystemMario Limonciello1-0/+3
commit 0064b0ce85bb ("drm/amd/pm: enable ASPM by default") enabled ASPM by default but a variety of hardware configurations it turns out that this caused a regression. * PPC64LE hardware does not support ASPM at a hardware level. CONFIG_PCIEASPM is often disabled on these architectures. * Some dGPUs on ALD platforms don't work with ASPM enabled and PCIe subsystem disables it Check with the PCIe subsystem to see that ASPM has been enabled or not. Fixes: 0064b0ce85bb ("drm/amd/pm: enable ASPM by default") Link: https://wiki.raptorcs.com/w/images/a/ad/P9_PHB_version1.0_27July2018_pub.pdf Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1723 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1739 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1885 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1907 Tested-by: [email protected] Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Remove redundant .ras_late_init initialization in some ras blocksyipechai4-9/+9
1. Define amdgpu_ras_block_late_init_default in amdgpu_ras.c as .ras_late_init common function, which is called when .ras_late_init of ras block isn't initialized. 2. Remove the code of using amdgpu_ras_block_late_init to initialize .ras_late_init in ras blocks. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: define amdgpu_ras_late_init to call all ras blocks' .ras_late_inityipechai7-59/+34
Define amdgpu_ras_late_init to call all ras blocks' .ras_late_init. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Optimize xxx_ras_late_init function of each ras blockyipechai9-18/+18
1. Move calling ras block instance members from module internal function to the top calling xxx_ras_late_init. 2. Module internal function calls can only use parameter variables of xxx_ras_late_init instead of ras block instance members. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Remove redundant calls of ras_late_init in mca ras blockyipechai4-30/+6
Remove redundant calls of ras_late_init in mca ras block. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Remove redundant calls of ras_late_init in mmhub ras blockyipechai4-8/+2
Remove redundant calls of ras_late_init in mmhub ras block. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Remove redundant calls of ras_late_init in hdp ras blockyipechai3-7/+2
Remove redundant calls of ras_late_init in hdp ras block. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu: Modify .ras_late_init function pointer parameteryipechai15-17/+17
Modify .ras_late_init function pointer parameter so that it can remove redundant intermediate calls in some ras blocks. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amdgpu/discovery: Add sw DM function for 3.1.6 DCEPrike Liang1-0/+1
Add 3.1.6 DCE IP and assign relevant sw DM function for the new DCE. Reviewed-by: Leo Li <[email protected]> Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd/display: Add DCN316 resource and SMU clock managerHansen Dsouza11-3/+3647
Add core DC implementation for DCN316. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Prike Liang <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Hansen Dsouza <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd/display: Add DMUB support for DCN316Leo Li6-1/+103
Initialize DMUB for DCN316. Use same funcs as DCN31 for DCN316. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Prike Liang <[email protected]> Signed-off-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd/display: configure dc hw resource for DCN 3.1.6Prike Liang9-4/+31
- set DC version - add construct/destroy dc clock management function - register dcn interrupt handler Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-17drm/amd/include: Add MP 13.0.8 register headersLeo Li2-0/+1013
Reviewed-by: Prike Liang <[email protected]> Signed-off-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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