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2021-09-03spi: rockchip: handle zero length transfers without timing outTobias Schramm1-0/+6
Previously zero length transfers submitted to the Rokchip SPI driver would time out in the SPI layer. This happens because the SPI peripheral does not trigger a transfer completion interrupt for zero length transfers. Fix that by completing zero length transfers immediately at start of transfer. Signed-off-by: Tobias Schramm <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-26spi: spi-zynq-qspi: use wait_for_completion_timeout to make ↵Quanyang Wang1-4/+4
zynq_qspi_exec_mem_op not interruptible The function wait_for_completion_interruptible_timeout will return -ERESTARTSYS immediately when receiving SIGKILL signal which is sent by "jffs2_gcd_mtd" during umounting jffs2. This will break the SPI memory operation because the data transmitting may begin before the command or address transmitting completes. Use wait_for_completion_timeout to prevent the process from being interruptible. Fixes: 67dca5e580f1 ("spi: spi-mem: Add support for Zynq QSPI controller") Signed-off-by: Quanyang Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-26spi: add sprd ADI for sc9863 and ums512Chunyan Zhang1-0/+2
This patch adds support for sc9863 and ums512. Signed-off-by: Chunyan Zhang <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-26spi: Convert sprd ADI bindings to yamlChunyan Zhang2-63/+102
Convert spi-sprd-adi.txt to yaml. Signed-off-by: Chunyan Zhang <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-26spi: sprd: Add ADI r3 supportChunyan Zhang1-50/+165
ADI r3p0 is used on SC9863 and UMS512 SoCs. Signed-off-by: Chunyan Zhang <[email protected]> Reviewed-by: Baolin Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-26spi: sprd: Fix the wrong WDG_LOAD_VALChunyan Zhang1-1/+1
Use 50ms as default timeout value and the time clock is 32768HZ. The original value of WDG_LOAD_VAL is not correct, so this patch fixes it. Fixes: ac1775012058 ("spi: sprd: Add the support of restarting the system") Signed-off-by: Chunyan Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-24spi: sprd: fill offset only to RD_CMD register for reading from slave deviceChunyan Zhang1-6/+5
RD_CMD can accept slave address offset only, higher bits are reserved. Writing the whole slave address including slave base seems unnecessary. Signed-off-by: Chunyan Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-24spi: sprd: Make sure offset not equal to slave address sizeChunyan Zhang1-1/+1
The slave register offset shouldn't equal to the max slave address which ADI can support to access. Signed-off-by: Chunyan Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-24spi: sprd: Pass offset instead of physical address to adi_read/_write()Chunyan Zhang1-61/+44
The register offset would be added a physical address base and then pass to the function sprd_adt_read()/_write() each time before calling them. So we can do that within these two functions instead, that would make the code more clear. Signed-off-by: Chunyan Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-23spi: rockchip-sfc: Fix assigned but never used return error codesColin Ian King1-2/+2
Currently there are two places where the error return variable ret is being assigned -ETIMEDOUT on timeout errors and this value is not being returned. Fix this by returning -ETIMEDOUT rather than redundantly assiging it to ret. Addresses-Coverity: ("Unused value") Fixes: 0b89fc0a367e ("spi: rockchip-sfc: add rockchip serial flash controller") Signed-off-by: Colin Ian King <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-23spi: rockchip-sfc: Remove redundant IO operationsJon Lin1-2/+2
Coherent dma buffer is uncached and memcpy is enough. Signed-off-by: Jon Lin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-20spi: stm32: fix excluded_middle.cocci warningskernel test robot1-2/+1
drivers/spi/spi-stm32.c:915:23-25: WARNING !A || A && B is equivalent to !A || B Condition !A || A && B is equivalent to !A || B. Generated by: scripts/coccinelle/misc/excluded_middle.cocci Fixes: 7ceb0b8a3ced ("spi: stm32: finalize message either on dma callback or EOT") CC: Alain Volmat <[email protected]> Reported-by: kernel test robot <[email protected]> Signed-off-by: kernel test robot <[email protected]> Reviewed-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/20210713191004.GA14729@5eb5c2cbef84 Signed-off-by: Mark Brown <[email protected]>
2021-08-18spi: tegra20-slink: remove spi_master_put() in tegra_slink_remove()Yang Yingliang1-2/+0
spi_master_put() is already called in spi_unregister_master(), or it will lead a double decrement refcount. Reported-by: Hulk Robot <[email protected]> Signed-off-by: Yang Yingliang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-17spi: rockchip-sfc: add rockchip serial flash controllerChris Morgan3-0/+707
Add the rockchip serial flash controller (SFC) driver. Signed-off-by: Chris Morgan <[email protected]> Signed-off-by: Jon Lin <[email protected]> Tested-by: Peter Geis <[email protected]> Tested-by: Chris Morgan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-17spi: rockchip-sfc: Bindings for Rockchip serial flash controllerChris Morgan1-0/+91
Add bindings for the Rockchip serial flash controller. New device specific parameter of rockchip,sfc-no-dma included in documentation. Signed-off-by: Chris Morgan <[email protected]> Signed-off-by: Jon Lin <[email protected]> Tested-by: Peter Geis <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-12spi: mxic: add missing bracesYang Yingliang1-1/+2
Fix the following waring: drivers/spi/spi-mxic.c: In function ‘mxic_spi_mem_exec_op’: drivers/spi/spi-mxic.c:401:3: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation] if (op->data.dir == SPI_MEM_DATA_IN) ^~ drivers/spi/spi-mxic.c:403:4: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’ if (op->data.dtr) ^~ Signed-off-by: Yang Yingliang <[email protected]> Reviewed-by: Zhengxun Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-10spi: spi-pic32: Fix issue with uninitialized dma_slave_configTony Lindgren1-0/+1
Depending on the DMA driver being used, the struct dma_slave_config may need to be initialized to zero for the unused data. For example, we have three DMA drivers using src_port_window_size and dst_port_window_size. If these are left uninitialized, it can cause DMA failures. For spi-pic32, this is probably not currently an issue but is still good to fix though. Fixes: 1bcb9f8ceb67 ("spi: spi-pic32: Add PIC32 SPI master driver") Cc: Purna Chandra Mandal <[email protected]> Cc: Peter Ujfalusi <[email protected]> Cc: Vinod Koul <[email protected]> Signed-off-by: Tony Lindgren <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-10spi: spi-fsl-dspi: Fix issue with uninitialized dma_slave_configTony Lindgren1-0/+1
Depending on the DMA driver being used, the struct dma_slave_config may need to be initialized to zero for the unused data. For example, we have three DMA drivers using src_port_window_size and dst_port_window_size. If these are left uninitialized, it can cause DMA failures. For spi-fsl-dspi, this is probably not currently an issue but is still good to fix though. Fixes: 90ba37033cb9 ("spi: spi-fsl-dspi: Add DMA support for Vybrid") Cc: Sanchayan Maity <[email protected]> Cc: Vladimir Oltean <[email protected]> Cc: Peter Ujfalusi <[email protected]> Cc: Vinod Koul <[email protected]> Signed-off-by: Tony Lindgren <[email protected]> Acked-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-09spi: mediatek: fix build warnning in set cs timingMason Zhang1-6/+6
this patch fixed the build warnning in set cs timing. Signed-off-by: Mason Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-09spi: mxic: patch for octal DTR mode supportZhengxun Li1-11/+30
Driver patch for octal DTR mode support. Owing to the spi_mem_default_supports_op() is not support dtr operation. Based on commit <539cf68cd51b> (spi: spi-mem: add spi_mem_dtr_supports_op()) add spi_mem_dtr_supports_op() to support dtr and keep checking the buswidth and command bytes. Signed-off-by: Zhengxun Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-09spi: tegra20-slink: Don't use resource-managed spi_register helperDmitry Osipenko1-1/+5
Don't use resource-managed spi_register helper to correct the driver removal order and make it to match the error unwinding order of the probe function. Signed-off-by: Dmitry Osipenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-09spi: tegra20-slink: Improve runtime PM usageDmitry Osipenko1-48/+25
The Tegra SPI driver supports runtime PM, which controls the clock enable state, but the clk is also enabled separately from the RPM at the driver probe time, and thus, stays always on. Fix it. Runtime PM now is always available on Tegra, hence there is no need to check the RPM presence in the driver anymore. Remove these checks. Signed-off-by: Dmitry Osipenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-05spi: modify set_cs_timing parameterMason Zhang3-52/+66
This patch modified set_cs_timing parameter, no need pass in spi_delay to set_cs_timing callback. By the way, we modified the mediatek and tegra114 spi driver to fix build err. In mediatek spi driver, We have support set absolute time not clk_count, and call this function in prepare_message not user's API. Signed-off-by: Mason Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-05spi: move cs spi_delay to spi_deviceMason Zhang2-14/+12
As we know, spi core layer has removed spi_set_cs_timing() API. So this patch moved spi_delay for cs_timing from spi_controller to spi_device, because cs timing should be set by spi_device but not controller. Signed-off-by: Mason Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-03Merge series "arm: ep93xx: CCF conversion" from Nikita Shubin ↵Mark Brown1-2/+2
<[email protected]>: This series series of patches converts ep93xx to Common Clock Framework. It consists of preparation patches to use clk_prepare_enable where it is needed, instead of clk_enable used in ep93xx drivers prior to CCF and a patch converting mach-ep93xx/clock.c to CCF. Link: https://lore.kernel.org/patchwork/cover/1445563/ Link: https://lore.kernel.org/patchwork/patch/1435884/ v1->v2: - added SoB Alexander Sverdlin (7): iio: ep93xx: Prepare clock before using it spi: spi-ep93xx: Prepare clock before using it Input: ep93xx_keypad: Prepare clock before using it video: ep93xx: Prepare clock before using it dmaengine: ep93xx: Prepare clock before using it ASoC: cirrus: i2s: Prepare clock before using it pwm: ep93xx: Prepare clock before using it Nikita Shubin (1): ep93xx: clock: convert in-place to COMMON_CLK arch/arm/Kconfig | 2 +- arch/arm/mach-ep93xx/clock.c | 975 ++++++++++++++----------- arch/arm/mach-ep93xx/core.c | 2 +- arch/arm/mach-ep93xx/soc.h | 42 +- drivers/dma/ep93xx_dma.c | 6 +- drivers/iio/adc/ep93xx_adc.c | 6 +- drivers/input/keyboard/ep93xx_keypad.c | 4 +- drivers/pwm/pwm-ep93xx.c | 12 +- drivers/spi/spi-ep93xx.c | 4 +- drivers/video/fbdev/ep93xx-fb.c | 4 +- sound/soc/cirrus/ep93xx-i2s.c | 12 +- 11 files changed, 605 insertions(+), 464 deletions(-) base-commit: 64376a981a0e2e57c46efa63197c2ebb7dab35df -- 2.26.2
2021-08-03spi: bcm2835aux: use 'unsigned int' instead of 'unsigned'Jason Wang1-2/+2
Prefer 'unsigned int' to bare use of 'unsigned'. Signed-off-by: Jason Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-03spi: spi-ep93xx: Prepare clock before using itAlexander Sverdlin1-2/+2
Use clk_prepare_enable()/clk_disable_unprepare() in preparation for switch to Common Clock Framework, otherwise the following is visible: WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:1011 clk_core_enable+0x9c/0xbc Enabling unprepared ep93xx-spi.0 ... Hardware name: Cirrus Logic EDB9302 Evaluation Board ... clk_core_enable clk_core_enable_lock ep93xx_spi_prepare_hardware __spi_pump_messages __spi_sync spi_sync spi_sync_transfer.constprop.0 regmap_spi_write _regmap_raw_write_impl _regmap_bus_raw_write _regmap_update_bits regmap_update_bits_base cs4271_component_probe snd_soc_component_probe soc_probe_component snd_soc_bind_card edb93xx_probe ... spi_master spi0: failed to prepare transfer hardware: -108 Signed-off-by: Alexander Sverdlin <[email protected]> Signed-off-by: Nikita Shubin <[email protected]> Acked-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-08-03spi: imx: Implement support for CS_WORDUwe Kleine-König1-0/+10
This only works when the native chipselect is in use. On a board with a Ti ADS7950 8 channel ADC. This patch reduces the time to read out all channels once from 280 us to 20 us. Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-22spi: pxa2xx: Adapt reset_sccr1() to the case when no message availableAndy Shevchenko1-3/+10
In some cases reset_sccr1() can be called when no message available. This means that there is no associated chip to receive that message and hence no threshold needs to be set. Adapt the function to such cases. Fixes: 3bbdc083262d ("spi: pxa2xx: Reuse int_stop_and_reset() in couple of places") Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-19Merge series "spi: fsi: Reduce max transfer size to 8 bytes" from Eddie ↵Mark Brown2-104/+22
James <[email protected]>: The security restrictions on the FSI-attached SPI controllers have been applied universally to all controllers, so the controller can no longer transfer more than 8 bytes for one transfer. Refactor the driver to remove the looping and support for larger transfers, and remove the "restricted" compatible string, as all the controllers are now considered restricted. Eddie James (2): spi: fsi: Reduce max transfer size to 8 bytes dt-bindings: fsi: Remove ibm,fsi2spi-restricted compatible .../devicetree/bindings/fsi/ibm,fsi2spi.yaml | 1 - drivers/spi/spi-fsi.c | 125 +++--------------- 2 files changed, 22 insertions(+), 104 deletions(-) -- 2.27.0
2021-07-19dt-bindings: fsi: Remove ibm,fsi2spi-restricted compatibleEddie James1-1/+0
Remove this compatible string from the FSI SPI controller documentation, since the security restrictions have been universally applied to the controllers. Signed-off-by: Eddie James <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-19spi: fsi: Reduce max transfer size to 8 bytesEddie James1-103/+22
Security changes have forced the SPI controllers to be limited to 8 byte reads. Refactor the sequencing to just handle 8 bytes at a time. Signed-off-by: Eddie James <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
2021-07-19spi: imx: Simplify logic in spi_imx_push()Uwe Kleine-König1-8/+3
For each usage of fifo_words it is clear if ->dynamic_burst is true or not. This can be used to simplify the function a bit. Signed-off-by: Uwe Kleine-König <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-19spi: pxa2xx: Reuse int_stop_and_reset() in couple of placesAndy Shevchenko1-9/+3
Reuse int_stop_and_reset() in couple of places. While at it, change the order of the int_stop_and_reset() and pxa2xx_spi_off() to be in align with the similar flow in int_error_stop(). Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-19spi: pxa2xx: Reset DMA bits in CR1 in reset_sccr1()Andy Shevchenko1-1/+1
In order to allow reset_sccr1() to be reused in DMA paths, reset DMA bits in CR1 in this function. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-19spi: pxa2xx: Convert reset_sccr1() to use pxa2xx_spi_update()Andy Shevchenko1-9/+7
Convert reset_sccr1() to use pxa2xx_spi_update(). It will help for further improvements. Signed-off-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-14spi: spi-geni-qcom: Remove confusing comment about setting the watermarkDouglas Anderson1-6/+0
The comment in setup_fifo_xfer() about setting the watermark wasn't quite proper grammar and also stopped making sense around commit 6d66507d9b55 ("spi: spi-geni-qcom: Don't wait to start 1st transfer if transmitting"). After that commit we actually start the transfer _before_ the watermark interrupt comes. I don't think the comment really has any value anymore. We've already got a comment when we grab the spinlock saying that our interrupt can come any time as a result of the things in the locked section. Let's just remove it. Signed-off-by: Douglas Anderson <[email protected]> Reviewed-by: Vinod Koul <[email protected]> Link: https://lore.kernel.org/r/20210712085010.1.Ie3bb9f9d30d6475bb75251d32635194c1c72b9ee@changeid Signed-off-by: Mark Brown <[email protected]>
2021-07-14spi: omap-spi: Convert to json-schemaAswath Govindraju2-48/+117
Convert omap-spi dt-binding documentation from txt to yaml format. Signed-off-by: Aswath Govindraju <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-14spi: mediatek: add tick_delay supportMason Zhang2-1/+11
This patch support tick_delay setting, some users need use high-speed spi speed, which can use tick_delay to tuning spi clk timing. Signed-off-by: Mason Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-12Merge series "spi: stm32: various fixes & cleanup" from Alain Volmat ↵Mark Brown1-78/+44
<[email protected]>: This series contains fixes & cleanup mainly regarding fifo and the way end of transfer triggered, when used with or without DMA. An additional patch cleans up the pm_runtime calls and another one enables the autosuspend. v2: - split pm_runtime fix patch into two - correct revert commit subject line Alain Volmat (6): spi: stm32: fixes pm_runtime calls in probe/remove spi: stm32: enable pm_runtime autosuspend spi: stm32h7: fix full duplex irq handler handling spi: stm32: Revert "properly handle 0 byte transfer" spi: stm32h7: don't wait for EOT and flush fifo on disable spi: stm32: finalize message either on dma callback or EOT Amelie Delaunay (1): spi: stm32h7: rework rx fifo read function drivers/spi/spi-stm32.c | 146 +++++++++++++++++----------------------- 1 file changed, 61 insertions(+), 85 deletions(-) -- 2.25.1
2021-07-11spi: mediatek: add no_need_unprepare supportMason Zhang1-7/+34
This patch add no_need_unprepare support for spi, if spi src clk is MAIN PLL, it can keep the clk_prepare and will not cause low power issue. So we no need do clk_prepare/clk_unprepare in runtime pm, and it will get better performance, because clk_prepare has called mutex lock. In the same way, clk_get_rate also has called mutex lock, so we moved it to spi_probe. Signed-off-by: Mason Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11spi: mediatek: update spi master bingdings for MT6893 SOCMason Zhang1-0/+1
this patch update spi master bingdings for MT6893 SOC. Signed-off-by: Mason Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11spi: <linux/spi/spi.h>: add missing struct kernel-doc entryRandy Dunlap1-1/+2
Fix kernel-doc warning in spi.h by adding the missing kernel-doc entry and also correct the original comment so that they both indicate the correct polarity of the flag. ../include/linux/spi/spi.h:673: warning: Function parameter or member 'devm_allocated' not described in 'spi_controller' Fixes: 794aaf01444d ("spi: Fix use-after-free with devm_spi_alloc_*") Signed-off-by: Randy Dunlap <[email protected]> Cc: William A. Kennington III <[email protected]> Cc: Mark Brown <[email protected]> Cc: [email protected] Cc: Lukas Wunner <[email protected]> Reviewed-by: Lukas Wunner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11spi: stm32: finalize message either on dma callback or EOTAlain Volmat1-37/+20
Depending on the usage, it is necessary to perform the finalize message operation either upon receiving the EOT interruption, eiher upon receiving the DMA callback. Indeed, when relying on DMA, even if the SPI EOT IT has been received, it is necessary to wait for the end of the DMA RX transaction before accessing to the data. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11spi: stm32h7: don't wait for EOT and flush fifo on disableAlain Volmat1-22/+2
In nominal cases, disable is called as part of the unprepare_message, after receiving a EOT and after receiving all data so it doesn't make sense to check for EOT and empty the FIFO. Moreover, at the end of the disable, the SPI is disable (SPE) leading to clear of all internal FIFO, leaving the IP in a known status. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11spi: stm32h7: rework rx fifo read functionAmelie Delaunay1-17/+13
Remove flush parameter and check RXWNE or RXPLVL when end of transfer flag is set. Signed-off-by: Amelie Delaunay <[email protected]> Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11spi: stm32: Revert "properly handle 0 byte transfer"Alain Volmat1-4/+0
0 byte transfer handling is now done within the core in code added by commit b306320322c9 ("spi: Skip zero-length transfers in spi_transfer_one_message()") This reverts commit 2269f5a8b1a7 ("spi: stm32: properly handle 0 byte transfer") Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11spi: stm32: enable pm_runtime autosuspendAlain Volmat1-0/+11
This commit enables the pm_runtime autosuspend and sets a 1ms autosuspend delay. Signed-off-by: Alain Volmat <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2021-07-11Merge existing fixes from spi/for-5.14Mark Brown2-26/+36
2021-07-11Linux 5.14-rc1Linus Torvalds1-2/+2