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2021-12-16drm/format-helper: Add drm_fb_xrgb8888_to_xrgb2101010_toio()Hector Martin2-0/+67
Add XRGB8888 emulation support for devices that can only do XRGB2101010. This is chiefly useful for simpledrm on Apple devices where the bootloader-provided framebuffer is 10-bit. Signed-off-by: Hector Martin <[email protected]> Reviewed-by: Thomas Zimmermann <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16of: Move simple-framebuffer device handling from simplefb to ofHector Martin2-20/+5
This code is required for both simplefb and simpledrm, so let's move it into the OF core instead of having it as an ad-hoc initcall in the drivers. Signed-off-by: Hector Martin <[email protected]> Reviewed-by: Rob Herring <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16drm/panel: simple: Add Team Source Display TST043015CMHX panelMarek Vasut1-0/+30
Add Team Source Display TST043015CMHX 4.3" 480x272 DPI panel support. Signed-off-by: Marek Vasut <[email protected]> Cc: Sam Ravnborg <[email protected]> To: [email protected] Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16dt-bindings: display: simple: Add Team Source Display TST043015CMHX panelMarek Vasut1-0/+2
Add Team Source Display TST043015CMHX 4.3" 480x272 DPI panel compatible string. Signed-off-by: Marek Vasut <[email protected]> Cc: Rob Herring <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: [email protected] To: [email protected] Acked-by: Rob Herring <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16dt-bindings: Add Team Source Display Technology vendor prefixMarek Vasut1-0/+2
Add vendor prefix for Team Source Display Technology Co., Ltd. Signed-off-by: Marek Vasut <[email protected]> Cc: Rob Herring <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: [email protected] To: [email protected] Acked-by: Rob Herring <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16drm/bridge: lvds-codec: Add support for pixel data sampling edge selectMarek Vasut1-0/+15
The OnSemi FIN3385 Parallel-to-LVDS encoder has a dedicated input line to select input pixel data sampling edge. Add DT property "pclk-sample", not the same as the one used by display timings but rather the same as used by media, and configure bus flags based on this DT property. Signed-off-by: Marek Vasut <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Rob Herring <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: [email protected] To: [email protected] Reviewed-by: Sam Ravnborg <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16dt-bindings: display: bridge: lvds-codec: Document pixel data sampling edge ↵Marek Vasut1-0/+18
select The OnSemi FIN3385 Parallel-to-LVDS encoder has a dedicated input line to select input pixel data sampling edge. Add DT property "pclk-sample", not the same as the one used by display timings but rather the same as used by media, to define the pixel data sampling edge. Signed-off-by: Marek Vasut <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Rob Herring <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: [email protected] To: [email protected] Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/i915/guc: Selftest for stealing of guc idsMatthew Brost3-5/+196
Testing the stealing of guc ids is hard from user space as we have 64k guc_ids. Add a selftest, which artificially reduces the number of guc ids, and forces a steal. The test creates a spinner which is used to block all subsequent submissions until it completes. Next, a loop creates a context and a NOP request each iteration until the guc_ids are exhausted (request creation returns -EAGAIN). The spinner is ended, unblocking all requests created in the loop. At this point all guc_ids are exhausted but are available to steal. Try to create another request which should successfully steal a guc_id. Wait on last request to complete, idle GPU, verify a guc_id was stolen via a counter, and exit the test. Test also artificially reduces the number of guc_ids so the test runs in a timely manner. v2: (John Harrison) - s/stole/stolen - Fix some wording in test description - Rework indexing into context array - Add test description to commit message - Fix typo in commit message (Checkpatch) - s/guc/(guc) in NUMBER_MULTI_LRC_GUC_ID v3: (John Harrison) - Set array value to NULL after extracting error - Fix a few typos in comments / error messages - Delete redundant comment in commit message Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: John Harrison <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/i915/guc: Kick G2H tasklet if no creditsMatthew Brost1-1/+8
Let's be paranoid and kick the G2H tasklet, which dequeues messages, if G2H credits are exhausted. Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: John Harrison <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/i915/guc: Add extra debug on CT deadlockMatthew Brost1-0/+9
Print CT state (H2G + G2H head / tail pointers, credits) on CT deadlock. v2: (John Harrison) - Add units to debug messages Reviewed-by: John Harrison <[email protected]> Signed-off-by: Matthew Brost <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/i915/guc: Don't hog IRQs when destroying contextsJohn Harrison1-17/+28
While attempting to debug a CT deadlock issue in various CI failures (most easily reproduced with gem_ctx_create/basic-files), I was seeing CPU deadlock errors being reported. This were because the context destroy loop was blocking waiting on H2G space from inside an IRQ spinlock. There no was deadlock as such, it's just that the H2G queue was full of context destroy commands and GuC was taking a long time to process them. However, the kernel was seeing the large amount of time spent inside the IRQ lock as a dead CPU. Various Bad Things(tm) would then happen (heartbeat failures, CT deadlock errors, outstanding H2G WARNs, etc.). Re-working the loop to only acquire the spinlock around the list management (which is all it is meant to protect) rather than the entire destroy operation seems to fix all the above issues. v2: (John Harrison) - Fix typo in comment message Signed-off-by: John Harrison <[email protected]> Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: Matthew Brost <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/i915/guc: Remove racey GEM_BUG_ONMatthew Brost1-2/+0
A full GT reset can race with the last context put resulting in the context ref count being zero but the destroyed bit not yet being set. Remove GEM_BUG_ON in scrub_guc_desc_for_outstanding_g2h that asserts the destroyed bit must be set in ref count is zero. Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Matthew Brost <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/i915/guc: Only assign guc_id.id when stealing guc_idMatthew Brost1-1/+1
Previously assigned whole guc_id structure (list, spin lock) which is incorrect, only assign the guc_id.id. Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking") Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: John Harrison <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/i915/guc: Use correct context lock when callig clr_context_registeredMatthew Brost1-2/+2
s/ce/cn/ when grabbing guc_state.lock before calling clr_context_registered. Fixes: 0f7976506de61 ("drm/i915/guc: Rework and simplify locking") Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-15drm/msm/disp: Tweak display snapshot to match gpu snapshotRob Clark2-5/+8
Add UTS_RELEASE and show timestamp the same way for consistency. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: add dpu_plane_atomic_print_stateDmitry Baryshkov1-0/+41
Implement plane's atomic_print_state() callback, printing DPU-specific plane state: blending stage, SSPP and multirect mode and index. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected] [DB: marked pdpu and pstate as const] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: add dpu_crtc_atomic_print_stateDmitry Baryshkov1-0/+15
Implement CRTC's atomic_print_state() callback, printing DPU-specific CRTC state (LM, CTL and DSPP ids). Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected] [DB: marked cstate as const] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dp: Fix double free on error in msm_dp_bridge_init()Dan Carpenter1-1/+0
The "dp_bridge" pointer is allocated with devm_kzalloc() so it will be freed automatically. Kfreeing it here will only lead to a double free. Fixes: 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable and disable") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/20211215114900.GD14552@kili Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: simplify DPU's regset32 codeDmitry Baryshkov3-64/+33
Squash dpu_debugfs_setup_regset32() into dpu_debugfs_create_regset32(). it makes little sense to have separate function to just setup the structure. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: stop manually removing debugfs files for the DPU CRTCDmitry Baryshkov2-14/+4
DRM code handles removing all debugfs recursively. Drop CRTC-specific code to perform that. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: stop manually removing debugfs files for the DPU planeDmitry Baryshkov1-18/+10
DRM code handles removing all debugfs recursively. Drop plane-specific code to perform that. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: drop plane's default_scaling debugfs fileDmitry Baryshkov1-5/+0
Proper support for the 'default_scaling' debugfs file was removed during DPU driver pre-merge cleanup. Remove leftover file. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: make danger_status/safe_status readableDmitry Baryshkov1-1/+1
Change \t to \n in the print format to stop putting all SSPP status in a single line. Splitting it to one SSPP per line is much more readable. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: fix safe status debugfs fileDmitry Baryshkov1-2/+2
Make safe_status debugfs fs file actually return safe status rather than danger status data. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/msm/dpu: move disable_danger out of plane subdirDmitry Baryshkov3-73/+77
The disable_danger debugfs file is not related to a single plane. Instead it is used by all registered planes. Move it from plane subtree to the global subtree next to danger_status and safe_status files, so that the new file supplements them. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-15drm/vc4: kms: Wait for the commit before increasing our clock rateMaxime Ripard1-8/+7
Several DRM/KMS atomic commits can run in parallel if they affect different CRTC. These commits share the global HVS state, so we have some code to make sure we run commits in sequence. This synchronization code is one of the first thing that runs in vc4_atomic_commit_tail(). Another constraints we have is that we need to make sure the HVS clock gets a boost during the commit. That code relies on clk_set_min_rate and will remove the old minimum and set a new one. We also need another, temporary, minimum for the duration of the commit. The algorithm is thus to set a temporary minimum, drop the previous one, do the commit, and finally set the minimum for the current mode. However, the part that sets the temporary minimum and drops the older one runs before the commit synchronization code. Thus, under the proper conditions, we can end up mixing up the minimums and ending up with the wrong one for our current step. To avoid it, let's move the clock setup in the protected section. Fixes: d7d96c00e585 ("drm/vc4: hvs: Boost the core clock during modeset") Signed-off-by: Maxime Ripard <[email protected]> Reviewed-by: Dave Stevenson <[email protected]> Tested-by: Jian-Hong Pan <[email protected]> [danvet: re-apply this from 0c980a006d3f ("drm/vc4: kms: Wait for the commit before increasing our clock rate") because I lost that part in my merge resolution in 99b03ca651f1 ("Merge v5.16-rc5 into drm-next")] Fixes: 99b03ca651f1 ("Merge v5.16-rc5 into drm-next") Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-12-14drm/i915: replace X86_FEATURE_PAT with pat_enabled()Lucas De Marchi2-6/+5
PAT can be disabled on boot with "nopat" in the command line. Replace one x86-ism with another, which is slightly more correct to prepare for supporting other architectures. Cc: Matt Roper <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-14drm/radeon: Fix syntax errors in commentsXiang wangx1-1/+1
Delete the redundant word 'we'. Reviewed-by: Christian König <[email protected]> Signed-off-by: Xiang wangx <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14amdgpu: fix some comment typosYann Dirson3-3/+3
Signed-off-by: Yann Dirson <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14amdgpu: fix some kernel-doc markupYann Dirson3-6/+6
Those are not today pulled by the sphinx doc, but better be ready. Signed-off-by: Yann Dirson <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14Documentation/gpu: include description of some of the GC microcontrollersYann Dirson1-0/+35
This is Alex' description from the "Looking for clarifications around gfx/kcq/kiq" thread, edited to fit as ReST. Original text: https://www.spinics.net/lists/amd-gfx/msg71383.html Originally-by: Alex Deucher <[email protected]> Signed-off-by: Yann Dirson <[email protected]> Acked-by: Harry Wentland <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14Documentation/gpu: include description of AMDGPU hardware structureYann Dirson2-0/+84
This describes in broad lines the how an AMD GPU is organized, in terms of hardware blocks. This is Alex' description from the "gpu block diagram" thread, edited to fit as ReST. Original text: https://www.spinics.net/lists/amd-gfx/msg71543.html Originally-by: Alex Deucher <[email protected]> Signed-off-by: Yann Dirson <[email protected]> Acked-by: Harry Wentland <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/pm: fix a potential gpu_metrics_table memory leakLang Yu1-0/+3
Memory is allocated for gpu_metrics_table in renoir_init_smc_tables(), but not freed in int smu_v12_0_fini_smc_tables(). Free it! Fixes: 95868b85764a ("drm/amd/powerplay: add Renoir support for gpu metrics export") Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/amdgpu: fix gmc bo pin count leak in SRIOVJingwen Chen2-0/+8
[Why] gmc bo will be pinned during loading amdgpu and reset in SRIOV while only unpinned in unload amdgpu [How] add amdgpu_in_reset and sriov judgement to skip pin bo v2: fix wrong judgement Signed-off-by: Jingwen Chen <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/amdgpu: fix psp tmr bo pin count leak in SRIOVJingwen Chen1-0/+4
[Why] psp tmr bo will be pinned during loading amdgpu and reset in SRIOV while only unpinned in unload amdgpu [How] add amdgpu_in_reset and sriov judgement to skip pin bo v2: fix wrong judgement Signed-off-by: Jingwen Chen <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/pm: Skip power state allocationLijo Lazar2-20/+0
Power states are not valid for arcturus and aldebaran, no need to allocate memory. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Yang Wang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amdgpu: correct the wrong cached state for GMC on PICASSOEvan Quan3-5/+18
Pair the operations did in GMC ->hw_init and ->hw_fini. That can help to maintain correct cached state for GMC and avoid unintention gate operation dropping due to wrong cached state. BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1828 Signed-off-by: Evan Quan <[email protected]> Acked-by: Guchun Chen <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amdgpu: use adev_to_drm to get drm_device pointerGuchun Chen1-1/+1
Updated for consistency when accessing drm_device from amdgpu driver. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amdgpu: move smu_debug_mask to a more proper placeEvan Quan4-16/+18
As the smu_context will be invisible from outside(of power). Also, the smu_debug_mask can be shared around all power code instead of some specific framework(swSMU) only. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amdgpu: SRIOV flr_work should use down_writeVictor Skvortsov2-4/+6
Host initiated VF FLR may fail if someone else is already holding a read_lock. Change from down_write_trylock to down_write to guarantee the reset goes through. Signed-off-by: Victor Skvortsov <[email protected]> Reviewed by: Shaoyun.liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: 3.2.166Aric Cyr1-1/+1
Tested-by: Daniel Wheeler <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: implement dc_mode_memclkMartin Leung14-7/+188
why: Need interface to lower clocks when in dc (power save) mode. Must be able to work with p_state unsupported cases Can cause flicker when OS notifies us of dc state change how: added dal3 interface for KMD added pathway to query smu for this softmax added blank before clock change to override underflow added logic to change clk based on pstatesupport and softmax added logic in prepare/optimize_bw to conform while changing clocks Reviewed-by: Aric Cyr <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Martin Leung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: ODM + MPO window on only one half of ODMEric Bernstein2-21/+71
[Why] For ODM + MPO window on one half of ODM, only 3 pipes should be allocated and scaling parameters adjusted to handle this case [How] Fix pipe allocation when MPO viewport is only on one side of ODM split, and modify scaling paramters. Added diags test cases for ODM + windows MPO, where MPO window is on right half, left half, and both halves or ODM. Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Eric Bernstein <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: Reset DMCUB before HW initNicholas Kazlauskas1-0/+5
[Why] If the firmware wasn't reset by PSP or HW and is currently running then the firmware will hang or perform underfined behavior when we modify its firmware state underneath it. [How] Reset DMCUB before setting up cache windows and performing HW init. Reviewed-by: Aurabindo Jayamohanan Pillai <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: [FW Promotion] Release 0.0.97Anthony Koo1-2/+2
Reviewed-by: Aric Cyr <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: Force det buf size to 192KB with 3+ streams and upscalingMichael Strauss1-0/+8
[WHY] This workaround resolves underflow caused by incorrect DST_Y_PREFETCH. Overriding to 192KB DET buf size until the DST_Y_PREFETCH calc is fixed. Reviewed-by: Eric Yang <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: parse and check PSR SU capsMikita Lipski3-13/+98
[why] Adding a function to read PSR capabilities and ALPM capabilities. Also adding a helper function to validate if the sink and the driver support PSR SU. [how] - isolated all PSR and ALPM reading calls to a separate funciton - set all required PSR caps - added a helper function to check if PSR SU is supported by sink and the driver Reviewed-by: Roman Li <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: Add src/ext ID info for dummy serviceSolomon Chiu1-4/+6
[Why] Current error log of dummy irq service doesn't have src/ext ID info in the log. [How] Add src/ext ID in ack/set of dummy irq service. Reviewed-by: Wayne Lin <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: Add debugfs entry for ILRWayne Lin1-0/+134
[Why & How] In order to know the intermediate link rates supported by the eDP panel and test to select the optimized link rate to save power, create a new debugfs entry "ilr_setting" for setting ILR. Reviewed-by: Aurabindo Jayamohanan Pillai <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-14drm/amd/display: Set exit_optimized_pwr_state for DCN31Nicholas Kazlauskas1-0/+1
[Why] SMU now respects the PHY refclk disable request from driver. This causes a hang during hotplug when PHY refclk was disabled because it's not being re-enabled and the transmitter control starts on dc_link_detect. [How] We normally would re-enable the clk with exit_optimized_pwr_state but this is only set on DCN21 and DCN301. Set it for dcn31 as well. This fixes DMCUB timeouts in the PHY. Fixes: 64b1d0e8d500 ("drm/amd/display: Add DCN3.1 HWSEQ") Reviewed-by: Eric Yang <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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