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2021-12-16drm/msm/dp: remove unneeded variableChangcheng Deng1-2/+1
Remove unneeded variable used to store return value. Reported-by: Zeal Robot <[email protected]> Signed-off-by: Changcheng Deng <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-16drm/msm: Don't use autosuspend for displayRob Clark4-8/+8
No functional change, as we only actually enable autosuspend for the GPU device. But lets not encourage thinking that autosuspend is a good idea for anything display related. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-16drm/msm/debugfs: Add display/kms state snapshotRob Clark1-0/+75
Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-16drm/msm/disp: Export helper for capturing snapshotRob Clark2-7/+30
We'll re-use this for debugfs. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2021-12-16Merge drm/drm-next into drm-misc-nextThomas Zimmermann1567-16648/+30522
Backmerging for v5.16-rc5. Resolves a conflict between drm-misc-next and drm-misc-fixes in the vc4 driver. Signed-off-by: Thomas Zimmermann <[email protected]>
2021-12-16drm/tegra: Add back arm_iommu_detach_device()Dmitry Osipenko1-0/+15
DMA buffers of 2D/3D engines aren't mapped properly when CONFIG_ARM_DMA_USE_IOMMU=y. The memory management code of Tegra DRM driver has a longstanding overhaul overdue and it's not obvious where the problem is in this case. Hence let's add back the old workaround which we already had sometime before. It explicitly detaches DRM devices from the offending implicit IOMMU domain. This fixes a completely broken 2d/3d drivers in case of ARM32 multiplatform kernel config. Cc: [email protected] Fixes: fa6661b7aa0b ("drm/tegra: Optionally attach clients to the IOMMU") Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16gpu: host1x: Add back arm_iommu_detach_device()Dmitry Osipenko1-0/+15
Host1x DMA buffer isn't mapped properly when CONFIG_ARM_DMA_USE_IOMMU=y. The memory management code of Host1x driver has a longstanding overhaul overdue and it's not obvious where the problem is in this case. Hence let's add back the old workaround which we already had sometime before. It explicitly detaches Host1x device from the offending implicit IOMMU domain. This fixes a completely broken Host1x DMA in case of ARM32 multiplatform kernel config. Cc: [email protected] Fixes: af1cbfb9bf0f ("gpu: host1x: Support DMA mapping of buffers") Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Consolidate runtime PM management of older UAPI codepathDmitry Osipenko5-43/+14
Move runtime PM management of older UAPI code paths into the common place. This removes boilerplate code from client drivers. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: submit: Remove pm_runtime_enabled() checksDmitry Osipenko1-10/+6
Runtime PM is now universally available, make it mandatory by removing the pm_runtime_enabled() checks. Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: nvdec: Stop channel on suspendDmitry Osipenko1-11/+18
CDMA must be stopped before hardware is suspended. Add channel stopping to RPM suspend callback. Add system level suspend-resume callbacks. Runtime PM initialization is moved to host1x client init phase because RPM callback now uses host1x channel that is available only when host1x client is registered. Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: vic: Stop channel on suspendDmitry Osipenko1-18/+18
CDMA must be stopped before hardware is suspended. Add channel stopping to RPM suspend callback. Add system level suspend-resume callbacks. Runtime PM initialization is moved to host1x client init phase because RPM callback now uses host1x channel that is available only when host1x client is registered. Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: gr3d: Support generic power domain and runtime PMDmitry Osipenko1-58/+305
Add runtime power management and support generic power domains. Reviewed-by: Ulf Hansson <[email protected]> Tested-by: Peter Geis <[email protected]> # Ouya T30 Tested-by: Paul Fertser <[email protected]> # PAZ00 T20 Tested-by: Nicolas Chauvet <[email protected]> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <[email protected]> # Ouya T30 Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: gr2d: Support generic power domain and runtime PMDmitry Osipenko1-36/+148
Add runtime power management and support generic power domains. Reviewed-by: Ulf Hansson <[email protected]> Tested-by: Peter Geis <[email protected]> # Ouya T30 Tested-by: Paul Fertser <[email protected]> # PAZ00 T20 Tested-by: Nicolas Chauvet <[email protected]> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <[email protected]> # Ouya T30 Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: hdmi: Add OPP supportDmitry Osipenko1-4/+11
The HDMI on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now HDMI driver must use OPP API for driving the controller's clock rate because OPP API takes care of reconfiguring the domain's performance state based on HDMI clock rate. Add OPP support to the HDMI driver. Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: dc: Support OPP and SoC core voltage scalingDmitry Osipenko2-0/+81
Add OPP and SoC core voltage scaling support to the display controller driver. This is required for enabling system-wide DVFS on pre-Tegra186 SoCs. Reviewed-by: Ulf Hansson <[email protected]> Tested-by: Peter Geis <[email protected]> # Ouya T30 Tested-by: Paul Fertser <[email protected]> # PAZ00 T20 Tested-by: Nicolas Chauvet <[email protected]> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <[email protected]> # Ouya T30 Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: submit: Add missing pm_runtime_mark_last_busy()Dmitry Osipenko1-1/+3
Runtime PM auto-suspension doesn't work without pm_runtime_mark_last_busy(), add it. Cc: <[email protected]> Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16gpu: host1x: Add host1x_channel_stop()Dmitry Osipenko2-0/+9
Add host1x_channel_stop() which waits till channel becomes idle and then stops the channel hardware. This is needed for supporting suspend/resume by host1x drivers since the hardware state is lost after power-gating, thus the channel needs to be stopped before client enters into suspend. Tested-by: Peter Geis <[email protected]> # Ouya T30 Tested-by: Paul Fertser <[email protected]> # PAZ00 T20 Tested-by: Nicolas Chauvet <[email protected]> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <[email protected]> # Ouya T30 Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16gpu: host1x: Add initial runtime PM and OPP supportDmitry Osipenko6-56/+164
Add runtime PM and OPP support to the Host1x driver. For the starter we will keep host1x always-on because dynamic power management require a major refactoring of the driver code since lot's of code paths are missing the RPM handling and we're going to remove some of these paths in the future. Reviewed-by: Ulf Hansson <[email protected]> Tested-by: Peter Geis <[email protected]> # Ouya T30 Tested-by: Paul Fertser <[email protected]> # PAZ00 T20 Tested-by: Nicolas Chauvet <[email protected]> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <[email protected]> # Ouya T30 Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: vic: Handle tegra_drm_alloc() failureThierry Reding1-0/+2
This function can return one of several errors in an ERR_PTR()-encoded pointer, so make sure to propogate those on failure. Suggested-by: Robin Murphy <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16gpu: host1x: Add missing DMA API includeRobin Murphy1-0/+1
Host1x seems to be relying on picking up dma-mapping.h transitively from iova.h, which has no reason to include it in the first place. Fix the former issue before we totally break things by fixing the latter one. CC: Thierry Reding <[email protected]> CC: Mikko Perttunen <[email protected]> CC: [email protected] Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: vic: Fix DMA API misuseRobin Murphy1-4/+3
Upon failure, dma_alloc_coherent() returns NULL. If that does happen, passing some uninitialised stack contents to dma_mapping_error() - which belongs to a different API in the first place - has precious little chance of detecting it. Also include the correct header, because the fragile transitive inclusion currently providing it is going to break soon. Fixes: 20e7dce255e9 ("drm/tegra: Remove memory allocation from Falcon library") CC: Thierry Reding <[email protected]> CC: Mikko Perttunen <[email protected]> CC: [email protected] Signed-off-by: Robin Murphy <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: hdmi: Register audio CODEC on Tegra20Dmitry Osipenko2-11/+145
Tegra20 SoC supports only S/PDIF source for HDMI audio. Register ASoC HDMI S/PDIF CODEC for Tegra20, it will be linked with the S/PDIF CPU DAI. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: hdmi: Unwind tegra_hdmi_init() errorsDmitry Osipenko1-3/+12
Add missing error unwinding to tegra_hdmi_init(), for consistency. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Mark nvdec PM functions as __maybe_unusedArnd Bergmann1-2/+2
The resume helper is called conditionally and causes a harmless warning when stubbed out: drivers/gpu/drm/tegra/nvdec.c:240:12: error: 'nvdec_runtime_resume' defined but not used [-Werror=unused-function] 240 | static int nvdec_runtime_resume(struct device *dev) Mark both suspend and resume as __maybe_unused for consistency to avoid this warning. Fixes: e76599df354d ("drm/tegra: Add NVDEC driver") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Mark nvdec_writel() as inlineArnd Bergmann1-1/+2
Without CONFIG_IOMMU_API, the nvdec_writel() function is unused, causing a warning: drivers/gpu/drm/tegra/nvdec.c:48:13: error: 'nvdec_writel' defined but not used [-Werror=unused-function] 48 | static void nvdec_writel(struct nvdec *nvdec, u32 value, unsigned int offset) | ^~~~~~~~~~~~ As this is a trivial wrapper around an inline function, mark it as inline itself, which avoids the warning as well. Fixes: e76599df354d ("drm/tegra: Add NVDEC driver") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: dc: rgb: Allow changing PLLD rate on Tegra30+Dmitry Osipenko3-12/+65
Asus Transformer TF700T is a Tegra30 tablet device which uses RGB->DSI bridge that requires a precise clock rate in order to operate properly. Tegra30 has a dedicated PLL for each display controller, hence the PLL rate can be changed freely. Allow PLL rate changes on Tegra30+ for RGB output. Configure the clock rate before display controller is enabled since DC itself may be running off this PLL and it's not okay to change the rate of the active PLL that doesn't support dynamic frequency switching since hardware will hang. Tested-by: Maxim Schwalm <[email protected]> #TF700T Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Remove duplicate struct declarationWan Jiabing1-1/+0
struct tegra_dc is declared at 13rd line. The declaration here is unnecessary. Remove it. Signed-off-by: Wan Jiabing <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: vic: Use autosuspendMikko Perttunen1-0/+2
When going idle, it's not unlikely that more work will follow. As such, use autosuspend with a 500ms suspend delay. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: gr2d: Explicitly control module resetThierry Reding1-2/+31
As of commit 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks"), module resets are no longer automatically deasserted when the module clock is enabled. To make sure that the gr2d module continues to work, we need to explicitly control the module reset. Fixes: 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks") Signed-off-by: Thierry Reding <[email protected]>
2021-12-16gpu: host1x: select CONFIG_DMA_SHARED_BUFFERArnd Bergmann1-0/+1
Linking fails when dma-buf is disabled: ld.lld: error: undefined symbol: dma_fence_release >>> referenced by fence.c >>> gpu/host1x/fence.o:(host1x_syncpt_fence_enable_signaling) in archive drivers/built-in.a >>> referenced by fence.c >>> gpu/host1x/fence.o:(host1x_fence_signal) in archive drivers/built-in.a >>> referenced by fence.c >>> gpu/host1x/fence.o:(do_fence_timeout) in archive drivers/built-in.a Fixes: 687db2207b1b ("gpu: host1x: Add DMA fence implementation") Signed-off-by: Arnd Bergmann <[email protected]> Reviewed-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16gpu: host1x: Drop excess kernel-doc entry @keyRandy Dunlap1-1/+0
Fix kernel-doc warning in host1x: ../drivers/gpu/host1x/bus.c:774: warning: Excess function parameter 'key' description in '__host1x_client_register' Fixes: 0cfe5a6e758f ("gpu: host1x: Split up client initalization and registration") Signed-off-by: Randy Dunlap <[email protected]> Cc: Thierry Reding <[email protected]> Cc: [email protected] Cc: [email protected] Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: dc: rgb: Move PCLK shifter programming to CRTCDmitry Osipenko2-4/+6
Asus TF700T tablet uses TC358768 DPI->DSI bridge that sits between Tegra's DPI output and display panel input. Bridge requires to have stable PCLK output before RGB encoder is enabled because it uses PCLK by itself to clock internal logic and bridge is programmed before Tegra's encoder is enabled. Hence the PCLK clock shifter must be programmed when CRTC is enabled, otherwise clock is unstable and bridge hangs because of it. Move the shifter programming from RGB encoder into CRTC. Tested-by: Maxim Schwalm <[email protected]> #TF700T Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Bump VIC/NVDEC clock rates to FmaxMikko Perttunen2-0/+12
To get full performance out of these engines, bump their clock rates to maximum. In the future we may want something smarter but this should be fine for now. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Add NVDEC driverMikko Perttunen6-1/+491
Add support for booting and using NVDEC on Tegra210, Tegra186 and Tegra194 to the Host1x and TegraDRM drivers. Booting in secure mode is not currently supported. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Support asynchronous commits for cursorThierry Reding1-4/+76
This adds support for asynchronously updating the cursor plane, which enables support for the legacy cursor IOCTLs. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Propagate errors from drm_gem_plane_helper_prepare_fb()Thierry Reding1-1/+4
Currently this function doesn't return an error, but that may change in the future, so make sure to propagate any error codes that it might return. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Do not reference tegra_plane_funcs directlyThierry Reding1-2/+2
Instead of referencing the tegra_plane_funcs struct directly, use each plane's vtable instead. This makes it more future-proof in case any of the planes ever use a different set of functions. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Implement buffer object cacheThierry Reding9-17/+141
This cache is used to avoid mapping and unmapping buffer objects unnecessarily. Mappings are cached per client and stay hot until the buffer object is destroyed. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/tegra: Implement correct DMA-BUF semanticsThierry Reding9-288/+268
DMA-BUF requires that each device that accesses a DMA-BUF attaches to it separately. To do so the host1x_bo_pin() and host1x_bo_unpin() functions need to be reimplemented so that they can return a mapping, which either represents an attachment or a map of the driver's own GEM object. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16Merge branch 'tegra-for-5.17-soc-opp' of ↵Thierry Reding2-0/+40
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into drm/tegra/for-next
2021-12-16soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()Dmitry Osipenko1-0/+15
Only couple drivers need to get the -ENODEV error code and majority of drivers need to explicitly initialize the performance state. Add new common helper which sets up OPP table for these drivers. Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16soc/tegra: Enable runtime PM during OPP state-syncingDmitry Osipenko1-0/+25
GENPD core now can set up domain's performance state properly while device is RPM-suspended. Runtime PM of a device must be enabled during setup because GENPD checks whether device is suspended and check doesn't work while RPM is disabled. Instead of replicating the boilerplate RPM-enable code around OPP helper for each driver, let's make OPP helper to take care of enabling it. Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16drm/bridge: ti-sn65dsi86: Set max register for regmapStephen Boyd1-0/+1
Set the maximum register to 0xff so we can dump the registers for this device in debugfs. Fixes: a095f15c00e2 ("drm/bridge: add support for sn65dsi86 bridge driver") Cc: Rob Clark <[email protected]> Cc: Douglas Anderson <[email protected]> Cc: Laurent Pinchart <[email protected]> Signed-off-by: Stephen Boyd <[email protected]> Reviewed-by: Robert Foss <[email protected]> Signed-off-by: Robert Foss <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16drm/ast: Move I2C code into separate source fileThomas Zimmermann4-129/+156
Move I2C code into its own source file. Makes the mode-setting code a little less convoluted. v3: * fix SPDX tag to say 'SPDX-License-Identifier' Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16drm/ast: Convert I2C code to managed cleanupThomas Zimmermann1-20/+16
Release the I2C adapter as part of the DRM device cleanup. Remove ast's dedicated helper for struct drm_connector_funcs.destroy. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16drm/ast: Handle failed I2C initialization gracefullyThomas Zimmermann1-7/+10
I2C initialization is allowed to fail. In this case, create a connector without DDC adapter. The current code would dereference a NULL pointer. Reading the modes from the connector is supposed to work without I2C adapter. Add the respective test. v2: * init edid to NULL to avoid uninitialized read (Dan) Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-16drm/vc4: plane: Add support for YUV color encodings and rangesDave Stevenson2-8/+82
The BT601/BT709 color encoding and limited vs full range properties were not being exposed, defaulting always to BT601 limited range. Expose the parameters and set the registers appropriately. Signed-off-by: Dave Stevenson <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-12-16drm/vc4: plane: Add support for DRM_FORMAT_P030Dave Stevenson1-31/+96
The P030 format, used with the DRM_FORMAT_MOD_BROADCOM_SAND128 modifier, is a format output by the video decoder on the BCM2711. Add native support to the KMS planes for that format. Signed-off-by: Dave Stevenson <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-12-16drm/fourcc: Add packed 10bit YUV 4:2:0 formatDave Stevenson2-0/+14
Adds a format that is 3 10bit YUV 4:2:0 samples packed into a 32bit word (with 2 spare bits). Supported on Broadcom BCM2711 chips. Signed-off-by: Dave Stevenson <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-12-16drm/simpledrm: Add [AX]RGB2101010 formatsHector Martin1-2/+2
This is the format used by the bootloader framebuffer on Apple ARM64 platforms. Reviewed-by: Thomas Zimmermann <[email protected]> Signed-off-by: Hector Martin <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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