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2015-09-04Merge tag 'vmwgfx-next-15-09-01' of ↵Dave Airlie2-1/+12
git://people.freedesktop.org/~thomash/linux into drm-next Pull request of 2015-09-01 A single commit. Workaround for https://bugzilla.redhat.com/show_bug.cgi?id=1227193 * tag 'vmwgfx-next-15-09-01' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Allow dropped masters render-node like access on legacy nodes v2
2015-09-04Merge branch 'exynos-drm-next' of ↵Dave Airlie5-156/+110
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next This is a last pull request, which includes two g2d patches I missed, and more cleanup series of Exynos drm driver. The cleanup series makes Exynos drm driver more simple, and removes unnecessary codes, and considers multiple plane format of framebuffer. I hope this not to be late. * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: remove buf_cnt from struct exynos_drm_fb drm/exynos: remove exynos_drm_fb_get_buf_cnt() drm/exynos: cleanup exynos_user_fb_create() drm/exynos: update exynos_drm_framebuffer_init() for multiple buffers drm/exynos: cleanup to get gem object for fb drm/exynos: update fb_info via only one function drm/exynos: cleanup exynos_drm_fbdev_update() drm/exynos: s/exynos_gem_obj/obj in exynos_drm_fbdev.c drm/exynos: remove exynos_drm_fb_set_buf_cnt() drm/exynos: remove superfluous checks in g2d_check_reg_offset() drm/exynos: fix size check in g2d_check_buf_desc_is_valid()
2015-09-04Merge branch 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie29-164/+360
into drm-next More fixes for radeon and amdgpu for 4.3: - Send full DP aux address fixes for radeon and amdgpu - Fix an HDMI display regression for pre-DCE5 parts - UVD suspend fixes for amdgpu - Add an rs480 suspend quirk - Fix bo reserve handling in amdgpu GEM_OP ioctl - GPU scheduler fixes - SDMA optimizations - MEC fix for Fiji * 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux: (21 commits) drm/amdgpu: set MEC doorbell range for Fiji drm/amdgpu: implement burst NOP for SDMA drm/amdgpu: add insert_nop ring func and default implementation drm/amdgpu: add amdgpu_get_sdma_instance helper function drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES drm/amdgpu: add burst_nop flag for sdma drm/amdgpu: add count field for the SDMA NOP packet v2 drm/amdgpu: use PT for VM sync on unmap drm/amdgpu: make wait_event uninterruptible in push_job drm/amdgpu: fix amdgpu_bo_unreserve order in GEM_OP IOCTL v2 drm/amdgpu: partially revert "modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()" v2 Add radeon suspend/resume quirk for HP Compaq dc5750. drm/amdgpu: re-work sync_resv drm/amdgpu/atom: Send out the full AUX address drm/radeon/native: Send out the full AUX address drm/radeon/atom: Send out the full AUX address drm/amdgpu: use IB for fill_buffer instead of direct command drm/amdgpu: stop trying to suspend UVD sessions v2 drm/amdgpu: add scheduler dependency callback v2 drm/amdgpu: let the scheduler work more with jobs v2 ...
2015-09-03drm/amdgpu: fix buffer placement under memory pressureChristian König1-1/+1
Some buffers (UVD/VM page tables) must be placed in VRAM, but the byte restriction for moving buffers didn't took this into account. Port of radeon commit 4b09556660bfe1b43d72ca858524c6baf2c6cb1d. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Jammy Zhou <[email protected]>
2015-09-03drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logicAlex Deucher1-2/+2
The logic was reversed. This feature is not enabled at the moment, but fix it now for the future. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-09-03drm/amdgpu: fix typo in dce11 watermark setupAlex Deucher1-1/+1
Using the wrong watermwark value for the secondary watermark. Copy paste typo. Noticed by Mykola. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-09-03drm/amdgpu: fix typo in dce10 watermark setupAlex Deucher1-1/+1
Using the wrong watermwark value for the secondary watermark. Copy paste typo. Noticed by Mykola. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-09-03drm/amdgpu: use top down allocation for non-CPU accessible vramAlex Deucher1-1/+1
Should help avoid fragmentation of vram due to CPU access requirements. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-09-03drm/amdgpu: be explicit about cpu vram access for driver BOs (v2)Alex Deucher12-20/+51
For kernel driver BOs, be explicit about whether we need vram access up front. This avoids unecessary migrations and avoids using visible vram for buffers were it's not needed. v2: line wrap fixes Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: set MEC doorbell range for FijiJammy Zhou1-1/+2
Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: implement burst NOP for SDMAJammy Zhou3-15/+86
Customize the insert_nop func for SDMA rings, and use burst NOP for ring/IB submissions in other places as well Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: add insert_nop ring func and default implementationJammy Zhou12-3/+36
The insert_nop function is added to amdgpu_ring_funcs structure as well as the default implementation Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: add amdgpu_get_sdma_instance helper functionJammy Zhou1-0/+15
This function is added to map the ring to sdma instance Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCESJammy Zhou1-1/+4
Remove the hardcoded usage Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: add burst_nop flag for sdmaJammy Zhou4-0/+7
The burst NOP is supported for SDMA when feature_version is >= 20. Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: add count field for the SDMA NOP packet v2Jammy Zhou3-0/+11
This is added to support the burst NOP v2: squash the typo fix Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-09-02drm/amdgpu: use PT for VM sync on unmapChristian König1-13/+6
Instead of the array which is used for ID management. Signed-off-by: Christian König <[email protected]> Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2015-09-02drm/amdgpu: make wait_event uninterruptible in push_jobChunming Zhou1-4/+3
with interruptible, the push_job maybe return -ERESTARTSYS, then result in push_job error. E.g. bug trace: [ 181.618860] *****amdgpu_copy_buffer:fence->seq:0x0000000048d8758b, contxt:1207959552, ref:683967304, r:-512 [ 181.618929] BUG: unable to handle kernel paging request at ffffffff811aa266 [ 181.625887] IP: [<ffffffff81548ffc>] reservation_object_add_excl_fence+0x3c/0x120 ... [ 181.859767] [<ffffffff811aa266>] ? unmap_mapping_range+0x66/0x110 [ 181.865928] [<ffffffffc0608ac1>] ttm_bo_move_accel_cleanup+0x41/0x3c0 [ttm] [ 181.872971] [<ffffffffc062d382>] amdgpu_move_blit.isra.18+0x122/0x150 [amdgpu] [ 181.880254] [<ffffffff811aa266>] ? unmap_mapping_range+0x66/0x110 [ 181.886420] [<ffffffffc062d709>] amdgpu_bo_move+0xa9/0x200 [amdgpu] [ 181.892753] [<ffffffffc0606e8d>] ttm_bo_handle_move_mem+0x26d/0x5c0 [ttm] Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]>
2015-09-02drm/amdgpu: fix amdgpu_bo_unreserve order in GEM_OP IOCTL v2Christian König1-1/+4
No copy_(to|from)_user while BO is reserved. v2: handle default path as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]>
2015-09-02drm/amdgpu: partially revert "modify amdgpu_fence_wait_any() to ↵Christian König3-43/+16
amdgpu_fence_wait_multiple()" v2 That isn't used any more. v2: rebase Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-09-02Add radeon suspend/resume quirk for HP Compaq dc5750.Jeffery Miller1-0/+8
With the radeon driver loaded the HP Compaq dc5750 Small Form Factor machine fails to resume from suspend. Adding a quirk similar to other devices avoids the problem and the system resumes properly. Signed-off-by: Jeffery Miller <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-09-02drm/amdgpu: re-work sync_resvChunming Zhou1-6/+18
sync_resv is to handle both amdgpu_fence and sched_fence. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Christian K?nig <[email protected]>
2015-09-02drm/amdgpu/atom: Send out the full AUX addressAlex Deucher1-1/+2
AUX addresses are 20 bits long. Send out the entire address instead of just the low 16 bits. Port of: drm/radeon/atom: Send out the full AUX address to amdgpu Reviewed-by: Jammy Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-09-02drm/exynos: remove buf_cnt from struct exynos_drm_fbJoonyoung Shim1-9/+0
Looking other drm drivers, there is no the restriction that framebuffer has only one buffer in .create_handle() callback. They use just first buffer. If this limitation is removed, there is no reason keeping buffer count for framebuffer, so we can remove buf_cnt from struct exynos_drm_fb. Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: remove exynos_drm_fb_get_buf_cnt()Joonyoung Shim3-13/+1
We can get buffer count of framebuffer using drm_format_num_planes(), so keeping exynos_drm_fb_get_buf_cnt() is unnecessary. Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: cleanup exynos_user_fb_create()Joonyoung Shim1-34/+13
Using exynos_drm_framebuffer_init(), redundant codes can be removed. Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: update exynos_drm_framebuffer_init() for multiple buffersJoonyoung Shim3-19/+25
This modifies exynos_drm_framebuffer_init() to be possible to support multiple buffers. Then it can be used by exynos_user_fb_create(). Signed-off-by: Joonyoung Shim <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: cleanup to get gem object for fbJoonyoung Shim1-15/+8
Current codes get first gem object and then again get remain gem objects. They can be unified to one routine. Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: update fb_info via only one functionJoonyoung Shim1-16/+13
This patch moves codes to update fb_info into exynos_drm_fbdev_update(), so fb_info is updated via only one function. Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: cleanup exynos_drm_fbdev_update()Joonyoung Shim1-11/+4
It can get exynos_gem object via function argument, so no need to call exynos_drm_fb_gem_obj() in exynos_drm_fbdev_update. It also can get struct drm_framebuffer *fb via helper->fb, so can remove a function argument for it. Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: s/exynos_gem_obj/obj in exynos_drm_fbdev.cJoonyoung Shim1-16/+14
The variable name "exynos_gem_obj" is too long, so some lines exceed 80 characters. It's simple to use "obj" instead of "exynos_gem_obj". Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: remove exynos_drm_fb_set_buf_cnt()Joonyoung Shim3-17/+3
The exynos_drm_fb_set_buf_cnt() is used to set buffer count only in exynos_drm_fbdev_update(). This patch sets directly buffer count in exynos_drm_framebuffer_init() without using exynos_drm_fb_set_buf_cnt(), so there is no any reason to keep exynos_drm_fb_set_buf_cnt(). Signed-off-by: Joonyoung Shim <[email protected]> Reviewed-by: Gustavo Padovan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: remove superfluous checks in g2d_check_reg_offset()Tobias Jakobi1-8/+0
The cases of the switch statement ensure that reg_type can never be REG_TYPE_NONE here. Signed-off-by: Tobias Jakobi <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/exynos: fix size check in g2d_check_buf_desc_is_valid()Tobias Jakobi1-10/+41
The size check was incomplete. It only computed the size of area of the drawing rectangle and checked if the size still fit inside the buffer. The correct check is to compute the position of the last byte that the G2D engine is going to access and then check if that position is still contained in the buffer. In particular we need the stride information to determine this. Signed-off-by: Tobias Jakobi <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2015-09-02drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4xVille Syrjälä1-1/+1
Pass the correct hpd[] array to intel_get_hpd_pins() on pre-g4x platforms. This got broken in the following commit: commit fd63e2a972c670887e5e8a08440111d3812c0996 Author: Imre Deak <[email protected]> Date: Tue Jul 21 15:32:44 2015 -0700 drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins Cc: Imre Deak <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Reviewed-by: Egbert Eich <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-02uapi/drm/i915_drm.h: fix userspace compilation.Artem Savkov1-1/+1
commit 346add7834557b5b9628b9bf2387106d42e631d4 Author: Daniel Vetter <[email protected]> Date: Tue Jul 14 18:07:30 2015 +0200 drm/i915: Use expcitly fixed type in compat32 structs changed the type of param field in drm_i915_getparam from int to s32. This header is exported to userspace and needs to use userspace type __s32 instead. This fixes userspace compilation errors like the following: include/drm/i915_drm.h:361:2: error: unknown type name 's32' s32 param; Signed-off-by: Artem Savkov <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-02drm/i915: Always mark the object as dirty when used by the GPUChris Wilson1-1/+1
There have been many hard to track down bugs whereby userspace forgot to flag a write buffer and then cause graphics corruption or a hung GPU when that buffer was later purged under memory pressure (as the buffer appeared clean, its pages would have been evicted rather than preserved and any changes more recent than in the backing storage would be lost). In retrospect this is a rare optimisation against memory pressure, already the slow path. If we always mark the buffer as dirty when accessed by the GPU, anything not used can still be evicted cheaply (ideal behaviour for mark-and-sweep eviction) but we do not run the risk of corruption. For correct read serialisation, userspace still has to notify when the GPU writes to an object. However, there are certain situations under which userspace may wish to tell white lies to the kernel... Signed-off-by: Chris Wilson <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Kristian Høgsberg <[email protected]> Cc: Jesse Barnes <[email protected]> Cc: "Goel, Akash" <[email protected]> Cc: Michał Winiarski <[email protected]> Cc: [email protected] Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-02drm/dp: Add dp_aux_i2c_speed_khz module param to set the assume i2c bus speedVille Syrjälä1-3/+10
To help with debugging i2c-over-aux issues, add a module parameter than can be used to tweak the assumed i2c bus speed, and thus the maximum number of retries we will do for each aux message. Cc: Simon Farnsworth <[email protected]> Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Simon Farnsworth <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-02drm/dp: Adjust i2c-over-aux retry count based on message size and i2c bus speedVille Syrjälä1-2/+82
Calculate the number of retries we should do for each i2c-over-aux message based on the time it takes to perform the i2c transfer vs. the aux transfer. We assume the shortest possible length for the aux transfer, and the longest possible (exluding clock stretching) for the i2c transfer. The DP spec has some examples on how to calculate this, but we don't calculate things quite the same way. The spec doesn't account for the retry interval (assumes immediate retry on defer), and doesn't assume the best/worst case behaviour as we do. Note that currently we assume 10 kHz speed for the i2c bus. Some real world devices (eg. some Apple DP->VGA dongle) fails with less than 16 retries. and that would correspond to something close to 15 kHz (with our method of calculating things) But let's just go for 10 kHz to be on the safe side. Ideally we should query/set the i2c bus speed via DPCD but for now this should at leaast remove the regression from the 1->16 byte trasnfer size change. And of course if the sink completes the transfer quicker this shouldn't slow things down since we don't change the interval between retries. I did a few experiments with a DP->DVI dongle I have that allows you to change the i2c bus speed. Here are the results of me changing the actual bus speed and the assumed bus speed and seeing when we start to fail the operation: actual i2c khz assumed i2c khz max retries 1 1 ok -> 2 fail 211 ok -> 106 fail 5 8 ok -> 9 fail 27 ok -> 24 fail 10 17 ok -> 18 fail 13 ok -> 12 fail 100 210 ok -> 211 fail 2 ok -> 1 fail So based on that we have a fairly decent safety margin baked into the formula to calculate the max number of retries. Fixes a regression with some DP dongles from: commit 1d002fa720738bcd0bddb9178e9ea0773288e1dd Author: Simon Farnsworth <[email protected]> Date: Tue Feb 10 18:38:08 2015 +0000 drm/dp: Use large transactions for I2C over AUX v2: Use best case for AUX and worst case for i2c (Simon Farnsworth) Add a define our AUX retry interval and account for it v3: Make everything usecs to avoid confusion about units (Daniel) Add a comment reminding people about the AUX bitrate (Daniel) Use DIV_ROUND_UP() since we're after the "worst" case for i2c Cc: Simon Farnsworth <[email protected]> Cc: [email protected] Tested-by: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91451 Reviewed-by: Simon Farnsworth <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-02drm/dp: Define AUX_RETRY_INTERVAL as 500 usVille Syrjälä1-3/+5
Currently we react to native and i2c defers by waiting either 400-500 us or 500-600 us, depending on which code path we take. Consolidate them all to one define AUX_RETRY_INTERVAL which defines the minimum interval. Since we've been using two different intervals pick the longer of them and define AUX_RETRY_INTERVAL as 500 us. For the maximum just use AUX_RETRY_INTERVAL+100 us. I want to have a define for this so that I can use it when calculating the estimated duration of i2c-over-aux transfers. Without a define it would be very easy to change the sleep duration and neglect to update the i2c-over-aux estimates. Cc: Simon Farnsworth <[email protected]> Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Simon Farnsworth <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-01i915: Set ddi_pll_sel in DP MST pathAnder Conselvan de Oliveira3-1/+7
The DP MST encoder config function never sets ddi_pll_sel, even though its value is programmed in its ->pre_enable() hook. That used to work because a new pipe_config was kzalloc'ed at every modeset, and the value of zero selects the highest clock for the PLL. Starting with the commit below, the value of ddi_pll_sel is preserved through modesets, and since the correct value wasn't properly setup by the MST code, it could lead to warnings and blank screens. commit 8504c74c7ae48b4b8ed1f1c0acf67482a7f45c93 Author: Ander Conselvan de Oliveira <[email protected]> Date: Fri May 15 11:51:50 2015 +0300 drm/i915: Preserve ddi_pll_sel when allocating new pipe_config Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91628 Cc: [email protected] # 7e6313a2516d drm/i915: Don't use link_bw for PLL setup Cc: [email protected] Cc: Timo Aaltonen <[email protected]> Cc: Luciano Coelho <[email protected]> Signed-off-by: Ander Conselvan de Oliveira <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-01drm/i915: Don't use link_bw for PLL setupVille Syrjälä2-29/+26
Use port_clock instead of link_bw when picking the PLL parameters for DP. link_bw may be zero with an eDP 1.4 sink that supports DP_LINK_RATE_SET so we shouldn't use it for anything other than feed it to the sink appropriately. v2: Fix typo in commit message (Sivakumar) Reviewed-by: Sivakumar Thulasimani <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> [Jani: cherry-picked from future.] Signed-off-by: Jani Nikula <[email protected]>
2015-09-01drm/vmwgfx: Allow dropped masters render-node like access on legacy nodes v2Thomas Hellstrom2-1/+12
Applications like gnome-shell may try to render after dropping master privileges. Since the driver should now be safe against this scenario, allow those applications to use their legacy node like a render node. v2: Add missing return statement. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2015-09-01drm/atomic: Fix bookkeeping with TEST_ONLY, v3.Maarten Lankhorst1-16/+23
Commit ec9f932ed41622d120de52a5b525e4d77b9ef17e "drm/atomic: Cleanup on error properly in the atomic ioctl." cleaned up some error paths, but didn't fix the TEST_ONLY path. In the check only case plane->fb shouldn't be updated, and the vblank events should be cleared as on failure. Changes since v1: - Fix -EDEADLK handling of vblank events too. - Free state last with CHECK_ONLY. Changes since v2: - Add comment about freeing crtc_state->event with TEST_ONLY. (Daniel Stone) Signed-off-by: Maarten Lankhorst <[email protected]> Reviewed-by: Daniel Stone <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-09-01drm/i915: Preserve SSC earlierLukas Wunner1-11/+18
Commit 92122789b2d6 ("drm/i915: preserve SSC if previously set v3") added code to intel_modeset_gem_init to override the SSC status read from VBT with the SSC status set by BIOS. However, intel_modeset_gem_init is invoked *after* intel_modeset_init, which calls intel_setup_outputs, which *modifies* SSC status by way of intel_init_pch_refclk. So unlike advertised, intel_modeset_gem_init doesn't preserve the SSC status set by BIOS but whatever intel_init_pch_refclk decided on. This is a problem on dual gpu laptops such as the MacBook Pro which require either a handler to switch DDC lines, or the discrete gpu to proxy DDC/AUX communication: Both the handler and the discrete gpu may initialize after the i915 driver, and consequently, an LVDS connector may initially seem disconnected and the SSC therefore is disabled by intel_init_pch_refclk, but on reprobe the connector may turn out to be connected and the SSC must then be enabled. Due to 92122789b2d6 however, the SSC is not enabled on reprobe since it is assumed BIOS disabled it while in fact it was disabled by intel_init_pch_refclk. Also, because the SSC status is preserved so late, the preserved value only ever gets used on resume but not on panel initialization: intel_modeset_init calls intel_init_display which indirectly calls intel_panel_use_ssc via multiple subroutines, *before* the BIOS value overrides the VBT value in intel_modeset_gem_init (intel_panel_use_ssc is the sole user of dev_priv->vbt.lvds_use_ssc). Fix this by moving the code introduced by 92122789b2d6 from intel_modeset_gem_init to intel_modeset_init before the invocation of intel_setup_outputs and intel_init_display. Add a DRM_DEBUG_KMS as suggested way back by Jani: http://lists.freedesktop.org/archives/intel-gfx/2014-June/046666.html Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115 Tested-by: Paul Hordiienko <[email protected]> [MBP 6,2 2010 intel ILK + nvidia GT216 pre-retina] Tested-by: William Brown <[email protected]> [MBP 8,2 2011 intel SNB + amd turks pre-retina] Tested-by: Lukas Wunner <[email protected]> [MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina] Tested-by: Bruno Bierbaumer <[email protected]> [MBP 11,3 2013 intel HSW + nvidia GK107 retina -- work in progress] Fixes: 92122789b2d6 ("drm/i915: preserve SSC if previously set v3") Signed-off-by: Lukas Wunner <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-08-31drm/i915/skl: Adding DDI_E power well domainXiong Zhang4-1/+7
From B spec, DDI_E port belong to PowerWell 2, but DDI_E share the powerwell_req/staus register bit with DDI_A which belong to DDI_A_E_POWER_WELL. In order to communicate with the connector on DDI-E, both DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled. Currently intel_dp_power_get(DDI_E) only enable DDI_A_E_POWER_WELL, this patch will not only enable DDI_a_E_POWER_WELL but also enable POWER_WELL_2. This patch also fix the DDI-E hotplug function. Signed-off-by: Xiong Zhang <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-08-31drm/radeon/native: Send out the full AUX addressAlex Deucher1-2/+2
AUX addresses are 20 bits long. Send out the entire address instead of just the low 16 bits. Port of: drm/radeon/atom: Send out the full AUX address to radeon non-atom aux path Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-08-31drm/radeon/atom: Send out the full AUX addressVille Syrjälä1-2/+3
AUX addresses are 20 bits long. Send out the entire address instead of just the low 16 bits. Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2015-08-31drm/i915: eDP can be present on DDI-ERodrigo Vivi2-9/+5
Enable eDP on DDI-E. Also let's remove duplicated definitions to avoid later confusion. Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Xiong Zhang <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
2015-08-31drm/i915/skl: Enable DDI-ERodrigo Vivi3-7/+18
There are OEMs using DDI-E out there, so let's enable it. Unfortunately there is no detection bit for DDI-E So we need to rely on VBT for that. I also need to give credits to Xiong since before seing his approach to check info->support_* I was creating an ugly vbt->ddie_sfuse_strap in order to propagate the ddi presence info v2: Rebased as last patch in the series. since all other patches in this series are needed for anything working propperly on DDI-E. Credits-to: "Zhang, Xiong Y" <[email protected]> Cc: "Zhang, Xiong Y" <[email protected]> Reviewed-by: Xiong Zhang <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]>
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