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2013-05-09MIPS: microMIPS: Floating point support.Leonid Yegoshin7-100/+893
Add logic needed to do floating point emulation in microMIPS mode. Signed-off-by: Leonid Yegoshin <[email protected]> Signed-off-by: Steven J. Hill <Steven. [email protected]>
2013-05-09MIPS: microMIPS: Fix macro naming in micro-assembler.Steven J. Hill2-2/+25
The macros did not properly take into account the ISA that the kernel was being compiled with. A classic MIPS kernel will have the standard 'uasm_i_##op' macro functions with 'MM_uasm_i_##op' macro functions for the microMIPS version. A pure microMIPS kernel will have the standard macros with 'CL_uasm_i_##op' macro functions for the classic version. Signed-off-by: Steven J. Hill <[email protected]>
2013-05-09MIPS: microMIPS: Fix incorrect mask for jump immediate.Steven J. Hill1-1/+2
Jump or branch target addresses have the first bit set. The original mask did not take this into account and will cause a field overflow warning for the target address when a jump immediate instruction is built. Signed-off-by: Steven J. Hill <[email protected]>
2013-05-09KVM/MIPS32: Binary patching of select privileged instructions.Sanjay Lal3-0/+209
Currently, the following instructions are translated: - CACHE (indexed) - CACHE (va based): translated to a SYNCI, overkill on D-CACHE operations, but still much faster than a trap. - mfc0/mtc0: the virtual COP0 registers for the guest are implemented as 2-D array. [COP#][SEL] and this is mapped into the guest kernel address space @ VA 0x0. mfc0/mtc0 operations are transformed to load/stores. Signed-off-by: Sanjay Lal <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Ralf Baechle <[email protected]>
2013-05-09KVM/MIPS32: Do not call vcpu_load when injecting interrupts.Sanjay Lal1-1/+1
Signed-off-by: Sanjay Lal <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Ralf Baechle <[email protected]>
2013-05-09ftrace: Have ftrace_regex_write() return either read or errorSteven Rostedt (Red Hat)1-1/+1
As ftrace_regex_write() reads the result of ftrace_process_regex() which can sometimes return a positive number, only consider a failure if the return is negative. Otherwise, it will skip possible other registered probes and by returning a positive number that wasn't read, it will confuse the user processes doing the writing. Cc: Masami Hiramatsu <[email protected]> Signed-off-by: Steven Rostedt <[email protected]>
2013-05-09tracing: Return error if register_ftrace_function_probe() fails for ↵Steven Rostedt (Red Hat)1-2/+9
event_enable_func() register_ftrace_function_probe() returns the number of functions it registered, which can be zero, it can also return a negative number if something went wrong. But event_enable_func() only checks for the case that it didn't register anything, it needs to also check for the case that something went wrong and return that error code as well. Added some comments about the code as well, to make it more understandable. Cc: Masami Hiramatsu <[email protected]> Signed-off-by: Steven Rostedt <[email protected]>
2013-05-09tracing: Don't succeed if event_enable_func did not register anythingMasami Hiramatsu1-1/+4
Return 0 instead of the number of activated ftrace function probes if event_enable_func succeeded and return an error code if it failed or did not register any functions. But it currently returns the number of registered functions and if it didn't register anything, it returns 0, but that is considered success. This also fixes the return value. As if it succeeds, it returns the number of functions that were enabled, which is returned back to the user in ftrace_regex_write (the write() return code). If only one function is enabled, then the return code of the write is one, and this can confuse the user program in thinking it only wrote 1 byte. Link: http://lkml.kernel.org/r/20130509054413.30398.55650.stgit@mhiramat-M0-7522 Cc: Srikar Dronamraju <[email protected]> Cc: Oleg Nesterov <[email protected]> Cc: Frederic Weisbecker <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Tom Zanussi <[email protected]> Signed-off-by: Masami Hiramatsu <[email protected]> [ Rewrote change log to reflect that this fixes two bugs - SR ] Signed-off-by: Steven Rostedt <[email protected]>
2013-05-09EDAC: Don't give write permission to read-only filesSrivatsa S. Bhat1-6/+6
I get the following warning on boot: ------------[ cut here ]------------ WARNING: at drivers/base/core.c:575 device_create_file+0x9a/0xa0() Hardware name: -[8737R2A]- Write permission without 'store' ... </snip> Drilling down, this is related to dynamic channel ce_count attribute files sporting a S_IWUSR mode without a ->store() function. Looking around, it appears that they aren't supposed to have a ->store() function. So remove the bogus write permission to get rid of the warning. Signed-off-by: Srivatsa S. Bhat <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]> Cc: <[email protected]> # 3.[89] [ shorten commit message ] Signed-off-by: Borislav Petkov <[email protected]>
2013-05-09bfin cache: dcplb map: add 16M dcplb map for BF60xSteven Miao4-9/+45
use 16M data cplb map on BF60x to avoid too much dcplb miss overhead cleanup cplb info Signed-off-by: Steven Miao <[email protected]>
2013-05-09KVM: emulator: emulate SALCPaolo Bonzini1-1/+5
This is an almost-undocumented instruction available in 32-bit mode. I say "almost" undocumented because AMD documents it in their opcode maps just to say that it is unavailable in 64-bit mode (sections "A.2.1 One-Byte Opcodes" and "B.3 Invalid and Reassigned Instructions in 64-Bit Mode"). It is roughly equivalent to "sbb %al, %al" except it does not set the flags. Use fastop to emulate it, but do not use the opcode directly because it would fail if the host is 64-bit! Reported-by: Jun'ichi Nomura <[email protected]> Cc: [email protected] # 3.9 Signed-off-by: Paolo Bonzini <[email protected]> Signed-off-by: Gleb Natapov <[email protected]>
2013-05-09KVM: emulator: emulate XLATPaolo Bonzini1-1/+14
This is used by SGABIOS, KVM breaks with emulate_invalid_guest_state=1. It is just a MOV in disguise, with a funny source address. Reported-by: Jun'ichi Nomura <[email protected]> Cc: [email protected] # 3.9 Signed-off-by: Paolo Bonzini <[email protected]> Signed-off-by: Gleb Natapov <[email protected]>
2013-05-09KVM: emulator: emulate AAMPaolo Bonzini1-1/+24
This is used by SGABIOS, KVM breaks with emulate_invalid_guest_state=1. AAM needs the source operand to be unsigned; do the same in AAD as well for consistency, even though it does not affect the result. Reported-by: Jun'ichi Nomura <[email protected]> Cc: [email protected] # 3.9 Signed-off-by: Paolo Bonzini <[email protected]> Signed-off-by: Gleb Natapov <[email protected]>
2013-05-09ARC: [mm] refactor the core (i|d)cache line ops loopsVineet Gupta1-29/+24
Nothing semantical * simplify the alignement code by using & operation only * rename variables clearly as paddr Signed-off-by: Vineet Gupta <[email protected]>
2013-05-09microblaze: Enable IRQ in arch_cpu_idleMichal Simek1-0/+5
Microblaze requires to enable IRQ in cpu_idle loop. It should be the part of this patch: "microblaze: Use generic idle loop" (sha1: e962bb9e9cf73b8c8893c95903e791dd5ec19fb4) Signed-off-by: Michal Simek <[email protected]>
2013-05-09ARC: [mm] serious bug in vaddr based icache flushVineet Gupta1-1/+1
vaddr used to index the cache was clipped from the wrong end, and thus would potentially fail to flush the correct lines. The problem was dorment for so long because up until the recent optimizations it was only used for ptrace break-point only flushes. Signed-off-by: Vineet Gupta <[email protected]>
2013-05-09xtensa: Switch to asm-generic/linkage.hGeert Uytterhoeven2-16/+1
Signed-off-by: Geert Uytterhoeven <[email protected]>
2013-05-09xtensa: fix redboot load addressChris Zankel1-1/+1
With the patch to support MMUv3, the base address for the loaded binary image has changed, and a fix was applied to the U-Boot image. This fixes the RedBoot image. Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: ISS: fix timer_lock usage in rs_openMax Filippov1-2/+2
This fixes the following lockdep splat: [ 66.460000] ================================= [ 66.460000] [ INFO: inconsistent lock state ] [ 66.460000] 3.9.0-rc5-00161-ga48dd49 #4 Not tainted [ 66.460000] --------------------------------- [ 66.460000] inconsistent {SOFTIRQ-ON-W} -> {IN-SOFTIRQ-W} usage. [ 66.460000] swapper/1 [HC0[0]:SC1[1]:HE1:SE0] takes: [ 66.460000] (timer_lock){+.?...}, at: [<d0006cde>] rs_poll+0x12/0xdc [ 66.460000] {SOFTIRQ-ON-W} state was registered at: [ 66.460000] [<d00421f0>] lock_acquire+0xec/0x13c [ 66.460000] [<d01ea036>] _raw_spin_lock+0x3a/0x84 [ 66.460000] [<d0006c8c>] rs_open+0x18/0x58 [ 66.460000] [<d0139ea2>] tty_open+0x262/0x3cc [ 66.460000] [<d00942e0>] chrdev_open+0x8c/0xe0 [ 66.460000] [<d00907b2>] do_dentry_open$isra$16+0x10e/0x190 [ 66.460000] [<d0091141>] finish_open+0x39/0x48 [ 66.460000] [<d009a0b4>] do_last$isra$34+0x6c4/0x824 [ 66.460000] [<d009a27a>] path_openat+0x66/0x310 [ 66.460000] [<d009a53a>] do_filp_open+0x16/0x44 [ 66.460000] [<d0091445>] do_sys_open+0xd5/0x13c [ 66.460000] [<d00914be>] sys_open+0x12/0x18 [ 66.460000] [<d0413ffc>] kernel_init_freeable+0xe4/0x12c [ 66.460000] [<d01e2a9c>] kernel_init+0xc/0x9c [ 66.460000] [<d00044fc>] ret_from_kernel_thread+0x8/0xc [ 66.460000] irq event stamp: 132542 [ 66.460000] hardirqs last enabled at (132542): [<d01ea2ec>] _raw_spin_unlock_irq+0x30/0x44 [ 66.460000] hardirqs last disabled at (132541): [<d01ea11e>] _raw_spin_lock_irq+0xe/0x8c [ 66.460000] softirqs last enabled at (132234): [<d0017d32>] __do_softirq+0x216/0x2a4 [ 66.460000] softirqs last disabled at (132539): [<d0018024>] irq_exit+0x38/0x40 [ 66.460000] [ 66.460000] other info that might help us debug this: [ 66.460000] Possible unsafe locking scenario: [ 66.460000] [ 66.460000] CPU0 [ 66.460000] ---- [ 66.460000] lock(timer_lock); [ 66.460000] <Interrupt> [ 66.460000] lock(timer_lock); [ 66.460000] [ 66.460000] *** DEADLOCK *** [ 66.460000] [ 66.460000] 1 lock held by swapper/1: [ 66.460000] #0: (((&serial_timer))){+.-...}, at: [<d001c65c>] call_timer_fn+0x0/0x1f0 [ 66.460000] Stack: d7c2fac0 00000018 00000004 00000001 d7c2faa0 00000004 00000006 d7c2fa90 9003e87c d7c2fae0 d7c30000 d025a87c 00000001 0000000f 00000000 d7c2fac0 9004005d d7c2fb10 d7c30000 d7c30338 00000001 00000001 00000000 d7c30338 [ 66.460000] Call Trace: [ 66.460000] [<d01e4f93>] print_usage_bug$part$26+0x1c3/0x1c8 [ 66.460000] [<d003e87c>] mark_lock+0x2b4/0x440 [ 66.460000] [<d004005d>] __lock_acquire+0x54d/0x16c4 [ 66.460000] [<d00421f0>] lock_acquire+0xec/0x13c [ 66.460000] [<d01ea036>] _raw_spin_lock+0x3a/0x84 [ 66.460000] [<d0006cde>] rs_poll+0x12/0xdc [ 66.460000] [<d001c71a>] call_timer_fn+0xbe/0x1f0 [ 66.460000] [<d001cd90>] run_timer_softirq+0x198/0x1f4 [ 66.460000] [<d0017c30>] __do_softirq+0x114/0x2a4 [ 66.460000] [<d0018024>] irq_exit+0x38/0x40 [ 66.460000] [<d00046c0>] do_IRQ+0x44/0x48 [ 66.460000] [<d0005c58>] do_interrupt+0x4c/0x54 [ 66.460000] [<d0003c80>] common_exception_return+0x0/0x5c [ 66.460000] [<d006682c>] free_pcppages_bulk+0x254/0x308 [ 66.460000] Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: disable IRQs while IRQ handler is runningMax Filippov3-55/+28
IRQ handlers are expected to run with IRQs disabled. See e.g. http://lwn.net/Articles/380931/ for a longer story. This was overlooked in the commit 2d1c645 xtensa: dispatch medium-priority interrupts Revert to old behavior and simplify interrupt entry and exit code. Interrupt handler still honours IRQ priority. do_notify_resume/schedule must be called with interrupts enabled, enable interrupts if we return from user exception. Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: enable lockdep supportMax Filippov1-3/+4
Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: fix arch_irqs_disabled_flags implementationMax Filippov1-1/+4
IRQs are disabled when PS.EXCM is set or PS.INTLEVEL is equal to or higher than LOCKLEVEL. Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: add irq flags trace supportMax Filippov2-0/+35
Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: provide custom CALLER_ADDR* implementationsMax Filippov2-1/+66
Definition of CALLER_ADDR* through __builtin_return_address makes compiler insert calls to __xtensa_libgcc_window_spill, which in turn makes fast_syscall_spill_registers syscall that clobbers registers when called from the kernel mode, leading to invalid opcode exceptions on return to userspace. Provide definition for CALLER_ADDR0 as MAKE_PC_FROM_RA(a0, a1) and in case CONFIG_FRAME_POINTER is enabled extract CALLER_ADDR{1-3} from stack. Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: add stacktrace supportMax Filippov5-41/+140
Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: clean up stpill_registersMax Filippov1-3/+2
- remove unused asm parameters; - fix EXCM bit setting in the PS SR during _spill_registers call. Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: don't use a7 in simcallsMax Filippov3-18/+18
To support FRAME_POINTER avoid using a7 in __simc (none of the existing simcalls needs it). Replace calls to __simc with more specific simc_read, simc_write and simc_lseek calls. Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: don't attempt to use unconfigured timersMax Filippov1-3/+6
Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: provide default platform_pcibios_init implementationMax Filippov2-6/+1
This fixes the following build error: arch/xtensa/kernel/built-in.o:(.init.literal+0xe8): undefined reference to `platform_pcibios_init' arch/xtensa/kernel/built-in.o: In function `setup_arch': (.init.text+0x20e): undefined reference to `platform_pcibios_init' and allows platform to omit definition of platform_pcibios_init if it's empty. Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: remove KCORE_ELF againPaul Bolle1-15/+0
The Kconfig symbol KCORE_ELF was removed in v2.6.0, but reappeared in two architectures. It is useless. Remove it again. Signed-off-by: Paul Bolle <[email protected]> Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: document MMUv3 setup sequenceMax Filippov1-0/+46
Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: add MMU v3 supportMax Filippov12-86/+451
MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB way 6: Way 6 (512 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0x00000000 0x00000000 0x01 0x03 RWX Bypass 0x20000000 0x20000000 0x01 0x03 RWX Bypass 0x40000000 0x40000000 0x01 0x03 RWX Bypass 0x60000000 0x60000000 0x01 0x03 RWX Bypass 0x80000000 0x80000000 0x01 0x03 RWX Bypass 0xa0000000 0xa0000000 0x01 0x03 RWX Bypass 0xc0000000 0xc0000000 0x01 0x03 RWX Bypass 0xe0000000 0xe0000000 0x01 0x03 RWX Bypass This patch adds remapping code at the reset vector or at the kernel _start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that reconfigures MMUv3 as MMUv2: Way 5 (128 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xd0000000 0x00000000 0x01 0x07 RWX WB 0xd8000000 0x00000000 0x01 0x03 RWX Bypass Way 6 (256 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xe0000000 0xf0000000 0x01 0x07 RWX WB 0xf0000000 0xf0000000 0x01 0x03 RWX Bypass Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: fix ibreakenable register updateMax Filippov4-0/+8
Only set the register when there is at least one ibreak register, otherwise the build fails: arch/xtensa/kernel/head.S:105: Error: invalid register 'ibreakenable' for 'wsr' instruction arch/xtensa/platforms/iss/setup.c:67: Error: invalid register 'ibreakenable' for 'wsr' instruction Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09xtensa: fix oprofile building as moduleMax Filippov2-3/+6
Signed-off-by: Max Filippov <[email protected]> Signed-off-by: Chris Zankel <[email protected]>
2013-05-09microblaze: Fix uaccess_ok macroMichal Simek1-11/+19
Fix access_ok macro no to permit case where user will try to access the last address space which is equal to segment address. Example: segment addr = 0xbfff ffff address = 0xbfff fff0 size = 0x10 Current wrong implementation 0xbfff ffff >= (0xbfff fff0 | 0x10 | (0xbfff fff0 + 0x10)) 0xbfff ffff >= (0xbfff fff0 | 0xc000 0000) 0xbfff ffff >= 0xf000 0000 return 0 which is access failed even the combination is valid. because get_fs().seq returns the last valid address. This patch fix this problem. Size equals to zero is valid access. Signed-off-by: Michal Simek <[email protected]>
2013-05-09microblaze: Add support for new cpu versions and target architectureMichal Simek1-0/+5
Update PVR values based on reference manual. Signed-off-by: Michal Simek <[email protected]>
2013-05-09microblaze: Do not select OPT_LIB_ASM by defaultMichal Simek1-1/+0
This option is valid only for BE systems. Signed-off-by: Michal Simek <[email protected]>
2013-05-09microblaze: Fix initrd supportMichal Simek1-4/+5
Initrd/ramdisk support has been never validated. Signed-off-by: Michal Simek <[email protected]>
2013-05-09microblaze: Do not use r6 in head.SMichal Simek1-10/+10
r6 stores pointer to ramdisk and shouldn't be used before it is passed to machine_early_init. Signed-off-by: Michal Simek <[email protected]>
2013-05-09microblaze: pci: Remove duplicated headerMichal Simek1-2/+0
Remove duplicated header. Signed-off-by: Michal Simek <[email protected]>
2013-05-09microblaze: Set the default irq_domainDan Christensen1-0/+2
Register the irq_domain created during initialization as the default so that device drivers can pass NULL to irq_create_mapping and get a virtual irq to pass to request_irq. Signed-off-by: Dan Christensen <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2013-05-09microblaze: pci: Remove duplicated include from pci-common.cWei Yongjun1-1/+0
Remove duplicated include. Signed-off-by: Wei Yongjun <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2013-05-09watchdog: Fix race condition in registration codeGuenter Roeck1-1/+2
A race condition exists when registering the first watchdog device. Sequence of events: - watchdog_register_device calls watchdog_dev_register - watchdog_dev_register creates the watchdog misc device by calling misc_register. At that time, the matching character device (/dev/watchdog0) does not yet exist, and old_wdd is not set either. - Userspace gets an event and opens /dev/watchdog - watchdog_open is called and sets wdd = old_wdd, which is still NULL, and tries to dereference it. This causes the kernel to panic. Seen with systemd trying to open /dev/watchdog immediately after it was created. Reported-by: Arkadiusz Miskiewicz <[email protected]> Signed-off-by: Guenter Roeck <[email protected]> Tested-by: Arkadiusz Miskiewicz <[email protected]> Signed-off-by: Wim Van Sebroeck <[email protected]>
2013-05-09watchdog: Convert to devm_ioremap_resource()Sachin Kamat4-17/+14
Use the newly introduced devm_ioremap_resource() instead of devm_request_and_ioremap() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages; so all explicit error messages can be removed from the failure code paths. Signed-off-by: Sachin Kamat <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Cc: Gabor Juhos <[email protected]> Cc: Paul Mundt <[email protected]> Signed-off-by: Wim Van Sebroeck <[email protected]>
2013-05-09KVM: VMX: fix halt emulation while emulating invalid guest sateGleb Natapov1-0/+6
The invalid guest state emulation loop does not check halt_request which causes 100% cpu loop while guest is in halt and in invalid state, but more serious issue is that this leaves halt_request set, so random instruction emulated by vm86 #GP exit can be interpreted as halt which causes guest hang. Fix both problems by handling halt_request in emulation loop. Reported-by: Tomas Papan <[email protected]> Tested-by: Tomas Papan <[email protected]> Reviewed-by: Paolo Bonzini <[email protected]> CC: [email protected] Signed-off-by: Gleb Natapov <[email protected]>
2013-05-09blackfin: smp: fix smp build after drop asm/system.hSteven Miao2-0/+3
Signed-off-by: Steven Miao <[email protected]>
2013-05-09blackfin: fix bootup core clock and system clock displayJames Cosin1-1/+1
From: James Cosin <[email protected]> fixes the number of digits to 6 after the decimal point to regain the significant 0s in the frequency after the decimal point. Signed-off-by: Steven Miao <[email protected]>
2013-05-08ARM: dts: Configure and fix the McSPI pins for 4430sdpTony Lindgren1-0/+12
The bootloader configures the pins, but has pull bits set without pull enable bits. While this is harmless, and won't do anything, it seems to cause confusion at least for me every time looking at the pin configuration. Fix it for DT based boot. Signed-off-by: Tony Lindgren <[email protected]>
2013-05-08ARM: dts: AM33XX: Add GPMC nodePhilip Avinash1-0/+12
Add GPMC data node to AM33XX device tree file. Signed-off-by: Philip Avinash <[email protected]> Acked-by: Peter Korsgaard <[email protected]> Signed-off-by: Pekon Gupta <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2013-05-08ARM: dts: OMAP4460: Fix CPU OPP voltagesNishanth Menon1-3/+3
commit d16fb25 (ARM: dts: OMAP4460: Add CPU OPP table) introduced wrong OPP voltages per OPP by mistake. Sync the OPP tables with existing OMAP4460 OPP data in arch/arm/mach-omap2/opp4xxx_data.c Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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