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Since we are using cached registers, we need to specify volatile
registers explicitly to avoid reading their value from the cache.
This allows to read the correct interrupt status in fsl_dcu_drm_irq
and clear the asserted bits only.
Signed-off-by: Stefan Agner <[email protected]>
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For state->fb or state->crtc may be NULL in fsl_dcu_drm_plane_atomic_check
function, if so, return 0.
Signed-off-by: Meng Yi <[email protected]>
Signed-off-by: Jianwei Wang <[email protected]>
Signed-off-by: Stefan Agner <[email protected]>
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Promote myself as new maintainer of the Freescale DCU DRM driver.
Acked-by: Jianwei Wang <[email protected]>
Signed-off-by: Stefan Agner <[email protected]>
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rcar-du updates.
* 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev: (281 commits)
drm: rcar-du: Add tri-planar memory formats support
drm: rcar-du: Add probe deferral debug messages
drm: rcar-du: lvds: Add R-Car Gen3 support
drm: rcar-du: lvds: Rename PLLEN bit to PLLON
drm: rcar-du: lvds: Fix PLL frequency-related configuration
drm: rcar-du: lvds: Avoid duplication of clock clamp code
drm: rcar-du: Add R8A7795 device support
drm: rcar-du: Output the DISP signal on the ODDF pin
drm: rcar-du: Output the DISP signal on the DISP pin
drm: rcar-du: Support up to 4 CRTCs
drm: rcar-du: Drop LVDS double dependency on OF
drm: rcar-du: Enable compilation on ARM64
drm: rcar-du: Fix compile warning on 64-bit platforms
drm: rcar-du: Expose the VSP1 compositor through KMS planes
drm: rcar-du: Move plane allocator to rcar_du_plane.c
drm: rcar-du: Restart the DU group when a plane source changes
drm: rcar-du: Add VSP1 compositor support
drm: rcar-du: Add VSP1 support to the planes allocator
drm: rcar-du: Refactor plane setup
drm: rcar-du: Compute plane DDCR4 register value directly
...
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Those formats are supported on Gen3 only.
Signed-off-by: Laurent Pinchart <[email protected]>
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Print a message when the HDMI I2C slave encoder can't be found to help
debugging probe deferral issues.
Signed-off-by: Laurent Pinchart <[email protected]>
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The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration.
Add support for the Gen3 LVDS PLL parameters and startup procedure.
Signed-off-by: Koji Matsuoka <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
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The bit is named PLLON in the datasheet, rename it.
Signed-off-by: Laurent Pinchart <[email protected]>
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The frequency checks don't match the datasheet, fix them.
Signed-off-by: Laurent Pinchart <[email protected]>
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Replace the duplicate code by a single central function.
Signed-off-by: Laurent Pinchart <[email protected]>
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Document the R8A7795-specific DT bindings and support them in the
driver. The HDMI and LVDS outputs are currently not supported.
Signed-off-by: Koji Matsuoka <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
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The ODDF signal, output by default on the ODDF pin, isn't used on any
board supported in the kernel. As the Gen3 Salvator-X board uses the
ODDF pin as a DISP signal, hardcode that configuration in the driver.
Use of the ODDF signal will be implemented later through proper DT-based
configuration of the DU pins.
Signed-off-by: Laurent Pinchart <[email protected]>
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The DE signal is currently configured to be identical to the DISP
signal and is used for the same purpose. To make it clearer that the
DISP pin outputs the DISP signal, select it explicitly.
Signed-off-by: Laurent Pinchart <[email protected]>
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The Gen3 R8A7795 DU has 4 CRTCs, support them all.
Signed-off-by: Koji Matsuoka <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
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LVDS support depends on DRM_RCAR_DU which already depends on OF. Drop
the explicit dependency.
Signed-off-by: Laurent Pinchart <[email protected]>
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The R8A7795 SoC is ARM64-based and include a DU. Enable driver
compilation on ARM64.
Signed-off-by: Koji Matsuoka <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
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Use %tu instead of %u to print difference between pointers.
Signed-off-by: Koji Matsuoka <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
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On R-Car Gen3 SoCs the DU lost its ability to access memory directly and
needs to work in conjunction with the VSP to do so. This commit handles
the VSP internally to hide it from the user.
Signed-off-by: Laurent Pinchart <[email protected]>
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The plane allocator is specific to DU planes and won't be used for
VSP-based planes, move it with the rest of the DU planes code where it
belongs.
Signed-off-by: Laurent Pinchart <[email protected]>
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Plane sources are configured by the VSPS bit in the PnDDCR4 register.
Although the datasheet states that the bit is updated during vertical
blanking, it seems that updates only occur when the DU group is held in
reset through the DSYSR.DRES bit. Restart the group if the source
changes.
Signed-off-by: Laurent Pinchart <[email protected]>
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Configure the plane source at plane setup time to source frames from
memory or from the VSP1.
Signed-off-by: Laurent Pinchart <[email protected]>
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The R8A7790 DU can source frames directly from the VSP1 devices VSPD0
and VSPD1. VSPD0 feeds DU0/1 plane 0, and VSPD1 feeds either DU2 plane 0
or DU0/1 plane 1.
Allocate the correct fixed plane when sourcing frames from VSPD0 or
VSPD1, and allocate planes in reverse index order otherwise to ensure
maximum availability of planes 0 and 1.
Signed-off-by: Laurent Pinchart <[email protected]>
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Rename plane setup functions using more explicit names, and use local
variables to store intermediate values to increase readability. This
also prepares for VSP compositor support.
Signed-off-by: Laurent Pinchart <[email protected]>
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There's no need for a read-modify-write pattern, all register bits can
be set explicitly.
Signed-off-by: Laurent Pinchart <[email protected]>
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A disabled CRTC can't display planes, the driver shouldn't try to
configure it when updating planes. The DRM core will store the plane
state for us, and the plane will be configured appropriately the next
time the CRTC is enabled.
Signed-off-by: Laurent Pinchart <[email protected]>
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The atomic framework guarantees that the CRTC enable and disable
functions will only be called when needed, there's no need to duplicate
the CRTC state check. By replacing the local CRTC enabled state check at
resume time with the CRTC active state we can remove the local CRTC
enabled state altogether.
Signed-off-by: Laurent Pinchart <[email protected]>
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The drm driver .load() operation is prone to race conditions as it
initializes the driver after registering the device nodes. Its usage is
deprecated, inline it in the probe function and call drm_dev_alloc() and
drm_dev_register() explicitly.
For consistency inline the .unload() handler in the remove function as
well.
Signed-off-by: Laurent Pinchart <[email protected]>
Acked-by: Daniel Vetter <[email protected]>
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drivers/media/platform/vsp1/vsp1_drm.c:47:5: warning: no previous prototype for 'vsp1_du_init' [-Wmissing-prototypes]
int vsp1_du_init(struct device *dev)
^
drivers/media/platform/vsp1/vsp1_drm.c:76:5: warning: no previous prototype for 'vsp1_du_setup_lif' [-Wmissing-prototypes]
int vsp1_du_setup_lif(struct device *dev, unsigned int width,
^
drivers/media/platform/vsp1/vsp1_drm.c:221:6: warning: no previous prototype for 'vsp1_du_atomic_begin' [-Wmissing-prototypes]
void vsp1_du_atomic_begin(struct device *dev)
^
drivers/media/platform/vsp1/vsp1_drm.c:273:5: warning: no previous prototype for 'vsp1_du_atomic_update' [-Wmissing-prototypes]
int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
^
drivers/media/platform/vsp1/vsp1_drm.c:451:6: warning: no previous prototype for 'vsp1_du_atomic_flush' [-Wmissing-prototypes]
void vsp1_du_atomic_flush(struct device *dev)
^
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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The IP version number carries enough information to identify the exact
device instance features. Drop the related DT properties and use the IP
version instead.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Display lists contain lists of registers and associated values to be
applied atomically by the hardware. They lower the pressure on interrupt
processing delays when reprogramming the device as settings can be
prepared well in advance and queued to the hardware without waiting for
the end of the current frame.
Display list support is currently limited to the DRM pipeline.
Signed-off-by: Koji Matsuoka <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Add DT compatible strings for the VSP2 instances found in the R-Car Gen3
SoCs and support them in the vsp1 driver.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Add two API functions named vsp1_du_atomic_begin() and
vsp1_du_atomic_flush() to signal the start and end of an atomic update.
The vsp1_du_setup_rpf() function is renamed to vsp1_du_atomic_update()
for consistency.
With this new API, the driver will reprogram all modified inputs
atomically before restarting the video stream.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Implement internal control of the VSP pipeline to be used by the DU
DRM/KMS driver when using the VSP as an internal composer handled
through DRM/KMS only.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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As the pipeline is configured internally by the driver when the
userspace API is disabled its configuration can be trusted and link
validation isn't needed.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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The RPF and WPF alpha values are set through V4L2 controls and applied
when starting the video stream by a call to v4l2_ctrl_handler_setup().
As that function uses the control handler mutex it can't be called in
interrupt context, where the VSP+DU pipeline handler might need to
reconfigure the pipeline.
Set the alpha value manually in the RPF and WPF s_stream handler to
ensure that the hardware is properly configured even when controlled
without the userspace API. If the userspace API is enabled protect that
with the control lock to avoid race conditions with userspace.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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The pipeline inputs array stores pointers to all RPFs contained in the
pipeline. It's currently indexed contiguously by adding RPFs in the
order they are found during graph walk. This can't easily support
dynamic addition and removal of RPFs while streaming, which will be
required for combined VSP+DU support.
Make the array indexed by RPF index instead and skip NULL elements when
iterating over RPFs.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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The R-Car Gen3 SoCs include VSP instances dedicated to the DU that will
be controlled entirely by the rcar-du-drm driver through the KMS API. To
support that use case make the userspace V4L2 API optional.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Format information and the related helper function are not specific to
the V4L2 API, move them from vsp1_video.c to vsp1_pipe.c.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Not all VSP instances have a BRU on R-Car Gen3, make it optional. Set
the feature unconditionally for now, this will be fixed when adding Gen3
support.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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The R-Car Gen3 family has 5-inputs BRUs, support them by making the
number of BRU inputs configurable.
As the driver assumes that the number of BRU inputs is equal to the
number of RPFs, replace the BRU_MAX_INPUTS macro with VSP1_MAX_RPF to
make the assumption apparent.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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The function will be used by the DU code, move it out of vsp1_video.c.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Several module read functions are not used, remove them.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Commit 58f896d859ce ("[media] v4l: vsp1: sru: Make the intensity
controllable during streaming") refactored the stream start code and
removed the SRU CTRL0 register write by mistake. Add it back.
Fixes: 58f896d859ce ("[media] v4l: vsp1: sru: Make the intensity controllable during streaming")
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Rename the VI6_DISP_IRQ_STA_DSE register bit to VI6_DISP_IRQ_STA_DST to
fix a typo and match the datasheet.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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Link creation will be handled differently for the DU pipeline.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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No need to waste CPU cycles when the value we need is already available.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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The code will be reused outside of vsp1_video.c.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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