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2014-09-15drm/nouveau/bios: parse freq ranges and timing id into ramcfg structBen Skeggs7-26/+47
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/bios: memset dcb struct to zero before parsingBen Skeggs1-0/+1
Fixes type/mask calculation being based on uninitialised data for VGA outputs. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gk104/fb/ram: make use of training data provided by vbiosBen Skeggs1-43/+138
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x09Ben Skeggs3-0/+168
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x05Ben Skeggs3-1/+170
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gk104/fb/ram: fix register for second set of training dataBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gk104/fb/ram: more random magic in fb initBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gk104/fb/ram: skip table entry for mode we're already inBen Skeggs1-11/+12
NVIDIA binary driver appears to, not sure if it's for a good reason, but grasping at straws for some GDDR5 reclocking issues here. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/fb/sddr2: Generate MR valuesRoy Spliet3-0/+98
V2: Always disable DLL reset Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/fb/sddr3: Expand MR generationRoy Spliet1-10/+33
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/pwr/memx: Match blob's fb access behaviourRoy Spliet2-427/+446
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr/memx: Return debugging informationRoy Spliet6-1412/+1438
Time measured from disabling FB to re-enabling, PPWR_IN reveals status of heads at the end of script. Helps debug various issues (like flicker). Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr/memx: Make FB disable and enable explicitRoy Spliet6-6/+43
Needs to be done after wait-for-VBLANK, and NVA3 requires register writes in between. Rather than hard-coding register writes, just split out fb_disable and fb_enable. v2. Squashed "fb/ramnve0: disable fb before reclocking" Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/pwr/memx: Implement "wait for VBLANK"Roy Spliet9-994/+1356
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/therm/nv84+: do not expose non-calibrated internal temp sensorMartin Peres1-1/+6
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/therm: make sure the temperature settings are sane on nv84+Martin Peres4-1/+35
One of my nv92 has a calibrated internal sensor but it displays 0°C as the default values use sw calibration values to force the temperature to 0. Since we cannot read the temperature from the adt7473 present on this board, let's re-enable the internal reading! Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/subdev: add a pfuse subdev v2Martin Peres12-0/+363
We will use this subdev to disable temperature reading on cards that did not get a sensor calibration in the factory. v2: - rename "nouveau_fuse_rd32" to "gxXXX_fuse_rd32" as adviced by Christian Costa - fold the code a little as adviced by Emil Velikov Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: Set intermediate core clock on reclockingRoy Spliet3-14/+51
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: For PLL clocks always make sure the PLL is not in useRoy Spliet1-0/+9
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: Abort when PLL doesn't lockRoy Spliet1-1/+5
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: HOST clockRoy Spliet2-8/+78
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: Set PLL refclkRoy Spliet3-29/+48
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: Parse clock control registers more accuratelyRoy Spliet1-4/+28
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau: Fix duplicate definition of NV04_PFB_BOOT_0_*Pierre Moreau3-32/+24
Signed-off-by: Pierre Moreau <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau: Display Nouveau boot options at launchPierre Moreau9-6/+37
It can help to remove any ambiguity about which options were passed to Nouveau, especially in case the user had some options set in /etc/modprobe.d/*.conf that he forgot about, as they won't appear in a dmesg. Signed-off-by: Pierre Moreau <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: wait for scrubbers to finish before uploading new ucodeBen Skeggs1-3/+2
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr/fuc: make $r1-$r10 registers callee-saved in kernel.fucMartin Peres5-736/+749
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr/fuc: add ld/st macrosMartin Peres1-0/+10
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: add helpers for delay-to-ticks and ticks-to-delayMartin Peres9-2284/+2446
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: add some arith functions (mul32_32_64, subu64 and addu64)Martin Peres10-1735/+1919
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: fix the timers implementation with concurent processesMartin Peres5-990/+1133
The problem with the current implementation is that adding a timer improperly checked which process would time up first by not taking into account how much time elapsed since their timer got scheduled. Rework the re-scheduling decision t fix this. The catch with this fix is that we are limited to scheduling timers of up to 2^31 ticks to avoid any potential overflow. Since we are unlikely to need to wait for more than a second, this won't be a problem :) Another possible fix would be to decrement the timeouts of all processes but it would duplicate a lot of code and dealing with edge cases wasn't pretty last time I checked. Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/ppwr: enable ppwr on gm107Martin Peres2-1/+5
For some reason, it is now required to wait a 20 µs after the 0x200 reset of the engine. Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gm107/therm: add PWM fan support v2Martin Peres7-6/+106
v2: change the copyright ownership from "Nouveau Community" to myself, as per Illia's recommendation. Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/therm/fan: do not use the pwm mode when the vbios tells us to ↵Martin Peres1-1/+7
use toggle Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/bios/fan: add support for maxwell's fan management table v2Martin Peres4-1/+111
Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) v2: - Do not memset the table to 0 as it erases the pre-set default values Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/ltc: allocate tagram from memory that spans all partitionsBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: allow allocation to be confined to a specific slice of heapBen Skeggs16-26/+38
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: fill in holes with "allocated" nodesBen Skeggs2-6/+21
The allocation algorithm doesn't expect there to be holes in the mm, which causes its alignment/cutoff calculations to choke (and go negative) when encountering the last chunk of a block before a hole. The least expensive solution is to simply fill in any holes with nodes that are pre-marked as being allocated. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: dump mm when trying to tear one down that still has ↵Ben Skeggs1-9/+32
allocations Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: modify test for if building a mm with holes in itBen Skeggs2-2/+4
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: make it clearer what (type == 0) meansBen Skeggs2-9/+10
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gf100/ltc: translate interrupt status into more meaningful namesBen Skeggs2-5/+29
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/ltc: drop workaround for an interrupt storm that no longer happensBen Skeggs2-10/+0
This is really the wrong thing to do, but at the time it was our only option to prevent worse issues. We no longer cause quite so much anger from LTC, so it's not needed. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nv50-/disp: add support for completion eventsBen Skeggs11-11/+173
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core: pass related object into notify constructorBen Skeggs18-28/+42
The event source types/index might need to be derived from it. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/bar: ioremap only the areas that we're actually usingBen Skeggs2-20/+19
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15Merge tag 'topic/core-stuff-2014-09-15' of ↵Dave Airlie7-75/+107
git://anongit.freedesktop.org/drm-intel into drm-next Here's the updated topic/core-stuff pull request with the two patches already merged into drm-fixes dropped. * tag 'topic/core-stuff-2014-09-15' of git://anongit.freedesktop.org/drm-intel: drm: Drop modeset locking from crtc init function drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modes drm/edid: Reduce horizontal timings for pixel replicated modes drm: Include task->name and master status in debugfs clients info drm/gem: Fix kerneldoc typo drm: use c99 initializers in structures drm: fix drm_modeset_lock.h kernel-doc notation
2014-09-15drm/rcar-du: Add OF supportLaurent Pinchart7-106/+344
Implement support for the R-Car DU DT bindings in the rcar-du DRM driver. Signed-off-by: Laurent Pinchart <[email protected]>
2014-09-15drm/rcar-du: Use struct videomode in platform dataLaurent Pinchart8-64/+51
In preparation for DT support where panel timings will be described by a DRM-agnostic video mode, replace the struct drm_mode_modeinfo instance in the panel platform data with a struct videomode. Signed-off-by: Laurent Pinchart <[email protected]>
2014-09-15video: Add DT bindings for the R-Car Display UnitLaurent Pinchart1-0/+84
Aside of the usual boring core properties (compatible, reg, interrupts and clocks), the bindings use the OF graph bindings to model connections between the DU output video ports and the on-board and off-board components. Signed-off-by: Laurent Pinchart <[email protected]>
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