aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2017-03-31drm/i915/huc: Remove unused intel_huc_fini()Michal Wajdeczko2-19/+0
This function is no longer used. Its functionality is covered by intel_uc_fini_fw(). Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Arkadiusz Hiler <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Arkadiusz Hiler <[email protected]> Signed-off-by: Joonas Lahtinen <[email protected]>
2017-03-31drm/i915/uc: Add intel_uc_fw_fini()Michal Wajdeczko1-15/+15
Cleanups of uc firmware structs from GuC and Huc are the same for both. Move common code to the helper function to avoid duplication. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Arkadiusz Hiler <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Arkadiusz Hiler <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Signed-off-by: Joonas Lahtinen <[email protected]>
2017-03-31drm/i915/uc: Add intel_uc_fw_type_repr()Michal Wajdeczko2-2/+18
Some of the DRM_NOTE messages are just using "uC" without specifying which uc they are related to. We can be more user friendly. v2: moved to the header (Joonas) Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Arkadiusz Hiler <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Signed-off-by: Joonas Lahtinen <[email protected]>
2017-03-31drm/i915/uc: Move intel_uc_fw_status_repr() to intel_uc.hMichal Wajdeczko2-17/+19
The file fits better. Also use "<invalid>" for invalid case. v2: move directly to .h (Joonas) Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Arkadiusz Hiler <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Signed-off-by: Joonas Lahtinen <[email protected]>
2017-03-31drivers: gpu: drm: i915L intel_lpe_audio: Fix kerneldoc commentsTamara Diaconita1-0/+1
Add description for existing parameter 'pipe' to fix the build warning: ./drivers/gpu/drm/i915/intel_lpe_audio.c:342: warning: No description found for parameter 'pipe'. Signed-off-by: Tamara Diaconita <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915: Suppress busy status for engines if wedgedChris Wilson2-3/+10
If the driver is wedged, HW state may be very inconsistent and report that it is still busy, even though we have stopped using it. This can lead to a double *ERROR* rather than a graceful cleanup after wedging. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915: Do request retirement before marking engines as wedgedChris Wilson1-1/+6
As we declare an engine as wedged, we mark all of its active requests as in error. However, we don't want to mark successfully completed requests as in error, which requires us to retire those requests first. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915: Drop verbose and archaic "ring" from our internal engine namesChris Wilson1-10/+10
We pretty print the name of an engine in several places, mostly for debug, but also in the GPU hang report. Using "ring" in the name is archaic (we call those engines now to differentiate them from the multiple rings of commands we execute on each engine), quite verbose and often tautological. We run out of room in our GPU hang report for instance if we have more than a couple of engines hung simultaneously. Bit the bullet and update the strings to reflect the common internal names. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915: Use a dummy timeline name for a signaled fenceChris Wilson1-0/+11
Michał Winiarski pointed out that the debugging infrastructure (such as trace_dma_fence_release) likes to pretty print the timeline name, long after we have freed the timeline. Our timelines currently live as part of the GTT (due to the strict ordering we currently use through each) which belong to the context. We aim to free the context and release its hardware resources as soon as we able to (i.e. when the last fence/request using it has been signaled and retired). As the .get_timeline_name is purely a debug feature, rather than extending the lifetime of the context, or splitting it into many different release phases just to keep the name around, replace the timeline name with a constant after the fence has been signaled. This avoids the potential use-after-free. Reported-by: Krzysztof Olinski <[email protected]> Fixes: 80b204bce8f2 ("drm/i915: Enable multiple timelines") Signed-off-by: Chris Wilson <[email protected]> Cc: Michał Winiarski <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: <[email protected]> # v4.10+ Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Joonas Lahtinen <[email protected]> Reviewed-by: Michał Winiarski <[email protected]>
2017-03-30Merge tag 'gvt-next-2017-03-30' of https://github.com/01org/gvt-linux into ↵Daniel Vetter17-323/+626
drm-intel-next-queued gvt-next-2017-03-30 - Add mdev attribute group for per-vgpu info - Time slice based vGPU scheduling QoS support (Gao Ping) - Initial KBL support for E3 server (Han Xu) - other misc. Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Daniel Vetter <[email protected]>
2017-03-30drm/i915: Ironlake do_idle_maps w/a may be called w/o struct_mutexChris Wilson1-1/+1
Since commit 1233e2db199d ("drm/i915: Move object backing storage manipulation to its own locking"), i915_gem_object_put_pages() and specifically the i915_gem_gtt_finish_pages() may be called from outside of the struct_mutex and so we can no longer pass I915_WAIT_LOCKED to i915_gem_wait_for_idle. Fixes: 1233e2db199d ("drm/i915: Move object backing storage manipulation to its own locking") Signed-off-by: Chris Wilson <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Jani Nikula <[email protected]> Cc: [email protected] Cc: <[email protected]> # v4.10+ Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Joonas Lahtinen <[email protected]>
2017-03-30drm/i915/guc: Take enable_guc_loading check out of GEM core codeOscar Mateo3-8/+11
The should happen as soon as possible, but always within the logic that depends on it (and not interrupting the top-level driver control flow). Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Signed-off-by: Oscar Mateo <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Joonas Lahtinen <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915/opregion: debug log about invalid ACPI OpRegion VBTJani Nikula1-0/+4
Leave more breadcrumbs for debuggers. Reviewed-by: Bob Paauwe <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915/opregion: try to validate RVDA VBT only if it's thereJani Nikula1-21/+20
Seems more sensible this way, and reduces indent for the more common case. Reviewed-by: Bob Paauwe <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915/opregion: bail out early for systems with no opregion VBTJani Nikula1-32/+32
Reduce indent. No functional changes. Reviewed-by: Bob Paauwe <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-30drm/i915/gvt: control the scheduler by timeslice usagePing Gao1-2/+7
The timeslice usage will determine vGPU whether has chance to schedule or not at every vGPU switch checkpoint. Signed-off-by: Ping Gao <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: create an idle vGPUPing Gao3-1/+69
vGPU resource is allocated by scheduler. To account for non-allocated free cycles, we create an idle vGPU as the placeholder similar to idle task concept, which is useful to handle some corner cases in scheduling policy. Signed-off-by: Ping Gao <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: add basic function for weight controlPing Gao1-0/+59
This method tries to guarantee precision in second level, with the adjustment conducted in every 100ms. At the end of each vGPU switch calculate the sched time and subtract it from the time slice allocated; the allocated time slice for every 100ms together with remaining timeslice, will be used to decide how much timeslice allocated to this vGPU in the next 100ms slice, with the end goal to guarantee weight ratio in second level. Signed-off-by: Ping Gao <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: define weight according to vGPU typePing Gao4-7/+33
The weight defines proportional control of physical GPU resource shared between vGPUs. So far the weight is tied to a specific vGPU type, i.e when creating multiple vGPUs with different types, they will inherit different weights. e.g. The weight of type GVTg_V5_2 is 8, the weight of type GVTg_V5_4 is 4, so vGPU of type GVTg_V5_2 has double vGPU resource of vGPU type GVTg_V5_4. TODO: allow user control the weight setting in the future. Signed-off-by: Ping Gao <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: factor out the schedulerPing Gao1-30/+36
Factor out the scheduler to a more clear structure, the basic logic is to find out next vGPU first and then schedule it. vGPUs were ordered in a LRU list, scheduler scan from the LRU list head and choose the first vGPU who has pending workload. Signed-off-by: Ping Gao <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: add some statistic routine for schedulerPing Gao3-25/+48
Add some statistic routine to collect the time when vGPU is scheduled in/out and the time of the last ctx submission. Signed-off-by: Ping Gao <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: use hrtimer replace delayed_work in schedulerPing Gao4-16/+41
Currently the scheduler is triggered by delayed_work, which doesn't provide precision at microsecond level. Move to hrtimer instead for more accurate control. Signed-off-by: Ping Gao <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: remove the redundant info NULL checkTina Zhang1-7/+0
The variable info is never NULL, which is checked by the caller. This patch removes the redundant info NULL check logic. Fixes: 695fbc08d80f ("drm/i915/gvt: replace the gvt_err with gvt_vgpu_err") Signed-off-by: Tina Zhang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-30drm/i915/gvt: adjust mem size for low resolution typeZhenyu Wang1-1/+1
From commit d1a513be1f0a ("drm/i915/gvt: add resolution definition for vGPU type"), small type has been restricted to small resolution, so not require larger high GM size any more. Change to smaller 384M for more VM creation with vGPU enabled which still perform reasonable workload. Fixes: d1a513be1f0a ("drm/i915/gvt: add resolution definition for vGPU type") Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915: Use LINEAR modifier instead of NONEBen Widawsky1-14/+14
They're the same, so use the one which makes more sense. Signed-off-by: Ben Widawsky <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
2017-03-29Revert "drm/i915: Skip execlists_dequeue() early if the list is empty"Chris Wilson2-24/+0
This reverts commit 6c943de6686f ("drm/i915: Skip execlists_dequeue() early if the list is empty"). The validity of using READ_ONCE there depends upon having a mb to coordinate the assignment of engine->execlist_first inside submit_request() and checking prior to taking the spinlock in execlists_dequeue(). We wrote "the update to TASKLET_SCHED incurs a memory barrier making this cross-cpu checking safe", but failed to notice that this mb was *conditional* on the execlists being ready, i.e. there wasn't the required mb when it was most necessary! We could install an unconditional memory barrier to fixup the READ_ONCE(): diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 7dd732cb9f57..1ed164b16d44 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -616,6 +616,7 @@ static void execlists_submit_request(struct drm_i915_gem_request *request) if (insert_request(&request->priotree, &engine->execlist_queue)) { engine->execlist_first = &request->priotree.node; + smp_wmb(); if (execlists_elsp_ready(engine)) But we have opted to remove the race as it should be rarely effective, and saves us having to explain the necessary memory barriers which we quite clearly failed at. Reported-and-tested-by: Tvrtko Ursulin <[email protected]> Fixes: 6c943de6686f ("drm/i915: Skip execlists_dequeue() early if the list is empty") Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Michał Winiarski <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Tvrtko Ursulin <[email protected]>
2017-03-29drm/i915: Avoid lock dropping between reschedulingChris Wilson1-29/+24
Unlocking is dangerous. In this case we combine an early update to the out-of-queue request, because we know that it will be inserted into the correct FIFO priority-ordered slot when it becomes ready in the future. However, given sufficient enthusiasm, it may become ready as we are continuing to reschedule, and so may gazump the FIFO if we have since dropped its spinlock. The result is that it may be executed too early, before its dependencies. v2: Move all work into the second phase over the topological sort. This removes the shortcut on the out-of-rbtree request to ensure that we only adjust its priority after adjusting all of its dependencies. Fixes: 20311bd35060 ("drm/i915/scheduler: Execute requests in order of priorities") Testcase: igt/gem_exec_whisper Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: <[email protected]> # v4.10+ Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Tvrtko Ursulin <[email protected]>
2017-03-29drm/i915: Move WARN_ON/MISSING_CASE macros to i915_utils.hMichal Wajdeczko3-19/+19
We can't sometimes use these macros in other headers due to include and definition order. As i915_utils.h already contains other helper macros move these macros there. v2: checkpatch cleanup for WARN() macro. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Chris Wilson <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Chris Wilson <[email protected]>
2017-03-29drm/i915/gvt: remove workload from intel_shadow_wa_ctx structureTina Zhang3-13/+22
intel_shadow_wa_ctx is a field of intel_vgpu_workload. container_of() can be used to refine the relation-ship between intel_shadow_wa_ctx and intel_vgpu_workload. This patch removes the useless dereference. v2. add "drm/i915/gvt" prefix. (Zhenyu) Signed-off-by: Tina Zhang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915/gvt: Turn on KBL platform support.Xu Han1-0/+2
Turn on KBL WS platform support in gvt-g. More platforms would be enabled, after validate. Signed-off-by: Xu Han <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915/gvt: Add KBL dispatch logic in each function.Xu Han8-26/+43
Extend function dispatch logic to support KBL platform. Signed-off-by: Xu Han <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915/gvt: Update save/restore list to compatible KBL platform.Xu Han1-0/+12
Add some KBL specially registers to save/restore list. Signed-off-by: Xu Han <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915/gvt: Update MMIO handle policy to compatible KBL platform.Xu Han1-198/+211
Update MMIO handle policy to KBL platform. Signed-off-by: Xu Han <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915/gvt: Add KBL platform definition.Xu Han1-9/+10
Add KBL platform definition. Signed-off-by: Xu Han <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915/gvt: Add mdev device attribute groupZhenyu Wang1-0/+32
This adds initial attribute group for mdev to hold vGPU related for each mdev device, currently just vGPU id is shown. v2: rename group name as "intel_vgpu" Signed-off-by: Zhenyu Wang <[email protected]> Reviewed-by: Kevin Tian <[email protected]>
2017-03-29drm/i915/gvt: make dpcd_fix_data supports DP1.2Pei Zhang1-1/+2
GVT-g will emulate a fixed DPCD data to VM for DP/eDP panel. Update this data to latest DP1.2 with the maximum lane bandwidth of 5.4G/s to support 4K resolution in VM. V3: modify patch comment V2: add inline comment to describe the dpcd_fix_data. Signed-off-by: Pei Zhang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29drm/i915/gvt: emulate SKL_FUSE_STATUS and LCPLL_CTL for virtual monitor ↵Weinan Li1-1/+12
detection Initialize the correct vreg for virtual monitor. Set PG0/1/2 distribution and fuse download done in SKL_FUSE_STATUS. Set PLL_ENABLE and PLL_LOCK in LCPLL_CTL. Guest may need to check these registers for display monitor detection on Skylake platforms. Signed-off-by: Weinan Li <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-03-29Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter1-4/+4
Backmerge drm-next one more because Dave fumbled the conflict resolution slightly and I didn't notice it. We need Zhenyu's hotfix before he can assemble the gvt pull ... Signed-off-by: Daniel Vetter <[email protected]>
2017-03-29drm/i915/gvt: fix error return check for copy_gma_to_hva()Zhenyu Wang1-4/+4
From commit 73dec95e6ba3 ("drm/i915: Emit to ringbuffer directly"), copy_gma_to_hva() now returns copied data length instead of 0, so need to change error return check for that. Note: Looks this is caused by backmerge conflict resolving, so 4.11-rc4 is not impacted as commit 73dec95e6ba3 ("drm/i915: Emit to ringbuffer directly") is not in 4.11. But need to fix this before I can apply 4.12 stuff against drm-intel-next correctly. Fixes: e5c1ff14757a ("Backmerge tag 'v4.11-rc4' into drm-next") Cc: Dave Airlie <[email protected]> Cc: Tina Zhang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-03-28drm/i915/dp: reduce link M/N parametersJani Nikula1-0/+11
Several major vendor USB-C->HDMI converters, in particular the DA200, fail to recover a 5.4 GHz 1 lane signal if the link N is greater than 0x80000. The link M and N depend on the pixel clock and link clock ratio. With current code link N exceeds 0x80000 only when link clock >= 540000 kHz. Except for the eDP intermediate link clocks, at least the four least significant bits are always zero. Just one bit shift right would be enough to bring even the DP 1.4 810000 kHz link clock under 0x80000 link N. The pixel clock for modes that require a link clock >= 540000 kHz would also have several least significant bits zero. Unless the user provides a mode with an odd pixel clock value, we can reduce the numbers to reach the goal, with no loss in precision. The DP spec even mentions sources making choices that "allow for static and relatively small Mvid and Nvid values", thus reducing the link M/N regardless of the sink in question seems justified. Everything here is based on the work and information gathered by Clint Taylor <[email protected]>. This is just an iteration to reduce the parameters regardless of lane count, link rate, or sink. Reference: http://patchwork.freedesktop.org/patch/msgid/[email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93578 Tested-by: Mads <[email protected]> Tested-by: PJ <[email protected]> Tested-by: François Guerraz <[email protected]> Tested-by: Lev Popov <[email protected]> Tested-by: Igor Krivenko <[email protected]> Tested-by: Clint Taylor <[email protected]> Reviewed-by: Clint Taylor <[email protected]> Reviewed-by: Dhinakaran Pandiyan <[email protected]> Acked-by: Daniel Vetter <[email protected]> Cc: Clint Taylor <[email protected]> Cc: Anusha Srivatsa <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-28drm/i915: Take rpm wakelock around debugfs/i915_gpu_infoChris Wilson1-1/+4
Capturing GPU state requires the device to be awake in order to read registers. Normally, this is taken along the error handler, but for the direct debugfs access, we cannot make assumptions about the current device state and so either need to wake it up, or abort. Fixes: 5a4c6f1b1b2d ("drm/i915: The return of i915_gpu_info to debugfs") Testcase: igt/pm_rpm/debugfs-read Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kuoppala <[email protected]>
2017-03-28drm/i915: WARN if the core runtime PM get helpers failImre Deak1-3/+9
We don't expect the core runtime PM get helpers to return any error, so add a WARN for this. Also print the return value for all the callsites to help debugging. v2: - Don't call pm_runtime_get_sync() as part of initing locals. (Chris) Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-28drm/i915/perf: remove user triggerable warnMatthew Auld1-2/+6
Don't throw a warning if we are given an invalid property id. While here let's also bring back Robert' original idea of catching unhandled enumeration values at compile time. Fixes: eec688e1420d ("drm/i915: Add i915 perf infrastructure") Signed-off-by: Matthew Auld <[email protected]> Cc: Robert Bragg <[email protected]> Reviewed-by: Robert Bragg <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-28drm/i915: update the firmware download URLJani Nikula1-1/+1
The old URL works but gives 301 Moved Permanently. Update. Reviewed-by: Michal Wajdeczko <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-28Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter379-2577/+3469
Backmerge drm-next to get at -rc4, which we need to land the 4.12 gvt patches. Signed-off-by: Daniel Vetter <[email protected]>
2017-03-28Backmerge tag 'v4.11-rc4' into drm-nextDave Airlie379-2577/+3469
Linux 4.11-rc4 The i915 GVT team need the rc4 code to base some more code on.
2017-03-28drm/i915/perf: destroy stream on sample_flags mismatchMatthew Auld1-1/+2
If we were to ever encounter a sample_flags mismatch we need to ensure we destroy the stream when we bail. Fixes: d79651522e89 ("drm/i915: Enable i915 perf stream for Haswell OA unit") Signed-off-by: Matthew Auld <[email protected]> Cc: Robert Bragg <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-28drm/i915: allow HDMI 2.0 clock ratesShashank Sharma1-0/+2
Geminilake has a native HDMI 2.0 controller, which is capable of driving clocks upto 594Mhz. This patch updates the max tmds clock limit for the same. V2: rebase V3: rebase V4: added r-b from Ander V5: rebase V6: rebase V7: rebase V8: rebase V9: rebase V10: rebase Cc: Ander Conselvan De Oliveira <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Reviewed-by: Ander Conselvan De Oliveira <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-28drm/i915: enable scramblingShashank Sharma5-0/+106
Geminilake platform sports a native HDMI 2.0 controller, and is capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec mendates scrambling for these higher clocks, for reduced RF footprint. This patch checks if the monitor supports scrambling, and if required, enables it during the modeset. V2: Addressed review comments from Ville: - Do not track scrambling status in DRM layer, track somewhere in driver like in intel_crtc_state. - Don't talk to monitor at such a low layer, set monitor scrambling in intel_enable_ddi() before enabling the port. V3: Addressed review comments from Jani - In comments, function names, use "sink" instead of "monitor", so that the implementation could be close to the language of HDMI spec. V4: Addressed review comment from Maarten - scrambling -> hdmi_scrambling - high_tmds_clock_ratio -> hdmi_high_tmds_clock_ratio V5: Addressed review comments from Ville and Ander - Do not modifiy the crtc_state after compute_config. Move all scrambling and tmds_clock_ratio calcutations to compute_config. - While setting scrambling for source/sink, do not check the conditions again, just go by the crtc_state flags. This will simplyfy the condition checks. V6: Addressed review comments from Ville - Do not add IS_GLK check in disable/enable function, instead add it in compute_config, while setting state flags. - Remove unnecessary paranthesis. - Simplyfy handle_sink_scrambling function as suggested. - Add readout code for scrambling status in get_ddi_config and add a check for the same in pipe_config_compare. V7: Addressed review comments from Ander/Ville - No separate function for source scrambling, make it inline - Align the last line of the macro TRANS_DDI_HDMI_SCRAMBLING_MASK - Do not add platform check while setting source scrambling - Use pipe_config instead of crtc->config to set sink scrambling - To readout scrambling status, Compare with SCRAMBLING_MASK not any of its bits - Remove platform check in intel_pipe_config_compare while checking scrambling status V8: Fixed mege conflict, Addressed review comments from Ander - Remove the desciption/comment about scrambling fom the caller, move it to the function - Move the IS_GLK check into scrambling function - Fix alignment V9: Fixed review comments from Ville, Ander - Pass the scrambling state variables as bool input to the sink_scrambling function and let the disable call be unconditional. - Fix alignments in function calls and debug messages. - Add kernel doc for function intel_hdmi_handle_sink_scrambling V10: Rebase Signed-off-by: Shashank Sharma <[email protected]> Reviewed-by: Ander Conselvan de Oliveira <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-03-27drm/i915: kill intel_ddi_pll_select()Paulo Zanoni3-26/+11
All it does is pick the encoder and call intel_get_shared_dpll(). We can just do this in the caller. One less indirection level during code reading. As another plus, now the two callers of intel_get_shared_dpll() are {ironlake,haswell}_crtc_compute_clock(). Reported-by: Ville Syrjälä <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
Powered by cgit, Gruvboxed by Blaster4385.