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2023-08-08nouveau/dmem: fix copy-paste error in nouveau_dmem_migrate_chunk()Danilo Krummrich1-1/+1
Fix call to nouveau_fence_emit() with wrong channel parameter. Fixes: 7f2a0b50b2b2 ("drm/nouveau: fence: separate fence alloc and emit") Reported-by: kernel test robot <[email protected]> Reported-by: Stephen Rothwell <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Signed-off-by: Danilo Krummrich <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-08drm/exynos: remove redundant of_match_ptrZhu Wang1-1/+1
The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr here. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Hence we remove of_match_ptr. Signed-off-by: Zhu Wang <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2023-08-08drm/exynos: fix a possible null-pointer dereference due to data race in ↵Tuo Li1-3/+2
exynos_drm_crtc_atomic_disable() The variable crtc->state->event is often protected by the lock crtc->dev->event_lock when is accessed. However, it is accessed as a condition of an if statement in exynos_drm_crtc_atomic_disable() without holding the lock: if (crtc->state->event && !crtc->state->active) However, if crtc->state->event is changed to NULL by another thread right after the conditions of the if statement is checked to be true, a null-pointer dereference can occur in drm_crtc_send_vblank_event(): e->pipe = pipe; To fix this possible null-pointer dereference caused by data race, the spin lock coverage is extended to protect the if statement as well as the function call to drm_crtc_send_vblank_event(). Reported-by: BassCheck <[email protected]> Link: https://sites.google.com/view/basscheck/home Signed-off-by: Tuo Li <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Added relevant link. Signed-off-by: Inki Dae <[email protected]>
2023-08-07drm/mediatek: Fix uninitialized symbolNancy.Lin1-8/+8
Fix Smatch static checker warning -Fix uninitialized symbol comp_pdev in mtk_ddp_comp_init. Fixes: 0d9eee9118b7 ("drm/mediatek: Add drm ovl_adaptor sub driver for MT8195") Signed-off-by: Nancy.Lin <[email protected]> Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2023-08-07drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform definesDnyaneshwar Bhadane4-11/+4
Driver refers to the platform Alderlake S as ADLS_RPLS in places and RAPTORLAKE_S in some. v2: - Unrolled wrapper IS_ADLS_GRAPHICS_STEP v3: - Replace IS_RAPTORLAKE_S instead of IS_ADLS_RPLS. (Tvrtko/Lucas). - Remove unused macro IS_ADLS_GRAPHICS/DISPLAY_STEP - Change the subject Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN definesAnusha Srivatsa4-4/+4
Follow consistent naming convention. Replace ADLP with ALDERLAKE_P Signed-off-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU definesDnyaneshwar Bhadane2-2/+2
Follow consistent naming convention. Replace ADLP with ALDERLAKE_P v2: - Replace IS_ADLP_RPLU with IS_RAPTORLAKE_U (Tvrtko/Lucas) - Change the subject Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/rplp: s/ADLP_RPLP/RAPTORLAKE_P for RPLP definesDnyaneshwar Bhadane2-2/+2
Follow consistent naming convention. Replace ADLP with ALDERLAKE_P. v2: - Replace IS_ADLP_RPLP with IS_RAPTORLAKE_P. (Tvrtko/Lucas) - Change the subject Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics stepDnyaneshwar Bhadane5-15/+8
Driver refers to the platform Alderlake P as ADLP in places and ALDERLAKE_P in some. Making the consistent change to avoid confusion of the right naming convention for the platform. v2: - Unrolled wrapper IS_ADLP_GRAPHICS_STEP and Replace - Added IS_ALDERLAKE_P() && IS_GRAPHICS_STEP() (Jani/Tvrtko). v3: - Removed unused macros of display steps. Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/tgl: s/TGL/TIGERLAKE for platform/subplatform definesDnyaneshwar Bhadane4-7/+4
Follow consistent naming convention. Replace TGL with TIGERLAKE.Replace IS_TGL_DISPLAY_STEP with IS_TIGERLAKE() && IS_DISPLAY_STEP(). v2: - s/TGL/tgl in the subject prefix(Anusha) v3: - Unrolled wrapper IS_TGL_DISPLAY_STEP and Replace - Replace IS_PLATFORM && DISPLAY_STEP (Jani/Tvrtko). v4: - Removed unused macros Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform definesDnyaneshwar Bhadane15-38/+47
Follow consistent naming convention. Replace JSL with JASPERLAKE. Unroll IS_JSL_EHL() define with IS_JASPERLAKE() || IS_ELKHARTLAKE() condition. Change in the display step define for Jasperlake. v2: - Change subject prefix skl instead of SKL(Anusha) v3: - Remove the use of define IS_JSL_EHL. - Replace with IS_JASPERLAKE() || IS_ELKHARTLAKE() - Unrolled wrapper IS_JSL_ELK_DISPLAY_STEP (Jani/Tvrtko) v4: - Removed unused macro v5: - Resolved valid checkpatch warning(Jani) Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/rkl: s/RKL/ROCKETLAKE for platform/subplatform definesDnyaneshwar Bhadane2-3/+1
Follow consistent naming convention. Replace RKL with ROCKETLAKE.Replace IS_RKL_GRAPHICS_STEP with IS_ROCKETLAKE && IS_DISPLAY_STEP. v2: - s/RKL/rkl in the subject prefix(Anusha) v3: - Unrolled wrapper IS_RKL_DISPLAY_STEP. - Replace IS_PLATFORM && IS_DISPLAY_STEP (Jani/Tvrtko) Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/cml: s/CML/COMETLAKE for platform/subplatform definesDnyaneshwar Bhadane2-5/+5
Follow consistent naming convention. Replace CML with COMETLAKE. Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/cfl: s/CFL/COFFEELAKE for platform/subplatform definesDnyaneshwar Bhadane2-6/+6
Follow consistent naming convention. Replace CFL with COFFEELAKE. Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/kbl: s/KBL/KABYLAKE for platform/subplatform definesDnyaneshwar Bhadane5-16/+12
Follow consistent naming convention. Replace KBL with KABYLAKE.Replace IS_KBL_GRAPHICS_STEP with IS_KABYLAKE () && IS_GRAPHICS_STEP(). v2: - s/KBL/kbl in the subject prefix(Anusha) v3: - Unrolled wrapper IS_KBL_GRAPHICS_STEP. - Replace with IS_PLATFORM && DISPLAY_STEP(tvrtko/jani) v4: - Removed unused macro. Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/skl: s/SKL/SKYLAKE for platform/subplatform definesDnyaneshwar Bhadane3-10/+9
Follow consistent naming convention. Replace SKL with SKYLAKE and Replace IS_SKL_GRAPHICS_STEP with IS_SKYLAKE() && IS_GRAPHICS_STEP(). v2: - Change subject skl instead of SKL(Anusha) v3: - Unrolled wrapper IS_SKL_GRAPHICS_STEP. - Replace with IS_PLATFORM && DISPLAY_STEP(tvrtko/jani) v4: - Removed the unused macro. Cc: Anusha Srivatsa <[email protected]> Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/bdw: s/BDW/BROADWELL for platform/subplatform definesDnyaneshwar Bhadane5-12/+12
Follow consistent naming convention. Replace BDW with BROADWELL. Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07drm/i915/hsw: s/HSW/HASWELL for platform/subplatform definesDnyaneshwar Bhadane10-19/+19
Follow consistent naming convention. Replace HSW with HASWELL. Signed-off-by: Dnyaneshwar Bhadane <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-07Merge drm/drm-next into drm-intel-nextRodrigo Vivi15173-171284/+534420
Catching-up with drm-next and drm-intel-gt-next. It will unblock a code refactor around the platform definitions (names vs acronyms). Signed-off-by: Rodrigo Vivi <[email protected]>
2023-08-07drm/amdgpu: Report vbios version instead of PNLijo Lazar1-1/+1
Report VBIOS version in vbios_version sysfs node instead of part number. Part number remains constant for a SKU type. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Promote DAL to 3.2.246Martin Leung1-1/+1
This version brings along following fixes: - Fix a regression in blank pixel data caused by coding mistake - Fix a bug when searching for insert_above_mpcc - Update add plane to context logic with a new algorithm - Adjust visual confirm dpp height offset to be 1/240 of v addressable - Add interface to enable DPIA trace - Support plane clip with zero recout size - Blocking invalid 420 modes on HDMI TMDS for DCN31 and DCN314 - Make mpc32 functions available to future DCNs - Change HDCP update sequence for DM Acked-by: Tom Chung <[email protected]> Signed-off-by: Martin Leung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Change HDCP update sequence for DMBhawanpreet Lakha1-42/+38
Refactor the sequence in hdcp_update_display() to use mod_hdcp_update_display(). Previous sequence: - remove()->add() This Sequence was used to update the display, (mod_hdcp_update_display didn't exist at the time). This meant for any hdcp updates (type changes, enable/disable) we would remove, reconstruct, and add. This leads to unnecessary calls to psp eventually New Sequence using mod_hdcp_update_display(): - add() once when stream is enabled - use update() for all updates The update function checks for prev == new states and will not unnecessarily end up calling psp via add/remove. Reviewed-by: Qingqing Zhuo <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: rename acquire_idle_pipe_for_layer to ↵Wenjing Liu21-95/+85
acquire_free_pipe_as_sec_dpp_pipe [why] Secondary DPP pipes are used for rendering secondary layers of planes. The name "for layer" doesn't make it obvious. The function is acquiring a free pipe as secondary dpp pipe only. We rename it so it is more obvious. In a future follow up change, we want to add functions to acquire free pipe as opp head pipe or otg master pipe as well. They will have their separate allocation priority. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: move idle pipe allocation logic into dcn specific layerWenjing Liu3-116/+174
[why] generic dc resource file should not know what an optimal idle pipe is because this is dcn hardware dependent. [how] We move the optimial pipe searching logic in dcn specific layer. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Use max memclk variable when setting max memclkAlvin Lee1-1/+1
[Description] In overclocking scenarios the max memclk could be higher than the DC mode limit. However, for configs that don't support MCLK switching we need to set the max memclk to the overclocked max instead of the DC mode max or we could result in underflow. Reviewed-by: Samson Tam <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Add vendor Id for referenceMike Hsieh1-0/+1
Add a new vendor ID code for reference Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Mike Hsieh <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN314Leo Chen1-1/+3
[Why & How] HDMI TMDS does not have ODM support. Filtering 420 modes that exceed the 4096 FMT limitation on DCN314 will resolve intermittent corruptions issues. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Leo Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN31Leo Chen1-1/+3
[Why & How] HDMI TMDS does not have ODM support. Filtering 420 modes that exceed the 4096 FMT limitation on DCN31 will resolve intermittent corruptions issues. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Leo Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Revert "drm/amd/display: Read down-spread percentage from ↵Leo Chen2-38/+1
lut to adjust dprefclk." [Why & How] Revert commit 6917b0b71171 ("drm/amd/display: Read down-spread percentage from lut to adjust dprefclk.") This change was causing 240hz display to not light up after s0i3. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Leo Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: do not treat clip_rect size change as a scaling changeWenjing Liu1-3/+1
[why] With previous ODM + MPO policy we will only allocate pipes when MPO plane has intersection with current ODM slice. With this policy we have to indicate scaling change when plane clip is updated in case plane clip change causes MPO plane to go in or out current ODM slice. With new ODM + MPO policy we allocate pipe independent from plane clip size so we no longer treat it as a scaling change. There no need to do a full update due to clip size change anymore. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v ↵Wenjing Liu1-2/+8
addressable [why] For timing with large v addressable visual confirm is just too small. It is difficult to tell visually which DPP we are using. On the other hand with timing with small v addressable visual confirm is too large and covers the UI area. [how] We calculate visual confirm dpp height offset based on v addressable so it stays relatively the same height i.e. 1/240 verticle portion of the screen. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: update add plane to context logic with a new algorithmWenjing Liu12-254/+328
[why] Preivous algorithm for finding an optimal idle pipe for a new plane was implemented to handle dynamic pipe allocation when MPO plane moves from one ODM slice to the other. Now pipe allocation is more static so it no longer depends on the MPO plane's position. We are simplifying our logic and remove unnecessary handling in our code. [how] Apply a new simplified version of pipe resource allocation logic to reduce unnecessary flip delay caused by swapping secondary dpp pipe to other MPC blending tree. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: always acquire MPO pipe for every blending treeWenjing Liu2-317/+12
[why] We only acquire MPO pipe for blending tree where the plane clip will be rendered. If an MPO plane is outside current ODM slice rect, we will skip pipe allocation. With new programming policy we want to allocate pipes for every ODM slice blending tree even for those whose ODM slice rect doesn't intersect with plane clip. This is aligned with DML validation so the pipe topology is programmed independently from the plane's position and dst plane size. [how] - Remove the logic to allocate pipe only when the MPO plane intersects with ODM slice and replace with the new logic to always allocate pipes. - Remove the logic to tear down ODM configuration in favor for supporting secondary MPO planes. - Remove the logic to use full update when MPO goes accross ODM slice boundary. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: support plane clip with zero recout sizeWenjing Liu1-24/+33
[why] If plane clip is outside current pipe's ODM slice rect, our logic will fail validation because we assume that when a pipe is acquired to support a plane clip, it must blend some portion of the plane on the screen. This assumption needs to be changed. When a pipe is acquired to render the plane, we are now allowing it to support a case where it can take minimum viewport and draw with zero recout size when the plane clip is outside current ODM slice rect. The reason is that we want to allocate and get the pipe pre-programmed so it is ready to be rendered when user moves the plane over to the current ODM slice with a fast update. Whereas with the existing solution when user moves the plane over, we will need to allocate a pipe as needed and power it up and program it through a full update. This not only impacts the user experience with unnecessary delay of a frame but also doesn't generate any benefit to the user because DML doesn't support it. DML will invalidate based on worst case scenario and it doesn't depend on the plane location. So having our programming sequence support such dynamic pipe allocation is not meaningful anyway. [how] In build scaler params allow recout to be zero size and if viewport is smaller than minimum, set minimum viewport size. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Use DTBCLK as refclk instead of DPREFCLKAustin Zheng1-1/+2
[Why] Flash of corruption observed when UCLK switching after transitioning from DTBCLK to DPREFCLK on subVP(DP) + subVP(HDMI) config Scenario where DPREFCLK is required instead of DTBCLK is not expected [How] Always set the DTBCLK source as DTBCLK0 Reviewed-by: Alvin Lee <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Austin Zheng <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Set Stream Update Flags in commit_state_no_checkAustin Zheng1-0/+13
[Why] Front-end would be programmed using the stream update flags set from the previous update and the full update should be triggered whenever commit_state_no_check gets called. [How] Set all stream update flags before programming the front-end Clear all flags that got set to avoid redundant programming Reviewed-by: Alvin Lee <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Austin Zheng <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Make mpc32 functions available to future DCNsWesley Chalmers2-14/+75
Make the mpc32 functions available for future DCNs to use Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wesley Chalmers <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Fix a bug when searching for insert_above_mpccWesley Chalmers1-2/+3
[WHY] Currently, when insert_plane is called with insert_above_mpcc parameter that is equal to tree->opp_list, the function returns NULL. [HOW] Instead, the function should insert the plane at the top of the tree. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wesley Chalmers <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Enable DPIA trace with DC debug maskStylon Wang1-1/+6
[Why] DPIA traces from DMUB is not enabled by default, which is less convenient to debug DPIA related issues because we have to resort to other means to enable DPIA trace. [How] Reuse existing DC debug mask to enable DPIA trace log from kernel command line. This makes debugging DPIA issues easier especially when system power state (suspend/reboot) is involved. To turn on DPIA trace, simply add "amdgpu.dcdebugmask=0x80" to kernel command line. Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Stylon Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Add interface to enable DPIA traceStylon Wang3-0/+50
[Why] DPIA traces from DMUB is not enabled by default, which is less convenient to debug DPIA related issues because we have to resort to other debug tools to enable DPIA trace. [How] Exposes interfaces to update trace mask from the DMUB GPINT commands. Also provides DC implementations to enable DPIA trace. Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Stylon Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: fix a regression in blank pixel data caused by coding mistakeWenjing Liu2-2/+2
[why] There was unfortunately a coding mistake. It gets caught with an ultrawide monitor that requires ODM 4:1 combine. We are blanking or unblanking pixel data we are supposed to enumerate through all ODM pipes and program DPG for each of those pipes. However the coding mistake causes us to program only the first and last ODM pipes. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Reviewed-by: Martin Leung <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amdgpu: cleanup MES process level doorbellsShashank Sharma2-63/+1
MES allocates process level doorbells, but there is no userspace client to consume it. It was only being used for the MES ring tests (in kernel), and was written by kernel doorbell write. The previous patch of this series has changed the MES ring test code to use kernel level MES doorbells. This patch now cleans up the process level doorbell allocation code which is not required. Cc: Alex Deucher <[email protected]> Cc: Christian Koenig <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Arvind Yadav <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amdgpu: use doorbell mgr for MES kernel doorbellsShashank Sharma3-57/+47
This patch: - Removes the existing doorbell management code, and its variables from the doorbell_init function, it will be done in doorbell manager now. - uses the doorbell page created for MES kernel level needs (doorbells for MES self tests) - current MES code was allocating MES doorbells in MES process context, but those were getting written using kernel doorbell calls. This patch instead allocates a MES kernel doorbell for this (in add_hw_queue). V2: Create an extra page of doorbells for MES during kernel doorbell creation (Alex) V4: Move MES doorbell size and page offset objects in this patch from patch 6. Cc: Alex Deucher <[email protected]> Cc: Christian Koenig <[email protected]> Reviewed-by: Christian Koenig <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Arvind Yadav <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amdgpu: remove unused functions and variablesShashank Sharma2-44/+0
This patch removes some variables and functions from KFD doorbell handling code, which are no more required since doorbell manager is handling doorbell calculations. Cc: Alex Deucher <[email protected]> Cc: Christian Koenig <[email protected]> Cc: Felix Kuehling <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: ensure async flips are only accepted for fast updatesHamza Mahfooz2-15/+21
We should be checking to see if async flips are supported in amdgpu_dm_atomic_check() (i.e. not dm_crtc_helper_atomic_check()). Also, async flipping isn't supported if a plane's framebuffer changes memory domains during an atomic commit. So, move the check from dm_crtc_helper_atomic_check() to amdgpu_dm_atomic_check() and check if the memory domain has changed in amdgpu_dm_atomic_check(). Cc: [email protected] Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2733 Fixes: c1e18c44dc7f ("drm/amd/display: only accept async flips for fast updates") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amdgpu: use doorbell mgr for kfd process doorbellsShashank Sharma6-95/+106
This patch: - adds a doorbell object in kfd pdd structure. - allocates doorbells for a process while creating its queue. - frees the doorbells with pdd destroy. - moves doorbell bitmap init function to kfd_doorbell.c PS: This patch ensures that we don't break the existing KFD functionality, but now KFD userspace library should also create doorbell pages as AMDGPU GEM objects using libdrm functions in userspace. The reference code for the same is available with AMDGPU Usermode queue libdrm MR. Once this is done, we will not need to create process doorbells in kernel. V2: - Do not use doorbell wrapper API, use amdgpu_bo_create_kernel instead (Alex). - Do not use custom doorbell structure, instead use separate variables for bo and doorbell_bitmap (Alex) V3: - Do not allocate doorbell page with PDD, delay doorbell process page allocation until really needed (Felix) Cc: Alex Deucher <[email protected]> Cc: Christian Koenig <[email protected]> Cc: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amdgpu: use doorbell mgr for kfd kernel doorbellsShashank Sharma3-78/+39
This patch: - adds a doorbell bo in kfd device structure. - creates doorbell page for kfd kernel usages. - updates the get_kernel_doorbell and free_kernel_doorbell functions accordingly V2: Do not use wrapper API, use direct amdgpu_create_kernel(Alex) V3: - Move single variable declaration below (Christian) - Add a to-do item to reuse the KGD kernel level doorbells for KFD for non-MES cases, instead of reserving one page (Felix) Cc: Alex Deucher <[email protected]> Cc: Christian Koenig <[email protected]> Cc: Felix Kuehling <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Shashank Sharma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Read replay data from sinkBhawanpreet Lakha2-0/+12
Read DP_SINK_PR_PIXEL_DEVIATION_PER_LINE and DP_SINK_PR_MAX_NUMBER_OF_DEVIATION_LINE Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: Add Freesync Panel DM codeBhawanpreet Lakha7-1/+237
We need certain conditions for replay to be enabled, so create an interface in DM to enable/disable replay. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/pm: update smu_v13_0_6 message vf flagYang Wang1-6/+9
v1: Enable following message in vf mode. - PPSMC_MSG_GetMinGfxclkFreqquency - PPSMC_MSG_GetMaxGfxclkFreqquency - PPSMC_MSG_GetMinDpmFreq - PPSMC_MSG_GetMaxDpmFreq these message will cause pp_dpm_* device node not work properly. v2: the following message is disabled in VF mode. (since pmfw 85.69.0) - PPSMC_MSG_EnableAllSmuFeatures Signed-off-by: Yang Wang <[email protected]> Acked-by: Hawking Zhang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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