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2021-10-19iio: adc: fsl-imx25-gcq: initialize regulators as neededAlexandru Ardelean1-29/+26
The driver tries to initialize all possible regulators from the DT, then match the external regulators with each channel and then release all unused regulators. We can change the logic a bit to initialize regulators only when at least one channel needs them. This change creates a mx25_gcq_ext_regulator_setup() function that is called only for the external regulators. If there's already a reference to an external regulator, the function will just exit early with no error. This way, the driver doesn't need to keep any track of these regulators during init. Signed-off-by: Alexandru Ardelean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: imu: st_lsm6dsx: move max_fifo_size in st_lsm6dsx_fifo_opsLorenzo Bianconi2-9/+11
Move max_fifo_size in st_lsm6dsx_fifo_ops in order to have all FIFO configuration parameters in st_lsm6dsx_fifo_ops structure. This patch does not introduce any logic change, just small code rearrangement. Signed-off-by: Lorenzo Bianconi <[email protected]> Link: https://lore.kernel.org/r/3262ad9d9d1497e19ea1bab208c495c2b9a98994.1632664866.git.lorenzo@kernel.org Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Don't reject external triggers when there is no IRQMiquel Raynal1-9/+14
External triggers do not necessarily need the EOC interrupt to be populated to work properly. The end of conversion status may either come from an interrupt or from a sufficient enough extra delay. IRQs are not mandatory so move the triggered buffer setup out of the IRQ condition and add the logic to wait enough time for all the requested conversions to be in the device's FIFO. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Allow all kind of triggers to be usedMiquel Raynal1-14/+14
There is no reason to limit this driver to its internal trigger. The only difference being, when using an external trigger, the sample conversion must be manually started. Drop the ->validate_trigger() hook in order to allow other triggers to be bound. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Use the EOC IRQ when populated for single readsMiquel Raynal1-4/+39
So far the End-Of-Conversion interrupt was only used in conjunction with the internal trigger to process the data. Let's extend the use of this interrupt handler to support regular single-shot conversions as well. Doing so requires writing our own hard IRQ handler. This handler has to check if buffers are enabled or not: *** Buffers disabled condition *** This means the user requested a single conversion and the sample is ready to be retrieved. -> This implies adding the relevant completion boilerplate. *** Buffers enabled condition *** Triggers are used. So far there is only support for the internal trigger but this trigger might soon be attached to another device as well so it is the core duty to decide which handler to call in order to process the data. The core will decide to either: * Call the internal trigger handler which will extract the data that is already present in the ADC FIFOs or * Call the trigger handler of another driver when using this trigger with another device, even though this call will be slightly delayed by the fact that the max1027 IRQ is a data-ready interrupt rather than a real trigger: -> The new handler will manually inform the core about the trigger having transitioned by directly calling iio_trigger_poll() (which iio_trigger_generic_data_rdy_poll() initially did). In order for the handler to be "source" agnostic, we also need to change the private pointer and provide the IIO device instead of the trigger object. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Stop requesting a threaded IRQMiquel Raynal1-6/+4
The threaded handler is not populated, this means there is nothing running in process context so let's switch to the regular devm_request_irq() call instead. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Introduce an end of conversion helperMiquel Raynal1-2/+16
For now this helper only waits for the maximum duration of a single conversion. In practice, a "temperature measurement" will take twice this time because it will also carry another analog conversion but as here we will only care about the temperature conversion which happens first, we can still only wait for a single sample and get the right data. This helper will soon be improved to properly handle the end of conversion interrupt as well as a higher number of samples. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Separate the IRQ handler from the read logicMiquel Raynal1-4/+19
Create a max1027_read_scan() helper which will make clearer the future IRQ handler updates (no functional change). Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Prevent single channel accesses during buffer readsMiquel Raynal1-4/+7
When hardware buffers are enabled (the cnvst pin being the trigger), one should not mess with the device state by requesting a single channel read. There is already a iio_buffer_enabled() check in *_read_single_value() to merely prevent this situation but the check is inconsistent since buffers can be enabled after the if clause anyway. Instead, use the core mutex by calling iio_device_claim/release_direct_mode(). Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Create a helper to configure the channels to scanMiquel Raynal1-12/+15
These bits are meant to be reused for triggered buffers setup. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Ensure a default cnvst trigger configurationMiquel Raynal1-4/+5
We don't expect the (hardware) cnvst trigger to be enabled at boot time, this is a user choice made in sysfs and there is a dedicated callback to enable/disable this trigger. Hence, we can just ensure it is disabled in the probe at initialization time and then assume that whenever a ->read_raw() call happens, the trigger has been disabled and conversions will start on register write. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Simplify the _set_trigger_state() helperMiquel Raynal1-9/+10
The call to max1027_enable_trigger() is the same in both cases thanks to the 'state' variable, so factorize a little bit to simplify the code and explain why we call this helper. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Create a helper to enable/disable the cnvst triggerMiquel Raynal1-16/+25
There are two ways to physically trigger a conversion: - A falling edge on the cnvst pin - A write operation on the conversion register Let's create a helper for this. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Rename a helperMiquel Raynal1-2/+2
Make it clear that the *_set_trigger_state() hook is responsible for cnvst based conversions by renaming the helper. This may avoid confusions with software trigger support that is going to be introduced. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Minimize the number of converted channelsMiquel Raynal1-7/+53
Provide a list of ->available_scan_masks which match the device's capabilities. Basically, these devices are able to scan from 0 to N, N being the highest voltage channel requested by the user. The temperature can be included or not, but cannot be retrieved alone. The consequence is, instead of reading and pushing to the IIO buffers all channels each time, the "minimum" number of channels will be scanned and pushed based on the ->active_scan_mask. For example, if the user wants channels 1, 4 and 5, all channels from 0 to 5 will be scanned and pushed to the IIO buffers. The core will then filter out the unneeded samples based on the ->active_scan_mask that has been selected and only channels 1, 4 and 5 will be available to the user in the shared buffer. Provide a comment in the code explaining this logic. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Drop useless debug messagesMiquel Raynal1-4/+0
These two debug messages bring absolutely no value, let's drop them. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Drop extra warning messageMiquel Raynal1-3/+1
Memory allocation errors automatically trigger the right logs, no need to have our own. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: max1027: Fix styleMiquel Raynal1-7/+7
Follow checkpatch.pl's main advices before hacking into the driver, mainly: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: Prefer 'unsigned int *' to bare use of 'unsigned *' CHECK: Comparison to NULL could be written "!foo" CHECK: Alignment should match open parenthesis Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19MAINTAINERS: Add the driver info of the NXP IMX8QXPCai Huoqing1-0/+7
The NXP i.MX 8QuadXPlus SOC has a new ADC IP. After adding the driver support for it, I add the driver info of the NXP IMX8QXP ADC to MAINTAINERS file. Signed-off-by: Cai Huoqing <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19dt-bindings: iio: adc: Add binding documentation for NXP IMX8QXP ADCCai Huoqing1-0/+78
The NXP i.MX 8QuadXPlus SOC a new ADC IP, so add binding documentation for NXP IMX8QXP ADC. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Cai Huoqing <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: imx8qxp-adc: Add driver support for NXP IMX8QXP ADCCai Huoqing3-0/+505
The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add driver support for this ADC. Signed-off-by: Cai Huoqing <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: accel: fxls8962af: add wake on eventSean Nyekjaer1-2/+44
This adds ways for the SoC to wake from accelerometer wake events. In the suspend function we skip disabling the sensor if wakeup-source and events are activated. If buffered reads are enabled they will be deactivated before suspend. As the onboard buffer is only holding up to 32 12-bit X/Y/Z data triplets. Signed-off-by: Sean Nyekjaer <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: accel: fxls8962af: add threshold event handlingSean Nyekjaer1-3/+298
Add event channels that control the creation of motion events. Signed-off-by: Sean Nyekjaer <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Get and set trimming data.Billy Tsai1-0/+71
The ADC controller has a trimming register for fine-tune the reference voltage. The trimming value comes from the OTP register which will be written during chip production. This patch will read this OTP value and configure it to the ADC register when the ADC controller probes and using dts property "aspeed,trim-data-valid" to determine whether to execute this flow. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Support battery sensing.Billy Tsai1-3/+78
In ast2600, ADC integrate dividing circuit at last input channel for battery sensing. This patch use the dts property "battery-sensing" to enable this feature makes the last channel of each adc can tolerance higher voltage than reference voltage. The offset interface of ch7 will be separated when enabling the battery sensing mode. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Add compensation phase.Billy Tsai1-1/+53
This patch adds a compensation phase to improve the accuracy of ADC measurement. This is the built-in function through input half of the reference voltage to get the ADC offset. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Add func to set sampling rate.Billy Tsai1-19/+39
Add the function to set the sampling rate and keep the sampling period for a driver used to wait the fresh value. In addition, since the ADC clock is required when initializing the ADC device, move clk_prepare_enable ahead of the initialization phase. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Fix the calculate error of clock.Billy Tsai1-0/+27
The ADC clock formula is ast2400/2500: ADC clock period = PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) ast2600: ADC clock period = PCLK * 2 * (ADC0C[15:0] + 1) They all have one fixed divided 2 and the legacy driver didn't handle it. This patch register the fixed factory clock device as the parent of ADC clock scaler to fix this issue. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Support ast2600 adc.Billy Tsai1-5/+96
Make driver to support ast2600 adc device. - Use shared reset controller - Complete the vref configure function - Add the model data for ast2600 adc Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Use devm_add_action_or_reset.Billy Tsai1-58/+55
This patch use devm_add_action_or_reset to handle the error in probe phase. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Use model_data to set clk scaler.Billy Tsai1-16/+27
This patch uses need_prescaler and scaler_bit_width to set the ADC clock scaler. Reported-by: kernel test robot <[email protected]> Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Add vref config functionBilly Tsai1-1/+17
Add the function to check the vref_fixed_mv and set the value to driver data. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Restructure the model dataBilly Tsai1-5/+15
This patch refactors the model data structure to distinguish the function form different versions of aspeed ADC. - Rename the vref_voltage to vref_fixed_mv and add vref_mv driver data When driver probe will check vref_fixed_mv value and store it to vref_mv which isn't const value. - Add num_channels Make num_channles of iio device can be changed by different model_data - Add need_prescaler flag and scaler_bit_width The need_prescaler flag is used to tell the driver the clock divider needs another Prescaler and the scaler_bit_width to set the clock divider bitfield width. Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: adc: aspeed: Keep model data to driver data.Billy Tsai1-13/+7
Keep the model data pointer to driver data for reducing the usage of of_device_get_match_data(). Signed-off-by: Billy Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: ABI: Document in_concentration_co2_scaleJacopo Mondi1-0/+1
Document the 'in_concentration_co2_scale' standard IIO attribute. Signed-off-by: Jacopo Mondi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: chemical: Add Senseair Sunrise 006-0-007 driverJacopo Mondi4-0/+555
Add support for the Senseair Sunrise 006-0-0007 driver through the IIO subsystem. Datasheet: https://rmtplusstoragesenseair.blob.core.windows.net/docs/Dev/publicerat/TDE5531.pdf Signed-off-by: Jacopo Mondi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19iio: ABI: docs: Document Senseair Sunrise ABIJacopo Mondi1-0/+38
Add documentation for the sysfs attributes of the sunrise_co2 driver. Signed-off-by: Jacopo Mondi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19dt-bindings: iio: chemical: Document senseair,sunrise CO2 sensorJacopo Mondi2-0/+57
Add documentation for the Senseair Sunrise 006-0-0007 CO2 NDIR sensor. Signed-off-by: Jacopo Mondi <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19dt-bindings: iio: magnetometer: asahi-kasei,ak8975 add vid regDavid Heidelberg1-0/+5
Driver and device-tree also use vid-supply regulator. Fixes: 7e000fbff7a0 ("dt-bindings: iio: magnetometer: ak8975: convert format to yaml, add maintainer") Signed-off-by: David Heidelberg <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-19Merge tag 'counter-for-5.16a-take2' of ↵Greg Kroah-Hartman29-2794/+3604
https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next Jonathan writes: First set of counter subsystem new feature support for the 5.16 cycle Most interesting element this time is the new chrdev based interface for the counter subsystem. Affects all drivers. Some minor precursor patches. Major parts: * Bring all the sysfs attribute setup into the counter core rather than leaving it to individual drivers. Docs updates accompany these changes. * Move various definitions to a uapi header as now needed from userspace. * Add the chardev interface + extensive documentation and example tool * Add new ABI needed to identify indexes needed for chrdev interface * Implement new interface for the 104-quad-8 * Follow up deals with wrong path for documentation build * Various trivial cleanups and missing feature additions related to this series * tag 'counter-for-5.16a-take2' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: docs: counter: Include counter-chrdev kernel-doc to generic-counter.rst counter: fix docum. build problems after filename change counter: microchip-tcb-capture: Tidy up a false kernel-doc /** marking. counter: 104-quad-8: Add IRQ support for the ACCES 104-QUAD-8 counter: 104-quad-8: Replace mutex with spinlock counter: Implement events_queue_size sysfs attribute counter: Implement *_component_id sysfs attributes counter: Implement signalZ_action_component_id sysfs attribute tools/counter: Create Counter tools docs: counter: Document character device interface counter: Add character device interface counter: Move counter enums to uapi header docs: counter: Update to reflect sysfs internalization counter: Update counter.h comments to reflect sysfs internalization counter: Internalize sysfs interface code counter: stm32-timer-cnt: Provide defines for slave mode selection counter: stm32-lptimer-cnt: Provide defines for clock polarities
2021-10-18docs: counter: Include counter-chrdev kernel-doc to generic-counter.rstWilliam Breathitt Gray1-0/+3
The counter-chrdev.c file exports the counter_push_event() function. Signed-off-by: William Breathitt Gray <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-18counter: fix docum. build problems after filename changeRandy Dunlap1-1/+1
Fix documentation build warnings due to a source file being renamed. WARNING: kernel-doc '../scripts/kernel-doc -rst -enable-lineno -sphinx-version 1.8.5 -export ../drivers/counter/counter.c' failed with return code 2 Error: Cannot open file ../drivers/counter/counter.c Fixes: aaec1a0f76ec ("counter: Internalize sysfs interface code") Signed-off-by: Randy Dunlap <[email protected]> Cc: William Breathitt Gray <[email protected]> Cc: [email protected] Cc: Jonathan Cameron <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: [email protected] Acked-by: William Breathitt Gray <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2021-10-18habanalabs: refactor fence handling in hl_cs_poll_fencesDani Liberman1-35/+36
To avoid checking if fence exists multipled times, changed fence handling to depend only on the fence status field: Busy, which means CS still did not completed : Add its QID so multi CS wait on its completion. Finished, which means CS completed and fence exists: Raise its completion bit if it finished mcs handling and update if necessary the earliest timestamp. Gone, which means CS already completed and fence deleted: Update multi CS data to ignore timestamp and raise its completion bit. Signed-off-by: Dani Liberman <[email protected]> Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2021-10-18habanalabs: context cleanup cosmeticsOmer Shpigelman1-7/+1
No need to check the return value if the following action is the same for both cases. In addition, now that hl_ctx_free() doesn't print if the context is not released, its name can be misleading as the context might stay alive after it is executed with no indication for that. Hence we can discard it and simply put the refcount. Signed-off-by: Omer Shpigelman <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2021-10-18habanalabs: simplify wait for interrupt with timestamp flowYuri Nudelman3-10/+7
Remove the flag that determines whether to take a timestamp once the interrupt arrives. Instead, always take the timestamp once per interrupt. This is a must for the user-space to measure its graph operations to evaluate the graph computation time. Signed-off-by: Yuri Nudelman <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2021-10-18habanalabs: initialize hpriv fields before adding new nodeMoti Haimovski1-8/+15
When adding a new node to the hpriv list, the driver should initialize its fields before adding the new node. Otherwise, there may be some small chance of another thread traversing that list and accessing the new node's fields without them being initialized. Signed-off-by: Moti Haimovski <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2021-10-18habanalabs: Unify frequency set/get functionalityRajaravi Krishna Katta9-65/+38
Make the frequency set/get functionality common to all ASICs. This makes more code reusable when adding support for newer ASICs. Signed-off-by: Rajaravi Krishna Katta <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2021-10-18habanalabs: select CRC32Vegard Nossum1-0/+1
Fix the following build/link error by adding a dependency on the CRC32 routines: ld: drivers/misc/habanalabs/common/firmware_if.o: in function `hl_fw_dynamic_request_descriptor': firmware_if.c:(.text.unlikely+0xc89): undefined reference to `crc32_le' Fixes: 8a43c83fec12 ("habanalabs: load boot fit to device") Signed-off-by: Vegard Nossum <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2021-10-18habanalabs: add support for dma-buf exporterTomer Tayar5-3/+535
Implement the calls to the dma-buf kernel api to create a dma-buf object backed by FD. We block the option to mmap the DMA-BUF object because we don't support DIRECT_IO and implicit P2P. We only implement support for explicit P2P through importing the FD of the DMA-BUF. In the export phase, we provide to the DMA-BUF object an array of pages that represent the device's memory area. During the map callback, we convert the array of pages into an SGT. We split/merge the pages according to the dma max segment size of the importer. To get the DMA address of the PCI bar, we use the dma_map_resources() kernel API, because our device memory is not backed by page struct and this API doesn't need page struct to map the physical address to a DMA address. We set the orig_nents member of the SGT to be 0, to indicate to other drivers that we don't support CPU mappings. Note that in Habanalabs's ASICs, the device memory is pinned and immutable. Therefore, there is no need for dynamic mappings and pinning callbacks. Also note that in GAUDI we don't have an MMU towards the device memory and the user works on physical addresses. Therefore, the user doesn't pass through the kernel driver to allocate memory there. As a result, only for GAUDI we receive from the user a device memory physical address (instead of a handle) and a size. We check the p2p distance using pci_p2pdma_distance_many() and refusing to map dmabuf in case the distance doesn't allow p2p. Signed-off-by: Tomer Tayar <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Reviewed-by: Gal Pressman <[email protected]> Reviewed-by: Greg Kroah-Hartman <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2021-10-18habanalabs: define uAPI to export FD for DMA-BUFOded Gabbay1-1/+27
User process might want to share the device memory with another driver/device, and to allow it to access it over PCIe (P2P). To enable this, we utilize the dma-buf mechanism and add a dma-buf exporter support, so the other driver can import the device memory and access it. The device memory is allocated using our existing allocation uAPI, where the user will get a handle that represents the allocation. The user will then need to call the new uAPI (HL_MEM_OP_EXPORT_DMABUF_FD) and give the handle as a parameter. The driver will return a FD that represents the DMA-BUF object that was created to match that allocation. Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Tomer Tayar <[email protected]> Reviewed-by: Greg Kroah-Hartman <[email protected]> Acked-by: Daniel Vetter <[email protected]>