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2018-03-14drm/amdgpu: Move IH clientid defs to separate fileOak Zeng12-67/+98
This is preparation for sharing client ID definitions between amdgpu and amdkfd Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: update dce_calcs to latest versionDmytro Laktyushkin2-56/+110
Bw spreadsheet was updated while dce_calcs was not Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Set disp clk in a safe way to avoid over high dpp clk. (v2)Yongqiang Sun3-23/+139
Increase clock, if current dpp div is 0 and request dpp div is 1, request clk is higher than maximum dpp clk as per dpm table. set dispclk to the value of maximum supported dpp clk set div to 1 set dispclk to request value. Decrease clock, currrent dpp div is 1 and request dpp div is 0, current clk is higher than maximum dpp clk as per dpm table. set dispclk to the value of maximum supported dpp clk set div to 0 set dispclk to request value. v2: squash in !DCN build fix Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: add support for regkey "LCDFreeSyncDefault"Samson Tam1-0/+26
Signed-off-by: Samson Tam <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Correct the plane enumeration order (v2)Shirish S1-24/+53
The order of planes is given by the order they are enumerated by kms. Planes with a higher ID appears above planes with a lower ID. Currently the planes are enumerated in the wrong order, putting the nv12 only plane after the two RGBA planes. This patch corrects the plane enumeration order such that all the overlay planes are initialized first then the primary planes. Due to this change in order the dc_add_plane_to_context() shall receive the planes in reverse order hence this patch reverses the parsing of planes in DM side itself. v2: drop local reverse macro for upstream Signed-off-by: Shirish S <[email protected]> Signed-off-by: Pratik Vishwakarma <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Fix handling of linear transfer functionVitaly Prosyak1-2/+4
Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: dal 3.1.38Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Add variable refresh rate parameters to DC structuresAnthony Koo4-1/+33
Time stamping will be part of surface, and will be updated when address is flipped. FreeSync parameters will be attached to stream, as it adjusts the timing dynamically. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Implement stats loggingAnthony Koo6-31/+510
Stats will be used for debug purposes Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: early return if not in vga mode in disable_vgaEric Yang2-4/+10
The work around for hw bug causes S3 resume failure. Don't execute disable vga logic if not in vga mode. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Enable backlight support for pre-DCE11 ASICsMikita Lipski3-0/+172
Initializing ABM and DMCU modules for dce 80/81/83/100 as in DCE110 Adding constructors and destructors for each module. Adding register list for DMCU in dce80 as some registers are missing in dce80 from the basic list. DMCU is never used, so it would not have any functional impact. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: use HW hdr mult for brightness boostKrunoslav Kovac6-7/+45
In MPO scenario when playing SDR clip in HDR desktop mode, Win is boosting desktop and requests driver to boost MPO. But driver boosting is currently done in regamma which is stream property and thus shared between grph and video. Redesigning the boosting in RV: use CM_HDR_MULT register which was added for this scenario. It also has the benefit that it can be done in HIRQL. Signed-off-by: Krunoslav Kovac <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Use MACROS instead of dm_loggerBhawanpreet Lakha3-13/+11
Use DC_LOGGER macro for logs. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Move DTRACE and dml_print definesBhawanpreet Lakha4-2/+37
These MACROS are only being used by a few files but gets pulled in by dc.h Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Modified set bandwidth sequence.Yongqiang Sun3-12/+38
This change make sure bandwidth is set properly. For increase bandwidth, set bandwidth before backend and front end programming. For decrease bandwidth, set bandwidth after. To avoid smu hang when reboot and dpms due to 0 disp clk, keep min disp clock as 100Mhz. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: fix check condition for edp power controlEric Yang2-7/+17
Per discussion with VBIOS team, the orginal check is not correct in all cases on latest VBIOS. Additional check is needed. This change should maintain old behaviour on older VBIOS. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Fix takover from VGA modeBhawanpreet Lakha2-2/+18
HW Engineer's Notes: During switch from vga->extended, if we set the VGA_TEST_ENABLE and then hit the VGA_TEST_RENDER_START, then the DCHUBP timing gets updated correctly. Then vBIOS will have it poll for the VGA_TEST_RENDER_DONE and unset VGA_TEST_ENABLE, to leave it in the same state as before. Signed-off-by: Bhawanpreet Lakha <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Allow passing of syspll id to get_smu_clock_infoJerry (Fangzhi) Zuo3-6/+7
Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Remove 300Mhz minimum disp clk limit.Yongqiang Sun3-5/+5
300Mhz disp clk limit was a workaround that was fixed in SMU and is no longer needed. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Convert CTM to 2's complementLeo (Sunpeng) Li1-3/+12
DRM's documentation for the color transform matrix does not specify whether the values are in signed-magnitude, or 2's complement. Therefore, it was assumed to use 2's complement. However, existing usermode implementations use signed-magnitude. Therefore, conform to existing standards, and convert to 2's complement internally. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Varibright add null checkSivapiriyanKumarasamy1-1/+1
Add null check for stream update Signed-off-by: SivapiriyanKumarasamy <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Varibright fix bug and review commentsSivapiriyanKumarasamy7-19/+37
Fix bug and make changes from review 132656 Signed-off-by: SivapiriyanKumarasamy <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Vari-bright looks disabled near end of MM14SivapiriyanKumarasamy4-12/+40
Avoid hanging DMCU by setting abm level only when OTG unblanked Signed-off-by: SivapiriyanKumarasamy <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Use correct error codesLeo (Sunpeng) Li1-6/+3
Should return -ENOMEM when allocation fails. Also, just return the error code instead of using a variable. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/display: Fix memleaks when atomic check fails.Leo (Sunpeng) Li1-9/+25
While checking plane states for updates during atomic check, we create dc_plane_states in preparation. These dc states should be freed if something errors. Although the input transfer function is also freed by dc_plane_state_release(), we should free it (on error) under the same scope as where it is created. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: Remove some unused elements from amdgpu_connector structHarry Wentland1-29/+0
They were used by amdgpu_dm at some point but since it has its own amdgpu_dm_connector now these aren't needed anymore. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: save/restore backlight level in legacy dce codeAlex Deucher7-2/+40
Save/restore the backlight level scratch register in S3/S4 so the backlight level comes back at the previously requested level. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=199047 Fixes: 4ec6ecf48c64d (drm/amdgpu: drop scratch regs save and restore from S3/S4 handling) Acked-by: Michel Dänzer <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/radeon: fix prime teardown orderChristian König2-2/+2
We unmapped imported DMA-bufs when the GEM handle was dropped, not when the hardware was done with the buffere. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> CC: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: fix prime teardown orderChristian König2-2/+2
We unmapped imported DMA-bufs when the GEM handle was dropped, not when the hardware was done with the buffere. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> CC: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: explicit give BO type to amdgpu_bo_createChristian König12-66/+60
Drop the "kernel" and sg parameter and give the BO type to create explicit to amdgpu_bo_create instead of figuring it out from the parameters. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: initial validate the prime BOs into the CPU domainChristian König1-1/+3
Just set the GTT domain as mandatory, so that the BO is validated into it on first use. This allows us to setup the sg table later on. Signed-off-by: Christian König <[email protected]> Acked-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: drop the backing store when DMA-buf imports are evictedChristian König1-0/+6
Instead of moving this to the SYSTEM domain just drop the backing store and let the resulting allocation be freed. Signed-off-by: Christian König <[email protected]> Acked-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/ttm: move initializing ttm->sg into ttm_tt_init_fieldsChristian König1-3/+1
Better to set this with all other fields as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/ttm: add bo as parameter to the ttm_tt_create callbackChristian König18-87/+75
Instead of calculating the size in bytes just to recalculate the number of pages from it pass the BO directly to the function. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/ttm: add ttm_bo_pipeline_guttingChristian König3-3/+45
Allows us to gut a BO of it's backing store when the driver says that it isn't needed any more. Signed-off-by: Christian König <[email protected]> Acked-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: refactoring mailbox to fix TDR handshake bugs(v2)Monk Liu2-94/+109
this patch actually refactor mailbox implmentations, and all below changes are needed together to fix all those mailbox handshake issues exposured by heavey TDR test. 1)refactor all mailbox functions based on byte accessing for mb_control reason is to avoid touching non-related bits when writing trn/rcv part of mailbox_control, this way some incorrect INTR sent to hypervisor side could be avoided, and it fixes couple handshake bug. 2)trans_msg function re-impled: put a invalid logic before transmitting message to make sure the ACK bit is in a clear status, otherwise there is chance that ACK asserted already before transmitting message and lead to fake ACK polling. (hypervisor side have some tricks to workaround ACK bit being corrupted by VF FLR which hase an side effects that may make guest side ACK bit asserted wrongly), and clear TRANS_MSG words after message transferred. 3)for mailbox_flr_work, it is also re-worked: it takes the mutex lock first if invoked, to block gpu recover's participate too early while hypervisor side is doing VF FLR. (hypervisor sends FLR_NOTIFY to guest before doing VF FLR and sentds FLR_COMPLETE after VF FLR done, and the FLR_NOTIFY will trigger interrupt to guest which lead to mailbox_flr_work being invoked) This can avoid the issue that mailbox trans msg being cleared by its VF FLR. 4)for mailbox_rcv_irq IRQ routine, it should only peek msg and schedule mailbox_flr_work, instead of ACK to hypervisor itself, because FLR_NOTIFY msg sent from hypervisor side doesn't need VF's ACK (this is because VF's ACK would lead to hypervisor clear its trans_valid/msg, and this would cause handshake bug if trans_valid/msg is cleared not due to correct VF ACK but from a wrong VF ACK like this "FLR_NOTIFY" one) This fixed handshake bug that sometimes GUEST always couldn't receive "READY_TO_ACCESS_GPU" msg from hypervisor. 5)seperate polling time limite accordingly: POLL ACK cost no more than 500ms POLL MSG cost no more than 12000ms POLL FLR finish cost no more than 500ms 6) we still need to set adev into in_gpu_reset mode after we received FLR_NOTIFY from host side, this can prevent innocent app wrongly succesed to open amdgpu dri device. FLR_NOFITY is received due to an IDLE hang detected from hypervisor side which indicating GPU is already die in this VF. v2: use MACRO as the offset of mailbox_control register don't test if NOTIFY_CMPL event in rcv_msg since it won't recieve that message anymore Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: implement mmio byte access helper for MBMonk Liu2-0/+32
mailbox registers can be accessed with a byte boundry according to BIF team, so this patch prepares register byte access and will be used by following patches. Actually, for mailbox registers once the byte field is touched even not changed, the mailbox behaves, so we need the byte width accessing to those sort of regs. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: query vram type from atombiosHawking Zhang4-7/+94
The vram type for dGPU is stored in umc_info while sys mem type for APU is stored in integratedsysteminfo Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amd/amdgpu: Add missing "DDR4" labelTom St Denis1-1/+2
The commit d296278fd372003fc69588acfd0c0c5edbdf4874 added support for detecting DDR4 but omitted the label that is printed out in amdgpu_bo_init() resulting in a KASAN error. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: Correct the amdgpu_ucode_fini_bo place for TongaEmily Deng2-3/+3
The amdgpu_ucode_fini_bo should be called after gfx_v8_0_hw_fini, or it will have KCQ disable failed issue. For Tonga, as it firstly finishes SMC block, and the SMC hw fini will call amdgpu_ucode_fini, which will lead the amdgpu_ucode_fini_bo called before gfx_v8_0_hw_fini, this is incorrect. Signed-off-by: Emily Deng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: Correct the place of amdgpu_pm_sysfs_finiEmily Deng1-1/+1
The amdgpu_pm_sysfs_fini should call before amdgpu_device_ip_fini, or the adev->pm.dpm_enabled would be set to 0, then the device files related to pp won't be removed by amdgpu_pm_sysfs_fini when unload driver. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/amdgpu: stop allocating a page array for prime shared BOsChristian König2-3/+4
We don't need the page array for prime shared BOs, stop allocating it. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/ttm: add ttm_sg_tt_initChristian König2-9/+47
This allows drivers to only allocate dma addresses, but not a page array. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14drm/ttm: move ttm_tt defines into ttm_tt.hChristian König3-242/+273
Let's stop mangling everything in a single header and create one header per object instead. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Acked-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-14Merge tag 'drm-intel-next-2018-03-08' of ↵Dave Airlie110-3620/+5510
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Query uAPI interface (used for GPU topology information currently) * Mesa: https://patchwork.freedesktop.org/series/38795/ Driver Changes: - Increase PSR2 size for CNL (DK) - Avoid retraining LSPCON link unnecessarily (Ville) - Decrease request signaling latency (Chris) - GuC error capture fix (Daniele) * tag 'drm-intel-next-2018-03-08' of git://anongit.freedesktop.org/drm/drm-intel: (127 commits) drm/i915: Update DRIVER_DATE to 20180308 drm/i915: add schedule out notification of preempted but completed request drm/i915: expose rcs topology through query uAPI drm/i915: add query uAPI drm/i915: add rcs topology to error state drm/i915/debugfs: add rcs topology entry drm/i915/debugfs: reuse max slice/subslices already stored in sseu drm/i915: store all subslice masks drm/i915/guc: work around gcc-4.4.4 union initializer issue drm/i915/cnl: Add Wa_2201832410 drm/i915/icl: Gen11 forcewake support drm/i915/icl: Add Indirect Context Offset for Gen11 drm/i915/icl: Enhanced execution list support drm/i915/icl: new context descriptor support drm/i915/icl: Correctly initialize the Gen11 engines drm/i915: Assert that the request is indeed complete when signaled from irq drm/i915: Handle changing enable_fbc parameter at runtime better. drm/i915: Track whether the DP link is trained or not drm/i915: Nuke intel_dp->channel_eq_status drm/i915: Move SST DP link retraining into the ->post_hotplug() hook ...
2018-03-14Merge tag 'drm-amdkfd-next-2018-03-11' of ↵Dave Airlie41-362/+3757
git://people.freedesktop.org/~gabbayo/linux into drm-next Major points for this pull request: - Add dGPU support for amdkfd initialization code and queue handling. It's not complete support since the GPUVM part is missing (the under debate stuff). - Enable PCIe atomics for dGPU if present - Various adjustments to the amdgpu<-->amdkfd interface for dGPUs - Refactor IOMMUv2 code to allow loading amdkfd without IOMMUv2 in the system - Add HSA process eviction code in case of system memory pressure - Various fixes and small changes * tag 'drm-amdkfd-next-2018-03-11' of git://people.freedesktop.org/~gabbayo/linux: (24 commits) uapi: Fix type used in ioctl parameter structures drm/amdkfd: Implement KFD process eviction/restore drm/amdkfd: Add GPUVM virtual address space to PDD drm/amdkfd: Remove unaligned memory access drm/amdkfd: Centralize IOMMUv2 code and make it conditional drm/amdgpu: Add submit IB function for KFD drm/amdgpu: Add GPUVM memory management functions for KFD drm/amdgpu: add amdgpu_sync_clone drm/amdgpu: Update kgd2kfd_shared_resources for dGPU support drm/amdgpu: Add KFD eviction fence drm/amdgpu: Remove unused kfd2kgd interface drm/amdgpu: Fix wrong mask in get_atc_vmid_pasid_mapping_pasid drm/amdgpu: Fix header file dependencies drm/amdgpu: Replace kgd_mem with amdgpu_bo for kernel pinned gtt mem drm/amdgpu: remove useless BUG_ONs drm/amdgpu: Enable KFD initialization on dGPUs drm/amdkfd: Add dGPU device IDs and device info drm/amdkfd: Add dGPU support to kernel_queue_init drm/amdkfd: Add dGPU support to the MQD manager drm/amdkfd: Add dGPU support to the device queue manager ...
2018-03-14Merge tag 'drm-misc-next-2018-03-09-3' of ↵Dave Airlie96-678/+1800
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 4.17: UAPI Changes: plane: Add color encoding/range properties (Jyri) nouveau: Replace iturbt_709 property with color_encoding property (Ville) Core Changes: atomic: Move plane clipping into plane check helper (Ville) property: Multiple new property checks/verification (Ville) Driver Changes: rockchip: Fixes & improvements for rk3399/chromebook plus (various) sun4i: Add H3/H5 HDMI support (Jernej) i915: Add support for limited/full-range ycbcr toggling (Ville) pl111: Add bandwidth checking/limiting (Linus) Cc: Jernej Skrabec <[email protected]> Cc: Jyri Sarha <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Linus Walleij <[email protected]> * tag 'drm-misc-next-2018-03-09-3' of git://anongit.freedesktop.org/drm/drm-misc: (85 commits) drm/rockchip: Don't use atomic constructs for psr drm/rockchip: analogix_dp: set psr activate/deactivate when enable/disable bridge drm/rockchip: dw_hdmi: Move HDMI vpll clock enable to bind() drm/rockchip: inno_hdmi: reorder clk_disable_unprepare call in unbind drm/rockchip: inno_hdmi: Fix error handling path. drm/rockchip: dw-mipi-dsi: Fix connector and encoder cleanup. drm/nouveau: Replace the iturbt_709 prop with the standard COLOR_ENCODING prop drm/pl111: Use max memory bandwidth for resolution drm/bridge: sii902x: Retry status read after DDI I2C drm/pl111: Handle the RealView variant separately drm/pl111: Make the default BPP a per-variant variable drm: simple_kms_helper: Fix .mode_valid() documentation bridge: Elaborate a bit on dumb VGA bridges in Kconfig drm/atomic: Add new reverse iterator over all plane state (V2) drm: Reject bad property flag combinations drm: Make property flags u32 drm/uapi: Deprecate DRM_MODE_PROP_PENDING drm: WARN when trying to add enum value > 63 to a bitmask property drm: WARN when trying add enum values to non-enum/bitmask properties drm: Reject replacing property enum values ...
2018-03-14drm/amd/pp: fix missing CONFIG_ACPI.Dave Airlie1-0/+2
This was stopping me building on ARM after last pull. Signed-off-by: Dave Airlie <[email protected]>
2018-03-09Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie181-4308/+35627
into drm-next More stuff for 4.17. Highlights: - More fixes for "wattman" like functionality (fine grained clk/voltage control) - Add more power profile infrastucture (context based dpm) - SR-IOV fixes - Add iomem debugging interface for use with umr - Powerplay and cgs cleanups - DC fixes and cleanups - ttm improvements - Misc cleanups all over * 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (143 commits) drm/amdgpu:Always save uvd vcpu_bo in VM Mode drm/amdgpu:Correct max uvd handles drm/amdgpu: replace iova debugfs file with iomem (v3) drm/amd/display: validate plane format on primary plane drm/amdgpu: Clean sdma wptr register when only enable wptr polling drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files drm/amdgpu: give warning before sleep in kiq_r/wreg drm/amdgpu: further mitigate workaround for i915 drm/amdgpu: drop gtt->adev drm/amdgpu: add amdgpu_evict_gtt debugfs entry drm/amd/pp: Add #ifdef checks for CONFIG_ACPI drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory" drm/amd/pp: Drop wrapper functions for upper/lower_32_bits drm/amdgpu: Delete cgs wrapper functions for gpu memory manager drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory drm/amd/pp: Remove cgs wrapper function for temperature update Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature" drm/amd/pp: Add auto power profilng switch based on workloads (v2) drm/amd/pp: Revert gfx/compute profile switch sysfs drm/amd/pp: Fix sclk in highest two levels when compute on smu7 ...
2018-03-09Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/media into drm-nextDave Airlie49-1124/+1884
- Convert LVDS support to a drm_bridge driver - Add DT bindings for the R8A77995 SoC - Add DT bindings and driver support for the R8A77970 SoC Note that the LVDS conversion depends on a patch series from Frank Rowand that will make it upstream through Rob Herring's tree. Frank has provided a stable branch based on v4.16-rc1 with the patches, and both Rob and I have merged it into our trees. This should thus generate no conflict when reaching -next. * 'drm/next/du' of git://linuxtv.org/pinchartl/media: dt-bindings: display: renesas: lvds: Document r8a77995 bindings dt-bindings: display: renesas: du: Document r8a77995 bindings drm: rcar-du: lvds: Add R8A77970 support drm: rcar-du: Add R8A77970 support dt-bindings: display: renesas: lvds: Document R8A77970 bindings dt-bindings: display: renesas: du: Document R8A77970 bindings drm: rcar-du: Convert LVDS encoder code to bridge driver drm: rcar-du: Fix legacy DT to create LVDS encoder nodes dt-bindings: display: renesas: Deprecate LVDS support in the DU bindings dt-bindings: display: renesas: Add R-Car LVDS encoder DT bindings of: improve reporting invalid overlay target path of: convert unittest overlay devicetree source to sugar syntax of: Documentation: of_overlay_apply() replaced by of_overlay_fdt_apply() of: change overlay apply input data from unflattened to FDT x86: devicetree: fix config option around x86_flattree_get_config()
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