Age | Commit message (Collapse) | Author | Files | Lines |
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Change return code to EOPNOTSUPP for unsupported functions. Use the
error code information to hide sysfs nodes not valid for the SOC.
Signed-off-by: Lijo Lazar <[email protected]>
Reviewed-by: Yang Wang <[email protected]>
Reviewed-by: Asad Kamal <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Doorbell rptr/wptr can be set through multiple ways including direct
register initialization. Disable doorbell during hw_fini once the ring
is disabled so that during next module reload direct initialization
takes effect. Also, move the direct initialization after minor update is
set to 1 since rptr/wptr are reinitialized back to 0 which could be
lower than the previous doorbell value (ex: cases like module reload).
Signed-off-by: Lijo Lazar <[email protected]>
Reviewed-by: Le Ma <[email protected]>
Reviewed-by: Asad Kamal <[email protected]>
Tested-by: Asad Kamal <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Set the default reset method to mode2 for SMU IP v14.0.0
Signed-off-by: Jiadong Zhu <[email protected]>
Reviewed-by: Yifan Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
A recent refactor of DC's DP test pattern automation code requires the
DC stream's test pattern and test pattern color space fields to be
correctly populated before calling dc_link_dp_set_test_pattern.
[How]
Populate stream's test pattern type and color space fields before
calling into DC to program DP test pattern.
Reviewed-by: Aurabindo Pillai <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
DML2 does not handle the case when we have
a single stream sourcing 2 or more planes
that are duplicates of one another. To properly
handle this scenario, pipe index to plane index
mapping is used to decide which plane is being
processed and programmed.
[how]
Create static array of pipe index to plane index map.
Populate the array properly and use in appropriate places.
Reviewed-by: Xi (Alex) Liu <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Sung Joon Kim <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Description]
- Similar to FPO, SubVP should also force cursor P-State
allow instead of relying on natural assertion
- Implement code path to force and unforce cursor P-State
allow for SubVP
Reviewed-by: Samson Tam <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Enable the last of the RCO options for dcn35
[How]
Breakout RCO from dccg35_set_physymclk so that
physymclk RCO can be set in dccg_init without
disabling physymclk
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Clean-up the code to remove references of all unused
dml architecture versions since only dml2 is actively
used.
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Chaitanya Dhere <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Summary:
- Enable DCN35 physymclk root clock gating
- Fix DP automation test pattern bug
- Disable OTG for mode timing switch on DCN35
- Refactor DML2
- Revert Fix handling duplicate planes on one stream
- Revert Enable DCN clock gating
- Implement cursor P-State allow for SubVP
- Optimize pipe otg allocation
- Save and restore mall state while switching from ODM to Subvp
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
There is a case when we are switching from ODM combine to Subvp where
minimal transition based off subvp state is required. In thise case, we
need to save and restore mall state when applying minimal transition.
Reviewed-by: Dillon Varone <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Wenjing Liu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
DCN32 uses ABM register definitions in dcn32_resource.h, remove
duplicate from dce_abm.h to avoid confusion.
Reviewed-by: Dillon Varone <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Joshua Aberback <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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For all the components that participate in DCN architecture, there is a
header in the dc/inch/hw. For some reason, OPTC broke this pattern and
added all the primary functions/structs associated with that in the
dcn10_optc.h file. For consistency's sake, this commit introduces a new
optc.h file and extracts the code from dcn10_optc to this new file.
Reviewed-by: Hamza Mahfooz <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
Doing a mode timing change causes a hang when OTG is not disabled.
[how]
Add link_enc null check in disable_otg_wa to cover this case.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Ovidiu Bunea <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Current Desync IRQ handler will have some potential do not hit the
desync error case. We change to check both desync error HPD and DPCD.
Signed-off-by: Dennis Chan <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Reviewed-by: Robin Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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- Increase number of bits for IPS boot option
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Anthony Koo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This version brings along following fixes:
Update test link rate DPCD bit field to match spec
Enable RCO options for dcn35
Add missing dml2 init value for dcn35
Enable DCN clock gating
DCN35 Disable cm power optimization
Allow 16 max_slices for DP2 DSC
Fix OTG disable workaround logic
Enable more IPS options
Fix FRL assertion on boot
Fix missing blendTF programming
Update DP HPO MSA with colorimetry from test request
Fix handling duplicate planes on one stream
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
For lighting up, some dml2 params needs to be initialized.
One of them escaped initial patch under:
"drm/amd/display: Add DCN35 DML2 support"
[How]
Add missing initialization.
Fixes: 115009d11ccf ("drm/amd/display: Add DCN35 DML2 support")
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
DENTIST was hanging when performing DISPCLK update with OTG enabled, as
OTG disable workaround was not executing.
[How]
Workaround was checking against current_state before running, but when
called from optimize_bandwidth (safe_to_lower), we should be checking
against context instead.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Taimur Hassan <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
For Replay, if we receive HPD, it doesn’t need to reboot the display.
We don’t need to return anything exactly.
[How]
Return nothing just because we don’t need to reboot the display.
Signed-off-by: ChunTao Tso <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Reviewed-by: Jerry Zuo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
It's useful to disable the recovery mechanism when debugging replay
desync errors.
Signed-off-by: Dennis Chan <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Reviewed-by: Robin Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY & HOW]
Enabling SCE after boot up will cause color distortion.
Reviewed-by: Ovidiu Bunea <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Yihan Zhu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Some DP link layer tests request a different colorimetry than the
default one that is used. Currently, our test automation logic does not
update the MSA with the test request value for DP HPO case.
[How]
Update HPO MSA colorimetry with test automation request value.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
An SCR was made to the DP2.0 spec that updated the bit field definition
for UHBR13.5 in the test link rate DPCD register.
[How]
Add new translation to match the SCR update. Keep old translation for
backwards compatibility.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Enable 12 and 16 max_slices for DP2 DSC
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Fangzhi Zuo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
To help isolate static screen and
video playback tests, we want to enable
an IPS option to allow IPS only on D3 cycle.
[how]
Add DISABLE_DYNAMIC and DISABLE_ALL
IPS disable flags for user control.
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Sung Joon Kim <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
Enable root clock optimization options for dcn35
for power savings
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
Make sure to ungate the clocks on boot
so programming sequence is done successfully.
[how]
Move the ungate logic after bios init.
Reviewed-by: Xi (Alex) Liu <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Sung Joon Kim <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
When MPO surface pixel format is not ARGB8888, fast update can miss
programming blendTF.
[How]
Set the gamma_change update flag on blend_tf change.
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Ilya Bakoulin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This version brings along following fixes:
On boot disable domain22 force power on
decouple dmcub execution to reduce lock granularity
Enable fast update on blendTF change
Fix blend LUT programming
Program plane color setting correctly
amend HPD handler for Replay
Avoid NULL dereference of timing generator
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
On some systems dmub commands run at high IRQ, so long running
commands will block other interrupts.
[How]
Decouple wait_for_idle from dmcub queue/execute/wait.
Reviewed-by: Josip Pavic <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: JinZe.Xu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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- Minor formatting changes
- Update defines to match the bit width of the field it is used for
- Add new boot up bits to control HW sub block regions power
down
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Anthony Koo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
HDCP2 enablement fails when domain22 is set to force
power on
[How]
Disable force power on for domain22 on startup
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The purpose of this patch is to disable XNACK or set XNACK OFF mode
on SRIOV platform which doesn't support it.
This will prevent user-space application to fail or result into
unexpected behaviour whenever the application need to run test-case
in XNACK ON mode.
Signed-off-by: Surbhi Kakarya <[email protected]>
Reviewed-by: Shaoyun Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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If one of the underlying disks of raid or dm is set to read-only, then
each io will generate new log, which will cause message storm. This
environment is indeed problematic, however we can't make sure our
naive custormer won't do this, hence use pr_warn_ratelimited() to
prevent message storm in this case.
Signed-off-by: Yu Kuai <[email protected]>
Fixes: 57e95e4670d1 ("block: fix and cleanup bio_check_ro")
Signed-off-by: Ye Bin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jens Axboe <[email protected]>
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Commit 4af5f2e03013 ("nbd: use blk_mq_alloc_disk and
blk_cleanup_disk") cleans up disk by blk_cleanup_disk() and it won't set
disk->private_data as NULL as before. UAF may be triggered in nbd_open()
if someone tries to open nbd device right after nbd_put() since nbd has
been free in nbd_dev_remove().
Fix this by implementing ->free_disk and free private data in it.
Fixes: 4af5f2e03013 ("nbd: use blk_mq_alloc_disk and blk_cleanup_disk")
Signed-off-by: Li Lingfeng <[email protected]>
Reviewed-by: Josef Bacik <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jens Axboe <[email protected]>
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Recent AMD platforms expose an HD-audio bus but without any actual
codecs, which is internally tied with a USB-audio device, supposedly.
It results in "no codecs" error of HD-audio bus driver, and it's
nothing but a waste of resources.
snd_hda_intel 0000:59:00.6: no codecs found!
Signed-off-by: Alexander Koskovich <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Takashi Iwai <[email protected]>
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Enables the SPI-connected CSC35L41 audio amplifier for this
laptop model.
As of BIOS version 303 it's still necessary to
modify the ACPI table to add the related _DSD properties:
https://github.com/alex-spataru/asus_zenbook_ux7602zm_sound/
Signed-off-by: Alex Spataru <[email protected]>
Link: https://lore.kernel.org/r/DS7PR07MB7621BB5BB14F5473D181624CE3A4A@DS7PR07MB7621.namprd07.prod.outlook.com
Signed-off-by: Takashi Iwai <[email protected]>
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Split the exportfs entry from the nfsd entry and add myself as reviewer.
Suggested-by: Chuck Lever <[email protected]>
Acked-by: Chuck Lever <[email protected]>
Acked-by: Jeff Layton <[email protected]>
Signed-off-by: Amir Goldstein <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Christian Brauner <[email protected]>
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I've re-written the error handling but the bug is that if init_imstt()
fails we need to call iounmap(par->cmap_regs).
Fixes: c75f5a550610 ("fbdev: imsttfb: Fix use after free bug in imsttfb_probe")
Signed-off-by: Dan Carpenter <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
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The init_imstt() function calls framebuffer_release() on error and then
the probe() function calls it again. It should only be done in probe.
Fixes: 518ecb6a209f ("fbdev: imsttfb: Fix error path of imsttfb_probe()")
Signed-off-by: Dan Carpenter <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
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viafbdev.c utilizes memdup_user() to copy an array from userspace.
There is a new wrapper, specifically designed for copying arrays. Use
this one instead.
Suggested-by: Dave Airlie <[email protected]>
Signed-off-by: Philipp Stanner <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
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OMAP2_VRFB is a bool, so the vrfb driver can never be compiled as a
module. With that __exit_p(vrfb_remove) always evaluates to NULL and
vrfb_remove() is unused.
If the driver was compilable as a module, it would fail to build because
the type of vrfb_remove() isn't compatible with struct
platform_driver::remove(). (The former returns void, the latter int.)
Fixes: aa1e49a3752f ("OMAPDSS: VRFB: add omap_vrfb_supported()")
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
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Turn a strcpy()+strncat()+'\0' into an equivalent snprintf().
Signed-off-by: Christophe JAILLET <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
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Our library has memparse() for parsing numbers with respective suffixes
suitable for memory sizes. Use it instead of custom implementation.
Signed-off-by: Andy Shevchenko <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
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There is no point in shadowing the error codes from platform_get_irq().
Refactor omapfb_do_probe() accordingly.
Signed-off-by: Andy Shevchenko <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
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Due to a flaw in the hardware design, the GL9750 replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9750
PCI config. Therefore, the replay timer timeout must be masked.
Fixes: d7133797e9e1 ("mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2")
Signed-off-by: Victor Shih <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Acked-by: Kai-Heng Feng <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Ulf Hansson <[email protected]>
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Due to a flaw in the hardware design, the GL9755 replay timer frequently
times out when ASPM is enabled. As a result, the warning messages will
often appear in the system log when the system accesses the GL9755
PCI config. Therefore, the replay timer timeout must be masked.
Fixes: 36ed2fd32b2c ("mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2")
Signed-off-by: Victor Shih <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Acked-by: Kai-Heng Feng <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Ulf Hansson <[email protected]>
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Fix typo s/depndent/dependent
Fixes: 6e9548cdb30e ("ASoC: SOF: Convert the generic IPC flood test into SOF client")
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
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The driver used to truncate several 64-bit registers such as PMCEID[n]
registers used to describe whether architectural and microarchitectural
events in range 0x4000-0x401f exist. Due to discarding the bits, the
driver made the events invisible, even if they existed.
Moreover, PMCCFILTR and PMCR registers have additional bits in the upper
32 bits. This patch makes them available although they aren't currently
used. Finally, functions handling PMXEVCNTR and PMXEVTYPER registers are
removed as they not being used at all.
Fixes: df29ddf4f04b ("arm64: perf: Abstract system register accesses away")
Reported-by: Carl Worth <[email protected]>
Signed-off-by: Ilkka Koskinen <[email protected]>
Acked-by: Will Deacon <[email protected]>
Closes: https://lore.kernel.org/..
Reviewed-by: Anshuman Khandual <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Catalin Marinas <[email protected]>
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Coresight PMU driver didn't reject events meant for other PMUs.
This caused some of the Core PMU events disappearing from
the output of "perf list". In addition, trying to run e.g.
$ perf stat -e r2 sleep 1
made Coresight PMU driver to handle the event instead of letting
Core PMU driver to deal with it.
Cc: [email protected]
Fixes: e37dfd65731d ("perf: arm_cspmu: Add support for ARM CoreSight PMU driver")
Signed-off-by: Ilkka Koskinen <[email protected]>
Acked-by: Will Deacon <[email protected]>
Reviewed-by: Besar Wicaksono <[email protected]>
Acked-by: Mark Rutland <[email protected]>
Reviewed-by: Anshuman Khandual <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Catalin Marinas <[email protected]>
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