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This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on
STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC
carrier board.
The SoM contains the following peripherals:
- STPMIC (power delivery)
- 512MB DDR3L memory
- eMMC and SDIO WiFi module
The DHSBC carrier board contains the following peripherals:
- Two RGMII Ethernet ports
- USB-A Host port, USB-C peripheral port, USB-C power supply plug
- Expansion connector
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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and DHSBC board
Add new pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board.
The following pinmux nodes are added:
- ADC pins
- ADC CC pins
- ETH1 pins
- ETH2 pins
- I2C5 pins
- MCAN1 pins
- MCAN2 pins
- PWM13 pins
- PWM5 pins
- QSPI pins
- SAI1 pins
- SDMMC2 D4..D7 pins
- SPI2 pins
- SPI3 pins
- UART4 pins
- UART7 pins
- USART1 pins
- USART2 pins
Signed-off-by: Marek Vasut <[email protected]>
Signed-off-by: Alexandre Torgue <[email protected]>
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Reserve 576MiB of CMA as global CMA pool starting after initial 1GiB of
DDR.
AM62ax has different multimedia components such as Camera, Display, H.264
VPU and JPEG Encoder which use CMA for buffer allocations.
The 12x 720x480 realtime VPU decode use-case requires 544MiB of CMA,
additional 32MiB is kept as buffer in case some other peripheral also
require it while VPU is running.
The reason to choose latter 1GiB is to not overlap with existing memory map
which is utilizing initial 1GiB for remoteproc firmwares as shared here
[1].
Also some drivers such as JPEG require 32bit addressing so not allocating
from higher DDR address.
Link: https://lore.kernel.org/all/[email protected] [1]
Signed-off-by: Devarsh Thakkar <[email protected]>
Tested-by: Brandon Brnich <[email protected]>
Reviewed-by: Randolph Sapp <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Reserve 128MiB of global CMA which is also marked as re-usable
so that OS can also use the same if peripheral drivers are not using the
same.
AM62x supports multimedia components such as GPU, dual Display and Camera.
Assuming the worst-case scenario where all 3 are run in parallel below
is the calculation :
1) OV5640 camera sensor supports 1920x1080 resolution
-> 1920 width x 1080 height x 2 bytesperpixel x 8 buffers
(default in yavta) : 32MiB
2) 1920x1200 Microtips LVDS panel supported
-> 1920 width x 1080 height x 4 bytesperpixel x 2 buffers :
16 MiB
3) 1920x1080 HDMI display supported
-> 1920 width x 1080 height x 4 bytesperpixel x 2 buffers :
15.82 MiB which is ~16 MiB
4) IMG GPU shares with display allocated buffers while rendering
but in case some dedicated operation viz color conversion,
keeping same window of ~16 MiB for GPU too.
Total is 80 MiB and adding 32 MiB for other peripherals and extra
16 MiB to keep as buffer for fragmentation thus rounding total to 128
MiB.
Signed-off-by: Devarsh Thakkar <[email protected]>
Reviewed-by: Randolph Sapp <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Samsung Galaxy Grand 2 is a phone based on MSM8226. It's similar to the
other Samsung devices based on MSM8226 with only a few minor differences.
The device trees contain initial support with:
- GPIO keys
- Regulator haptic
- SDHCI (internal and external storage)
- UART (on USB connector via the TI TSU6721 MUIC)
- Regulators
- Touchscreen
- Accelerometer
Signed-off-by: Raymond Hackley <[email protected]>
Reviewed-by: Luca Weiss <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Document samsung,ms013g for Galaxy Grand 2.
Signed-off-by: Raymond Hackley <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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ASUS Vivobook S 15 is a laptop based on the Qualcomm Snapdragon X Elite
SoC (X1E78100).
Add the device tree for the laptop with support for the following features:
- CPU frequency scaling up to 3.4GHz
- NVMe storage on PCIe 6a (capable of Gen4x4, currently limited to Gen4x2)
- Keyboard and touchpad
- WCN7850 Wi-Fi
- Two Type-C ports on the left side (USB3 only in one orientation)
- internal eDP display
- ADSP and CDSP remoteprocs
Further details could be found in the cover letter.
Signed-off-by: Xilin Wu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add the compatible for this device.
Signed-off-by: Xilin Wu <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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According to downstream sources, maximum current for PMI632 VBUS
is 1A.
Taken from msm-4.19 (631561973a034e46ccacd0e53ef65d13a40d87a4)
Line 685-687 in drivers/power/supply/qcom/qpnp-smb5.c
Fixes: a06a2f12f9e2 ("arm64: dts: qcom: qrb4210-rb2: enable USB-C port handling")
Reviewed-by: Luca Weiss <[email protected]>
Signed-off-by: Dang Huynh <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Now that the venus clocks are fixed, we can add the DT node.
Signed-off-by: Pierre-Hugues Husson <[email protected]>
Signed-off-by: Marc Gonzalez <[email protected]>
Reviewed-by: Bryan O'Donoghue <[email protected]>
Acked-by: Vikash Garodia <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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According to nxp,dwmac-imx.yaml, 'snps,rx-sched-sp' is not a valid
property.
Remove it from the imx8mp board devicetree files to avoid
dt-schema warnings:
... 'snps,tx-sched-sp' does not match any of the regexes
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Revision 3 of the sa8775p-ride board uses a different PHY for the two
ethernet ports and supports 2.5G speed. Create a new file for the board
reflecting the changes.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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In order to support multiple revisions of the sa8775p-ride board, create
a .dtsi containing the common parts and split out the ethernet bits into
the actual board file as they will change in revision 3.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Document the compatible for revision 3 of the sa8775p-ride board.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add appropriate mappings of Soundwire ports of WSA8845 speaker. This
solves second (south) speaker sound distortions when playing audio.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add appropriate mappings of Soundwire ports of WSA8845 speaker. This
solves second (right) speaker sound distortions when playing audio.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add appropriate mappings of Soundwire ports of WSA8845 speaker. This
solves second (south) speaker sound distortions when playing audio.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add appropriate mappings of Soundwire ports of WSA8845 speaker
to correctly map the Speaker ports to the WSA macro ports.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/20240627-topic-sm8650-upstream-was-port-mapping-v1-3-4700bcc2489a@linaro.org
Signed-off-by: Bjorn Andersson <[email protected]>
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Add appropriate mappings of Soundwire ports of WSA8845 speaker
to correctly map the Speaker ports to the WSA macro ports.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/20240627-topic-sm8650-upstream-was-port-mapping-v1-2-4700bcc2489a@linaro.org
Signed-off-by: Bjorn Andersson <[email protected]>
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Add appropriate mappings of Soundwire ports of WSA8845 speaker
to correctly map the Speaker ports to the WSA macro ports.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/20240627-topic-sm8650-upstream-was-port-mapping-v1-1-4700bcc2489a@linaro.org
Signed-off-by: Bjorn Andersson <[email protected]>
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Without explicitly specifying names for the regulators they are named
based on the DeviceTree node name. This results in multiple regulators
with the same name, making debug prints and regulator_summary impossible
to reason about.
Signed-off-by: Luca Weiss <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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There is no direct mapping between QFPROM children and parent/SoC MMIO
bus, so 'ranges' property is not correct. Pointed by dtbs_check:
qcom-apq8064-cm-qs600.dtb: efuse@700000: Unevaluated properties are not allowed ('ranges' was unexpected)
Reported-by: kernel test robot <[email protected]>
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Correct the name for the thermal zone on PM8916 PMIC. I ended up with
c&p mistake, which wasn't noticed until the patch got merged.
Reported-by: Konrad Dybcio <[email protected]>
Fixes: b7a28d8a7b80 ("arm64: dts: qcom: pm8916: add temp-alarm thermal zone")
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add the necessary dt nodes for gpu support in X1E80100.
Signed-off-by: Akhil P Oommen <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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According to the power grid documentation, the 0.8v HS PHY shared
regulator is actually LDO3 from PM8550ve id J. Fix both CRD and QCP
boards.
Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/20240629-x1e80100-dts-fix-hsphy-0-8v-supplies-v1-1-de99ee030b27@linaro.org
Signed-off-by: Bjorn Andersson <[email protected]>
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Fix the following warnings when compiling dtbs with W=1:
../arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi:343.10-353.6: Warning (graph_child_address): /bus@f0000/i2c@20000000/tps6598x@3f/connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
../arch/arm64/boot/dts/ti/k3-am62-main.dtsi:633.22-643.5: Warning (graph_child_address): /bus@f0000/dwc3-usb@f900000/usb@31000000: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
Cc: Roger Quadros <[email protected]>
Signed-off-by: Dhruva Gole <[email protected]>
Tested-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Fix the following warnings that are thrown when building dtbs with W=1:
../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:367.10-376.6: Warning (graph_child_address): /bus@f0000/i2c@20000000/usb-power-controller@3f/connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
../arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi:647.22-657.5: Warning (graph_child_address): /bus@f0000/usb@f900000/usb@31000000: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
also defined at ../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:517.7-528.3
Cc: Roger Quadros <[email protected]>
Signed-off-by: Dhruva Gole <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The AM67A/J722S/TDA4AEN platform is a derivative of AM62P platform
and we have no single 1:1 relation regarding index of GPIO and pin
controller. The GPIOs and pin controller registers have mapping and
holes in the map. These have been extracted from the J722S data
sheet. The MCU mapping is carried forward as is with J722S, however the
main GPIO block has differences that needs to be accounted for.
Mux mode input is selected as it is bi-directional. In case a specific
pull type or a specific pin level drive setting is desired, the board
device tree files will have to explicitly mux those pins for the GPIO
with the desired setting.
Ref: J722S Data sheet https://www.ti.com/lit/gpn/tda4aen-q1
Signed-off-by: Jared McArthur <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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On the AM62P platform we have no single 1:1 relation regarding index
of GPIO and pin controller. The GPIOs and pin controller registers
have mapping and holes in the map. These have been extracted from the
AM62P data sheet.
MCU pinctrl definition is shared as it is common between AM62P and
J722S, but that is not the case for main domain.
Ref: AM62P Data sheet https://www.ti.com/lit/gpn/am62p
Signed-off-by: Nishanth Menon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Introduce a GPIO mux mode macro for easier readability. All K3 devices
use mux mode 7 to switch to GPIO mux and this allows the gpio-ranges to
be defined for pinctrl-single clearly.
Signed-off-by: Nishanth Menon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The WKUP system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
Signed-off-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The WKUP system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The MCU system controller address region contains an eFuse block with
MAC addresses to be used by the Ethernet controller. The property
“ti,syscon-efuse” contains a phandle to a syscon region and an offset
into this region where the MAC addresses can be found. Currently
"ti,syscon-efuse" points to the entire system controller address space
node with an offset to the eFuse IP address.
Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then
point the Ethernet controller directly to this region, no offset needed.
This makes it so the system controller memory area does not need to be one
big syscon area, describe this bus address area as the simple-bus it is.
Signed-off-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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NAND boot would require these nodes to be present at early stage.
Ensure that by adding "bootph-all" to relevant nodes.
Signed-off-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC.
It can be used in combination with different carrier boards.
This module can come with different sizes and models for
DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family.
A development Kit, called phyBOARD-Lyra [2] is used as a carrier board
reference design with a mapper board being used to allow the phyCORE-AM62Ax
to fit the phyBOARD-Lyra.
Supported features:
* Debug UART
* SPI NOR Flash
* eMMC
* 2x Ethernet
* Micro SD card
* I2C EEPROM
* I2C RTC
* GPIO Expander
* LEDs
* USB
* HDMI
* USB-C
* Audio
For more details, see:
[1] Product page SoM: https://www.phytec.com/product/phycore-am62a
[2] Product page CB: https://www.phytec.com/product/phyboard-am62a
Signed-off-by: Garrett Giordano <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Add devicetree bindings for AM62Ax based phyCORE-AM62A7 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Garrett Giordano <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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PHYTECs phyBOARD-Lyra carrier board is able to accomidate multiple SoMs.
Refactor k3-am625-phyboard-lyra-rdk.dts into an include file so it can
be reused in combination with our phyCORE-AM62Ax SoM.
Signed-off-by: Garrett Giordano <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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On AM62a SoCs the AUDIO_REFCLKx clocks can be used as an input to
external peripherals when configured through CTRL_MMR, so add the
clock nodes.
Based on: Link: https://lore.kernel.org/lkml/[email protected]/
Signed-off-by: Garrett Giordano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The audio support on J784S4-EVM is using PCM3168A[0] codec
connected to McASP0 serializers.
- Add the nodes for sound-card, audio codec, MAIN_I2C3 and
McASP0.
- Add pinmux for I2C3, McASP0 and AUDIO_EXT_REFCLK1.
- Add necessary GPIO hogs to route the MAIN_I2C3 lines and
McASP serializer.
- Add idle-state as 1 in mux1 to route McASP clock signals.
[0]: <https://www.ti.com/lit/gpn/pcm3168a>
Signed-off-by: Jayesh Choudhary <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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On J784S4 SoC, the AUDIO_REFCLK1 can be used as input to external
peripherals when configured through CTRL_MMR.
Add audio_refclk1 node which would be used as system clock for
audio codec PCM3168A.
Signed-off-by: Jayesh Choudhary <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Add McASP 0-4 instances and keep them disabled because several
required properties are missing as they are board specific.
Signed-off-by: Jayesh Choudhary <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The NAND expansion card (PROC143E1) connects over the User/MCU/PRU
Expansion port on the am62-lp-sk EVM.
The following pins are shared between McASP1 and GPMC-NAND so
both cannot work simultaneously.
Pin name McASP1 function GPMC function
======== =============== =============
J17 MCASP1_AXR0 GPMC0_WEN
P21 MCASP1_AFSX GPMC0_WAIT0
K17 MCASP1_ACLKX GPMC0_BE0N_CLE
K20 MCASP1_AXR2 GPMC0_ADVN_ALE
The factory default sets the pins for McASP1 use. (i.e.
Resistor Array RA1 installed, RA4 not installed).
For NAND use, RA1 has to be removed and RA4 must be
installed.
Signed-off-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Add GPMC and ELM device tree nodes for AM62 SoC family.
Signed-off-by: Nitin Yadav <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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The audio support on J722S-EVM is using TLV320AIC3106[0] codec
connected to McASP1 serializers.
- Add the nodes for sound-card, audio codec and McASP1.
- Add hog for TRC_MUX_SEL to select between McASP and TRACE signals
- Add hogs for GPIO_AUD_RSTn and MCASP1_FET_SEL which is used to
switch between HDMI audio and codec audio.
- Add pinmux for MCASP1 and AUDIO_EXT_REFCLK1.
[0]: <https://www.ti.com/lit/gpn/TLV320AIC3106>
Signed-off-by: Jayesh Choudhary <[email protected]>
Reviewed-by: Jai Luthra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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On J722S SoC, the AUDIO_REFCLK1 can be used as input to external
peripherals when configured through CTRL_MMR.
Add audio_refclk1 node which would be used as system clock for the
audio codec TLV320AIC3106.
Signed-off-by: Jayesh Choudhary <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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AM68 SK has an OSPI NOR flash on its SOM connected to OSPI0 instance.
Enable support for the same. Also, describe the OSPI flash partition
information through the device tree, according to the offsets in the
bootloader.
Signed-off-by: Sinthu Raja <[email protected]>
Signed-off-by: Udit Kumar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
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