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2020-03-24drm/ttm, drm/vmwgfx: Support huge TTM pagefaultsThomas Hellstrom (VMware)3-5/+161
Support huge (PMD-size and PUD-size) page-table entries by providing a huge_fault() callback. We still support private mappings and write-notify by splitting the huge page-table entries on write-access. Note that for huge page-faults to occur, either the kernel needs to be compiled with trans-huge-pages always enabled, or the kernel needs to be compiled with trans-huge-pages enabled using madvise, and the user-space app needs to call madvise() to enable trans-huge pages on a per-mapping basis. Furthermore huge page-faults will not succeed unless buffer objects and user-space addresses are aligned on huge page size boundaries. Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: "Matthew Wilcox (Oracle)" <[email protected]> Cc: "Kirill A. Shutemov" <[email protected]> Cc: Ralph Campbell <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: "Christian König" <[email protected]> Cc: Dan Williams <[email protected]> Signed-off-by: Thomas Hellstrom (VMware) <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Christian König <[email protected]>
2020-03-24mm: Add vmf_insert_pfn_xxx_prot() for huge page-table entriesThomas Hellstrom (VMware)2-8/+71
For graphics drivers needing to modify the page-protection, add huge page-table entries counterparts to vmf_insert_pfn_prot(). Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: "Matthew Wilcox (Oracle)" <[email protected]> Cc: "Kirill A. Shutemov" <[email protected]> Cc: Ralph Campbell <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: "Christian König" <[email protected]> Cc: Dan Williams <[email protected]> Signed-off-by: Thomas Hellstrom (VMware) <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Andrew Morton <[email protected]>
2020-03-24mm: Split huge pages on write-notify or COWThomas Hellstrom (VMware)1-8/+19
The functions wp_huge_pmd() and wp_huge_pud() currently relies on the huge_fault() callback to split huge page table entries if needed. However for module users that requires export of the split_huge_xxx() functionality which may be undesired. Instead split pre-existing huge page-table entries on VM_FAULT_FALLBACK return. We currently only do COW and write-notify on the PTE level, so if the huge_fault() handler returns VM_FAULT_FALLBACK on wp faults, split the huge pages and page-table entries. Also do this for huge PUDs if there is no huge_fault() handler and the vma is not anonymous, similar to how it's done for PMDs. Note that fs/dax.c still does the splitting in the huge_fault() handler, but as huge_fault() A follow-up patch can remove the dax.c split_huge_pmd() if needed. Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: "Matthew Wilcox (Oracle)" <[email protected]> Cc: "Kirill A. Shutemov" <[email protected]> Cc: Ralph Campbell <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: "Christian König" <[email protected]> Cc: Dan Williams <[email protected]> Signed-off-by: Thomas Hellstrom (VMware) <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Andrew Morton <[email protected]>
2020-03-24mm: Introduce vma_is_special_hugeThomas Hellstrom (VMware)2-3/+20
For VM_PFNMAP and VM_MIXEDMAP vmas that want to support transhuge pages and -page table entries, introduce vma_is_special_huge() that takes the same codepaths as vma_is_dax(). The use of "special" follows the definition in memory.c, vm_normal_page(): "Special" mappings do not wish to be associated with a "struct page" (either it doesn't exist, or it exists but they don't want to touch it) For PAGE_SIZE pages, "special" is determined per page table entry to be able to deal with COW pages. But since we don't have huge COW pages, we can classify a vma as either "special huge" or "normal huge". Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: "Matthew Wilcox (Oracle)" <[email protected]> Cc: "Kirill A. Shutemov" <[email protected]> Cc: Ralph Campbell <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: "Christian König" <[email protected]> Cc: Dan Williams <[email protected]> Signed-off-by: Thomas Hellstrom (VMware) <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Andrew Morton <[email protected]>
2020-03-24fs: Constify vma argument to vma_is_daxThomas Hellstrom (VMware)1-1/+1
The function is used by upcoming vma_is_special_huge() with which we want to use a const vma argument. Since for vma_is_dax() the vma argument is only dereferenced for reading, constify it. Cc: Andrew Morton <[email protected]> Cc: Michal Hocko <[email protected]> Cc: "Matthew Wilcox (Oracle)" <[email protected]> Cc: "Kirill A. Shutemov" <[email protected]> Cc: Ralph Campbell <[email protected]> Cc: "Jérôme Glisse" <[email protected]> Cc: "Christian König" <[email protected]> Cc: Dan Williams <[email protected]> Signed-off-by: Thomas Hellstrom (VMware) <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Acked-by: Christian König <[email protected]>
2020-03-20Merge tag 'mediatek-drm-next-5.7' of ↵Dave Airlie3-1/+20
https://github.com/ckhu-mediatek/linux.git-tags into drm-next Mediatek DRM Next for Linux 5.7 This include MT8183 DPI support. Signed-off-by: Dave Airlie <[email protected]> From: CK Hu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/1584580683.29614.5.camel@mtksdaap41
2020-03-20Merge tag 'amd-drm-next-5.7-2020-03-19' of ↵Dave Airlie88-503/+955
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-next-5.7-2020-03-19: amdgpu: - SR-IOV fixes - RAS fixes - Fallthrough cleanups - Kconfig fix for ACP - Fix load balancing with VCN - DC fixes - GPU reset fixes - Various cleanups scheduler: - Revert job distribution optimization - Add a helper to pick the least loaded scheduler Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19drm: amd: fix spelling mistake "shoudn't" -> "shouldn't"Colin Ian King3-3/+3
There are spelling mistakes in pr_err messages and a comment. Fix these. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: Remove unnecessary variable shadow in gfx_v9_0_rlcg_wregNathan Chancellor1-5/+1
clang warns: drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:754:6: warning: variable 'shadow' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] if (offset == grbm_cntl || offset == grbm_idx) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:757:6: note: uninitialized use occurs here if (shadow) { ^~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:754:2: note: remove the 'if' if its condition is always true if (offset == grbm_cntl || offset == grbm_idx) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:738:13: note: initialize the variable 'shadow' to silence this warning bool shadow; ^ = 0 1 warning generated. shadow is only assigned in one condition and used as the condition for another if statement; combine the two if statements and remove shadow to make the code cleaner and resolve this warning. Fixes: 2e0cc4d48b91 ("drm/amdgpu: revise RLCG access path") Link: https://github.com/ClangBuiltLinux/linux/issues/936 Suggested-by: Joe Perches <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: fix typo for vcn2.5/jpeg2.5 idle checkJames Zhu2-2/+2
fix typo for vcn2.5/jpeg2.5 idle check Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: fix typo for vcn2/jpeg2 idle checkJames Zhu2-2/+2
fix typo for vcn2/jpeg2 idle check Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: fix typo for vcn1 idle checkJames Zhu1-1/+1
fix typo for vcn1 idle check Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: add CAP fw loadingZhigang Luo5-2/+38
The CAP fw is for enabling driver compatibility. Currently, it only enabled for vega10 VF. Signed-off-by: Zhigang Luo <[email protected]> Reviewed-by: Shaoyun Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19amd/powerplay: arcturus baco reset disable all featuresJohn Clements1-8/+13
issue smu cmd to disable all features upon baco entry for arcturus to mitigate potential dirty I2C controller on boot Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: miss PRT case when bo updateYintian Tao1-3/+3
Originally, only the PTE valid is taken in consider. The PRT case is missied when bo update which raise problem. We need add condition for PRT case. v2: add PRT condition for amdgpu_vm_bo_update_mapping, too v3: fix one typo error Signed-off-by: Yintian Tao <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: add on demand pipe merge logic for dcn2+Dmytro Laktyushkin3-16/+56
Adds logic that will determine if pipes need merging during validation. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Chris Park <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Allocate scratch space for DMUB CW7Wyatt Wood2-4/+16
[Why] The scratch space can be used to pass data between x86 and DMCUB. DMCUB will manage the actually mapping of CW7 internally, driver does not program the window. [How] Allocate extra space within the DMUB service's framebuffer for this scratch space and expose them from the service for use in DC. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: DPP DTO isn't update properly.Yongqiang Sun3-4/+6
[Why] before update dpp DTO, we check dppclks in context to determine it is changed or not, but dppclks in context will be updated anyways after flip is done, so compare dppclks in context will always get an equal result. [How] Add pipe dpp clks in dccg and compare values between dccg and context. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Remove connect DIG FE to its BE during timing programmingNikola Cornij4-17/+4
[why] Causes regression with MST DSC displays not lighting up after DPMS [how] Revert commit 8cc426d79be1c3 ("drm/amd/display: Program DSC during timing programming") Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: combine watermark change and clock change for update clocks.Yongqiang Sun3-9/+10
[Why] underflow happened when playing video on 1366x768 + 4K clone mode due to incorrect handle watermark change flag and lower down clocks to early. [How] Check watermark change flag when decide doing optimized, and check optimized required flag to do clock update. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: guard DPPHY_Internal_ctrlCharlene Liu1-1/+1
[why] this register not exist in some asic, based on request remove this from dc. [how] add guard for sanization. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: differentiate vsc sdp colorimetry use criteria between MST ↵Martin Tsai4-22/+22
and SST [Why] We should check MST BU support capability on output port before building vsc info packet. [How] Add a new definition for port and sink capability check. Signed-off-by: Martin Tsai <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Program self refresh control register on bootSung Lee1-0/+3
[WHY] In headless boot cases, self refresh control registers are not programmed on boot. In certain hybrid graphics cases this may cause cstate entering to get blocked causing a hang. [HOW] Program self refresh control register on boot. Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: remove magic numbers in hdcp_ddcWenjing Liu1-6/+6
[why] DP doesn't have message id as the first byte of an hdcp message, current hdcp psp unifies HDMI and DP message so that it is required when reading DP HDCP messages in hdcp_ddc, a message id needs to be added as the first byte of the HDCP message. The id is currently assigned as a magic number which is not a good coding practice. [how] Replace magic numbers with macro defined in hdcp headers. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Ashley Thomas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Fallback to dmcub for psr when dmcu is disabledWyatt Wood1-1/+1
[Why] We want to be able to enable/disable psr on dmcub and fallback to dmcu when necessary. [How] Use dc config option to do so. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Set disable_dmcu flag properly per asicWyatt Wood3-6/+6
[Why] The default value for disable_dmcu is true, even for asics that require dmcu. [How] Set flag properly per asic. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Remove PSR dependency on swizzle modeRoman Li1-6/+1
[Why] The PSR enablement was dependent on swizzle as a workaround for non-pageflipping fb console. It's no longer required. [How] Remove PSR-enable dependency on swizzle mode. Signed-off-by: Roman Li <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Explicitly disable triplebuffer flipsNicholas Kazlauskas1-0/+3
[Why] This is enabled by default on Renoir but there's userspace/API support to actually make use of this. Since we're not passing this down through surface updates, let's explicitly disable this for now. This fixes "dcn20_program_front_end_for_ctx" warnings associated with incorrect/unexpected programming sequences performed while this is enabled. [How] Disable it at the topmost level in DM in case anyone tries to flip this to enabled for any of the other ASICs like Navi10/14. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Pass triplebuffer surface flip flags down to plane stateNicholas Kazlauskas2-0/+3
[Why] A "dcn20_program_front_end_for_ctx" warning is observed on Renoir. Since the resource definition doesn't explicitly disable triplebuffer flips like Navi10 DC actually attempts to go and setup triplebuffering even when we pass in false to the plane state. If we hit a full update after triplebuffering has been setup we see the assertion since we don't expect full updates while performing triplebuffer flips. Normally this would get reset back to false whne we pass in the new plane state, but since we never actually copy the flag when doing surface updates this doesn't happen. [How] Copy the flag onto the plane update based on the requested surface update state. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: fix split threshold w/a to work with mpoDmytro Laktyushkin1-26/+13
Right now only stream count is used to avoid split. This change updates the W/A to check plane count instead. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Wesley Chalmers <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: workaround for HDMI hotplug in DPMSOFF stateYongqiang Sun5-0/+31
[Why] When hotplug a HDMI monitor during entering S0i3 or DPMSOFF state due to entering infinite loop when calling vbios to program pixel clocks. In this scenario, pll is enabled but phy is not, and there is not a programing guide for this case. [How] Before we having the proper programing guide, before disable pll, doing a phy enable and disable to avoid the issue. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Remove redundant hdcp display stateIsabel Zhang6-48/+27
[Why] Due to previous code changes displays which are in active state immediately transition to the active and added state. This makes the two states redundant and unnecessary. [How] Instead of updating the device state to active and added after successful addition, change state to inactive if addition failed. Also, change references to active and added state to just added state. Signed-off-by: Isabel Zhang <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Fix test pattern color space inconsistency for LinuxJerry (Fangzhi) Zuo1-3/+6
[why] When reprogram MSA with updated color space, the test color space shows inconsistency. Linux has separate routine to set up test pattern color space, but it fails to configure RGB. [How] Add RGB to test pattern. Fixes: 43563bc2e6a769 ("drm/amd/display: update MSA and VSC SDP on video test pattern request") Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: update connector->display_info after read edidHersen Wu3-5/+19
[Why] drm_connector->display_info is not passed to amdgpu_dm right way after read edid. [How] display_info is parsed from edid and saved into drm_connector by drm_connector_update_edid_proerty which is called within amdgpu_dm_update_connector_after_detect. call this function after read edid to update drm_connector->display_info Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Revert "DCN2.x Do not program DPPCLK if same value"Sung Lee1-1/+1
[WHY] Not programming dto with same values causes test failures in DCN2 diags DPP tests. [HOW] This reverts commit 1b53e733238c0f7faa4744ec7c8c6f193649f168. Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Yongqiang Sun <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19Merge tag 'exynos-drm-next-for-v5.7' of ↵Dave Airlie2-4/+3
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Two cleanups . Replace the hand rolled encoder bitmask thing with drm_encoder_mask() . Use mode->clock instead of reverse calculating it from the vrefresh Signed-off-by: Dave Airlie <[email protected]> From: Inki Dae <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge tag 'drm-misc-next-2020-03-17' of ↵Dave Airlie44-229/+917
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.7: UAPI Changes: Cross-subsystem Changes: Core Changes: - dp-mst: Remove register_connector callback, add drm_dp_destroy_connector - Changes to scnprintf on multiple instances Driver Changes: - meson: Support for YUV420 - panel: Support Ortustech COM37H3M, idk-1110wr and idk-2121wr, multiple dotclock fixes Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux ↵Dave Airlie9-148/+14
into drm-next - Disable DMA when using SEV encryption - An -RT fix - Code cleanups Signed-off-by: Dave Airlie <[email protected]> From: "Thomas Hellstrom (VMware)" <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge tag 'drm-intel-next-2020-03-13' of ↵Dave Airlie172-4132/+6992
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: On i915 we have a new UAPI to allow userspace to specify CS ring buffer size on construction (I915_CONTEXT_PARAM_RINGSIZE) and also new sysfs entries exposing various engine properties GVT Changes: VFIO edid getting expanded to all platforms and a big cleanup around attr group, unused vblank complete, kvmgt, Intel engine and dev_priv usages. i915 Changes: - new UAPI to allow userspace to specify CS ring buffer size on construction (I915_CONTEXT_PARAM_RINGSIZE) - (Chris) - New sysfs entries exposing various engine properties (Chris) - Tiger Lake is out of require_force_probe protection (Jose) - Changes in many places around active requests, reset and heartbeat (Chris) - Stop assigning drm-dev_private pointer (Jani) - Many code refactor in many places, including intel_modeset_init, increasing use of intel_uncore_*, vgpu, and gvt stuff (Jani) - Fixes around display pipe iterators (Anshuman) - Tigerlake enabling work (Matt Ropper, Matt Atwood, Ville, Lucas, Daniele, Jose, Anusha, Vivek, Swathi, Caz. Kai) - Code clean-up like reducing use of drm/i915_drv.h, removing unused registers, removing garbage warns, and some other code polishing (Jani, Lucas, Ville) - Selftests fixes, improvements and additions (Chris, Dan, Aditya, Matt Auld) - Fix plane possible_crtcs bit mask (Anshuman) - Fixes and cleanup on GLK pre production identification and w/a (Ville) - Fix display orientation on few cases (Hans, Ville) - dbuf clean-up and improvements for slice arrays handling (Ville) - Improvement around min cdclk calculation (Stanislav) - Fixes and refactor around display PLLs (Imre) - Other execlists and perf fixes (Chris) - Documentation fixes (Jani, Chris) - Fix build issue (Anshuman) - Many more fixes around the locking mechanisms (Chris) - Other fixes and debugability info around preemption (Chris, Tvrtko) - Add mechanism to submit a context WA on ring submission (Mika) - Clear all Eu/L3 resitual context (Prathap) - More changes around local memory (Abdiel, Matt, Chris) - Fix RPS (Chris) - DP MST fix (Lyude) - Display FBC fixes (Jose, RK) - debugfs cleanup (Tvrtko) - More convertion towards drm_debive based loggin (Wambui, Ram) - Avoid potential buffer overflow (Takashi) - Ice Lake and Elkhart Lake workarounds (Matt Roper) Signed-off-by: Dave Airlie <[email protected]> From: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge tag 'drm/tegra/for-5.7-rc1' of ↵Dave Airlie2-14/+40
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v5.7-rc1 This contains some minor cleanups, nothing too exciting. Signed-off-by: Dave Airlie <[email protected]> From: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-18drm/exynos: Use mode->clock instead of reverse calculating it from the vrefreshVille Syrjälä1-1/+1
htotal*vtotal*vrefresh ~= clock. So just use say "clock" when we mean it. Cc: Inki Dae <[email protected]> Cc: Joonyoung Shim <[email protected]> Cc: Seung-Woo Kim <[email protected]> Cc: Kyungmin Park <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2020-03-18drm/exynos: Use drm_encoder_mask()Ville Syrjälä1-3/+2
Replace the hand rolled encoder bitmask thing with drm_encoder_mask() Cc: Inki Dae <[email protected]> Cc: Joonyoung Shim <[email protected]> Cc: Seung-Woo Kim <[email protected]> Cc: Kyungmin Park <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2020-03-16drm/amdgpu: disable gpu_sched load balancer for vcn jobsNirmoy Das1-4/+8
VCN HW doesn't support dynamic load balance on multiple instances for a context. This patch initializes VNC entities with only one drm_gpu_scheduler picked by drm_sched_pick_best(). Picking a drm_gpu_scheduler using drm_sched_pick_best() ensures that we do load balance among multiple contexts but not among multiple jobs in a context. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-16drm/sched: implement and export drm_sched_pick_bestNirmoy Das3-33/+42
Remove drm_sched_entity_get_free_sched() and use the logic of picking the least loaded drm scheduler from a drm scheduler list to implement drm_sched_pick_best(). This patch also exports drm_sched_pick_best() so that it can be utilized by other drm drivers. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-16Revert "drm/scheduler: improve job distribution with multiple queues"changzhu3-12/+10
It needs to revert this patch to avoid amdgpu_test compute hang problem on picasso. This reverts commit 56822db194232c089601728d68ed078dccb97f8b. Signed-off-by: changzhu <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-16drm/amdgpu: Move EEPROM I2C adapter to amdgpu_deviceAndrey Grodzovsky7-50/+41
Puts the i2c adapter in common place for sharing by RAS and upcoming data read from FRU EEPROM feature. v2: Move i2c adapter to amdgpu_pm and rename it. v3: Move i2c adapter init to ASIC specific code and get rid of the switch case in amdgpu_device Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-16drm_amdgpu: Add job fence to resv conditionallyxinhui pan3-20/+8
Job fence on page table should be a shared one, so add it to the root page talbe bo resv. last_delayed field is not needed anymore. so remove it. Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Felix Kuehling <[email protected]> Suggested-by: Christian König <[email protected]> Signed-off-by: xinhui pan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-16drm/amdgpu: fix switch-case indentationNirmoy Das1-41/+41
Fix switch-case indentation in amdgpu_ctx_init_entity() Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-16drm/amdgpu: revise RLCG access pathMonk Liu9-21/+223
what changed: 1)provide new implementation interface for the rlcg access path 2)put SQ_CMD/SQ_IND_INDEX to GFX9 RLCG path to let debugfs's reg_op function can access reg that need RLCG path help now even debugfs's reg_op can used to dump wave. tested-by: Monk Liu <[email protected]> tested-by: Zhou pengju <[email protected]> Signed-off-by: Zhou pengju <[email protected]> Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Emily Deng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-16drm: Mark up racy check of drm_gem_object.handle_countChris Wilson1-1/+1
[ 1715.899800] BUG: KCSAN: data-race in drm_gem_handle_create_tail / drm_gem_object_handle_put_unlocked [ 1715.899838] [ 1715.899861] write to 0xffff8881830f3604 of 4 bytes by task 7834 on cpu 1: [ 1715.899896] drm_gem_handle_create_tail+0x62/0x250 [ 1715.899927] drm_gem_open_ioctl+0xc1/0x160 [ 1715.899956] drm_ioctl_kernel+0xe4/0x120 [ 1715.899981] drm_ioctl+0x297/0x4c7 [ 1715.900003] ksys_ioctl+0x89/0xb0 [ 1715.900027] __x64_sys_ioctl+0x42/0x60 [ 1715.900052] do_syscall_64+0x6e/0x2c0 [ 1715.900079] entry_SYSCALL_64_after_hwframe+0x44/0xa9 [ 1715.900100] [ 1715.900119] read to 0xffff8881830f3604 of 4 bytes by task 8137 on cpu 0: [ 1715.900149] drm_gem_object_handle_put_unlocked+0x31/0x130 [ 1715.900180] drm_gem_object_release_handle+0x93/0xe0 [ 1715.900208] drm_gem_handle_delete+0x7b/0xe0 [ 1715.900235] drm_gem_close_ioctl+0x61/0x80 [ 1715.900264] drm_ioctl_kernel+0xe4/0x120 [ 1715.900291] drm_ioctl+0x297/0x4c7 [ 1715.900316] ksys_ioctl+0x89/0xb0 [ 1715.900340] __x64_sys_ioctl+0x42/0x60 [ 1715.900363] do_syscall_64+0x6e/0x2c0 [ 1715.900388] entry_SYSCALL_64_after_hwframe+0x44/0xa9 Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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