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2017-12-22drm/i915: Show HWSP in intel_engine_dump()Chris Wilson1-1/+33
Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ffffff6b, last ffffff8c, hangcheck ffffff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled over the HWSP. So include the HWSP in the engine dump to see if there are more signs of random scribbling. v2: Fix row pointer, i is now incremented by 8 so doesn't need scaling by 8, and we don't need to keep volatile here as the status_page isn't marked up as volatile itself. v3: Use hexdump, with suppression of identical lines. (Tvrtko) Which results in HWSP: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * 00000040 00000001 00000000 00000018 00000002 00000001 00000000 00000018 00000000 00000060 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000003 00000080 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * 000000c0 00000002 00000000 00000000 00000000 00000000 00000000 00000000 00000000 000000e0 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 * instead of 128 lines of mostly 0s. v4: Tidy up the locals Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Tvrtko Ursulin <[email protected]>
2017-12-22drm/i915: Assert that the request is on the execution queue before being removedChris Wilson1-0/+2
We should only attempt to remove requests from the execution queue that are on the execution queue. These are the requests that have been assigned a global_seqno, so we can assert that we only attempt to remove requests with a nonzero global_seqno. Afterwards we assert that we remove them in order, i.e. the global_seqno matches the engine's seqno, but that leaves a small loophole for an unattached request on an unused engine. We can then make the same assertion on queuing the request to the execution engine, it must have a zero global_seqno or else we are queuing the same request twice. Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Michał Winiarski <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Tvrtko Ursulin <[email protected]>
2017-12-22drm/i915/execlists: Show preemption progress in GEM_TRACEChris Wilson1-2/+5
We already emit a GEM_TRACE for when we start preemption, but we lack one to show when the preemption is completed and we return to the regular queue. This is to continue the investigation into the mysterious <0>[ 197.854177] <idle>-0 1..s1 197837017us : execlists_submission_tasklet: rcs0 cs-irq head=0 [0], tail=0 [0] <0>[ 197.854209] drv_self-6008 2.... 197837390us : reset_common_ring: rcs0 seqno=15515 <0>[ 197.854240] drv_self-6008 2.... 197837415us : reset_common_ring: bcs0 seqno=0 <0>[ 197.854270] drv_self-6008 2.... 197837443us : reset_common_ring: vcs0 seqno=0 <0>[ 197.854300] drv_self-6008 2.... 197837463us : reset_common_ring: vcs1 seqno=0 <0>[ 197.854330] drv_self-6008 2.... 197837482us : reset_common_ring: vecs0 seqno=0 <0>[ 197.854360] ksoftirq-23 2..s. 197838341us : execlists_submission_tasklet: bcs0 in[0]: ctx=0.1, seqno=1dce7 <0>[ 197.854392] <idle>-0 1..s1 197838347us : execlists_submission_tasklet: bcs0 cs-irq head=0 [0], tail=0 [0] <0>[ 197.854423] ksoftirq-23 2..s. 197838354us : execlists_submission_tasklet: vcs0 in[0]: ctx=0.1, seqno=1d027 <0>[ 197.854456] ksoftirq-23 2.Ns. 197838361us : execlists_submission_tasklet: vcs1 in[0]: ctx=0.1, seqno=1e738 <0>[ 197.854488] ksoftirq-23 2.Ns. 197838366us : execlists_submission_tasklet: vecs0 in[0]: ctx=0.1, seqno=235aa <0>[ 197.854520] ksoftirq-23 2.Ns. 197838376us : execlists_submission_tasklet: rcs0 in[0]: ctx=0.1, seqno=15518 <0>[ 197.854552] <idle>-0 1..s1 197853285us : execlists_submission_tasklet: rcs0 cs-irq head=0 [0], tail=7 [7] <0>[ 197.854584] <idle>-0 1..s1 197853285us : execlists_submission_tasklet: rcs0 csb[1]: status=0x00000018:0x00000000 <0>[ 197.854616] <idle>-0 1..s1 197853286us : execlists_submission_tasklet: rcs0 out[0]: ctx=0.0, seqno=0 Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Tvrtko Ursulin <[email protected]>
2017-12-22Merge tag 'gvt-next-2017-12-22' of https://github.com/intel/gvt-linux into ↵Rodrigo Vivi15-666/+675
drm-intel-next-queued gvt-next-2017-12-22: - more mmio switch optimization (Weinan) - cleanup i915_reg_t vs. offset usage (Zhenyu) - move write protect handler out of mmio handler (Zhenyu) Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Put all non-blocking modesets onto an ordered wqVille Syrjälä2-3/+14
We have plenty of global registers and whatnot programmed without any further locking by the modeset code. Currently non-bocking modesets are allowed to execute in parallel which could corrupt said registers. To avoid the problem let's run all non-blocking modesets on an ordered workqueue. We still put page flips etc. to system_unbound_wq allowing page flips on one pipe to execute in parallel with page flips or a modeset on a another pipe (assuming no known state is shared between them, at which point they would have been added to the same atomic commit and serialized that way). Blocking modesets are already serialized with each other by connection_mutex, and thus are safe. To serialize them with non-blocking modesets we just flush the workqueue before executing blocking modesets. Cc: Daniel Vetter <[email protected]> Cc: Maarten Lankhorst <[email protected]> Fixes: 94f050246b42 ("drm/i915: nonblocking commit") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Daniel Vetter <[email protected]> Reviewed-by: Maarten Lankhorst <[email protected]>
2017-12-22drm/i915: Disable GMBUS clock gating around GMBUS transfers on gen9+Ville Syrjälä2-0/+44
Gen9+ need to disable GMBUS clock gating when doing multi part transfers. Otherwise clock gating will kick in when GMBUS is in the WAIT state and presumably that will corrupt the transfer. This is documented as Display WA #0868. Apparently older hardware doesn't allow clock gating in the WAIT state and thus are unaffected by this problem. v2: Limit the PCH w/a to gen9 and gen10 only (DK) Actually change it to check the PCH type instead since it's the PCH that actually contains the GMBUS hardware Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Dhinakaran Pandiyan <[email protected]> #v1 Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Clean up the PNV bit banging vs. GMBUS clock gating w/aVille Syrjälä2-9/+13
Give a proper name for the GMBUS clock gating disable bit on PNV, and rename intel_i2c_quirk_set() to pnv_gmbus_clock_gating() for clarity. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]>
2017-12-22drm/i915: No need to power up PG2 for GMBUS on BXTVille Syrjälä1-1/+1
GMBUS lives in PG1, so no need to power up PG2. We do want to prevent the DMC from making a mess of things though, so add GMBUS to the DC off power well. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Dhinakaran Pandiyan <[email protected]>
2017-12-22drm/i915: Disable DC states around GMBUS on GLKVille Syrjälä1-0/+1
Prevent the DMC from destroying GMBUS transfers on GLK. GMBUS lives in PG1 so DC off is all we need. Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Dhinakaran Pandiyan <[email protected]>
2017-12-22drm/i915: Do not enable movntdqa optimization in hypervisor guestChangbin Du1-1/+6
Our QA reported a problem caused by movntdqa instructions. Currently, the KVM hypervisor doesn't support VEX-prefix instructions emulation. If users passthrough a GPU to guest with vfio option 'x-no-mmap=on', then all access to the BARs will be trapped and emulated. The KVM hypervisor would raise an inertal error to qemu which cause the guest killed. (Since 'movntdqa' ins is not supported.) This patch try not to enable movntdqa optimization if the driver is running in hypervisor guest. Signed-off-by: Changbin Du <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2017-12-22drm/i915: Dump device info at onceMichal Wajdeczko1-16/+17
We are dumping device info separately for sw_only and runtime part but to simplify the code we can also do it from one place once we complete driver load. v2: use dedicated welcome function (Chris) Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Add pretty printer for runtime part of intel_device_infoMichal Wajdeczko4-18/+34
During initialization of the runtime part of the intel_device_info we are dumping that part using DRM_DEBUG_DRIVER mechanism. As we already have pretty printer for const part of the info, make similar function for the runtime part and use it separately. v2: add runtime dump to debugfs (Chris) Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Update intel_device_info_runtime_init() parameterMichal Wajdeczko3-5/+9
As we try to follow object-verb pattern in our functions, update intel_device_info_runtime_init() parameter from dev_priv to info. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Move intel_device_info definitions to its own headerMichal Wajdeczko3-138/+183
We already keep intel_device_info functions in dedicated file. Add matching header file and move related definitions there. v2: add gen boundaries (Chris) Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Move opregion definitions to dedicated intel_opregion.hMichal Wajdeczko3-59/+112
We already have dedicated file for opregion related code, dedicated header will make our life easier. v2: reorder includes (Chris) Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] [ickle: quieten checkpatch] Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Move display related definitions to dedicated headerMichal Wajdeczko2-282/+322
We already have separate files for display related code, there is no reason to keep all display definitions in master header. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] [ickle: quieten checkpatch] Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915: Move some utility functions to i915_util.hMichal Wajdeczko2-15/+15
We have dedicated header file for utility functions and macros. Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/i915/gvt: move write protect handler out of mmio emulation functionZhenyu Wang6-55/+41
It's a bit confusing that page write protect handler is live in mmio emulation handler. This moves it to stand alone gvt ops. Also remove unnecessary check of write protected page access in mmio read handler and cleanup handling of failsafe case. v2: rebase Reviewed-by: Xiong Zhang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-12-22drm/i915/gvt: cleanup usage for typed mmio reg vs. offsetZhenyu Wang11-148/+138
We had previous hack that tried to accept either i915_reg_t or offset value to access vGPU virtual/shadow regs which broke that purpose to be type safe in context. This one trys to explicitly separate the usage of typed mmio reg with real offset. Old vgpu_vreg(offset) helper is used only for offset now with new vgpu_vreg_t(reg) is used for i915_reg_t only. Convert left usage of that to new helper. Also fixed left KASAN warning issues caused by previous hack. v2: rebase, fixup against recent mmio switch change Reviewed-by: Zhi Wang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-12-22drm/i915/gvt: Fix pipe A enable as default for vgpuXiaolin Zhang1-2/+3
observed igt drv_module_reload test case failure on 4.15.0 rc2 kernel with panic due to no active pipe available. the gpu will reset during unload/load and make pipe config reg lost which can cause kernel panic issue happen. this patch is to move pipe enabling to emulate_mointor_status_chagne to handle vgpu reset case as well. Fixes: 7e6059020894 ("drm/i915/gvt: enabled pipe A default on creating vgpu") Signed-off-by: Xiaolin Zhang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> (cherry picked from commit f5f00e7dcc4161f07b76ff1a854e8b1ea7a1ed41)
2017-12-22drm/i915/gvt: always use i915_reg_t for MMIO handler definitionZhenyu Wang1-352/+352
Always requires properly defined i915_reg_t type for MMIO handler definition. Fix kasan warning of "drivers/gpu/drm/i915/gvt/handlers.c:2397:1: error: the frame size of 32120 bytes is larger than 8192 bytes" Reviewed-by: Zhi Wang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]>
2017-12-22drm/panel: Add Ilitek ILI9322 driverLinus Walleij3-0/+971
This adds support for the Ilitek ILI9322 QVGA (320x240) TFT panel driver. This panel driver supports serial or parallel RGB or YUV input and also ITU-T BT.656 input streams. The controller is combined with a physical panel and configured through the device tree. Cc: David Lechner <[email protected]> Cc: Stefano Babic <[email protected]> Cc: Ben Dooks <[email protected]> Acked-by: Thierry Reding <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22drm/panel: Add DT bindings for Ilitek ILI9322Linus Walleij1-0/+49
This adds device tree bindings for the Ilitek ILI9322 320x240 TFT panel driver. Cc: David Lechner <[email protected]> Cc: Stefano Babic <[email protected]> Cc: Ben Dooks <[email protected]> Cc: [email protected] Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-22Merge tag 'drm-misc-next-2017-12-21' of ↵Dave Airlie16-69/+419
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 4.16: Core Changes: - mostly doc updates and some fbdev improvements * tag 'drm-misc-next-2017-12-21' of git://anongit.freedesktop.org/drm/drm-misc: drm/framebuffer: Print task that allocated the fb in debug info. drm/fb-helper: Add drm_fb_helper_defio_init() drm/fb-helper: Update DOC with new helpers drm/docs: Add todo entry for drm_fb_helper_fbdev_setup() drm/fb-helper: Add drm_fb_helper_fbdev_setup/teardown() drm/fb-helper: Set/clear dev->fb_helper in dummy init/fini drm/stm: ltdc: Remove unnecessary platform_get_resource() error check drm/stm: dsi: Remove unnecessary platform_get_resource() error check drm/doc: Move legacy kms helpers to the very end drm/atomic: document how to handle driver private objects drm/syncobj: some kerneldoc polish drm/print: Unconfuse kerneldoc drm/edid: kerneldoc for is_hdmi2_sink
2017-12-21drm/i915: Show FBC worker status in debugfsChris Wilson1-4/+9
Include the pending update from the FBC worker in i915_fbc_status. Signed-off-by: Chris Wilson <[email protected]> Cc: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Paulo Zanoni <[email protected]>
2017-12-21drm/tegra: dc: Implement legacy blendingThierry Reding5-25/+226
This implements alpha blending on legacy display controllers (Tegra20, Tegra30 and Tegra114). While it's theoretically possible to support the zpos property to enable userspace to specify the Z-order of each plane individually, this is not currently supported and the same fixed Z- order as previously defined is used. Reverts commit 71835caa00e8 ("drm/tegra: fb: Force alpha formats") since the opaque formats are now supported. Reported-by: Dmitry Osipenko <[email protected]> Fixes: 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: Correct timeout in tegra_syncpt_waitDmitry Osipenko1-1/+2
host1x_syncpt_wait() takes timeout value in jiffies, but DRM passes it in milliseconds. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: gem: Correct iommu_map_sg() error checkingDmitry Osipenko1-8/+7
iommu_map_sg() doesn't return a error value, but a size of the requested IOMMU mapping or zero in case of error. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: dc: Link DC1 to DC0 on Tegra20Dmitry Osipenko2-31/+65
Hardware reset isn't actually broken on Tegra20, but there is a dependency on the first display controller to be taken out of reset for the second to be enabled successfully. Model this dependency using a PM device link. Signed-off-by: Dmitry Osipenko <[email protected]> [[email protected]: minor cleanups, extend commit message] Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: Fix non-debugfs buildsArnd Bergmann1-1/+7
The new debugfs registration fails to build when CONFIG_DEBUGFS is disabled, because the drm_crtc structure is lacking a member in that configuration: drivers/gpu/drm/tegra/dc.c: In function 'tegra_dc_late_register': drivers/gpu/drm/tegra/dc.c:1204:28: error: 'struct drm_crtc' has no member named 'debugfs_entry' Without CONFIG_DEBUGFS, the rest of the function already degrades into nothing, so we just avoid the one assignment. Fixes: b95800eeef09 ("drm/tegra: dc: Register debugfs in ->late_register()") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: dpaux: Keep reset defaults for hybrid pad parametersThierry Reding1-0/+3
Keep the reset values for the common mode voltage, output driver impedance control and output driver current control parameters. This fixes errors seen during SCDC communication with HDMI sinks. Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: Mark Tegra186 display hub PM functions __maybe_unusedArnd Bergmann1-2/+2
The newly introduced driver has optional suspend/resume functions, causing a warning when CONFIG_PM is disabled: drivers/gpu/drm/tegra/hub.c:749:12: error: 'tegra_display_hub_resume' defined but not used [-Werror=unused-function] drivers/gpu/drm/tegra/hub.c:733:12: error: 'tegra_display_hub_suspend' defined but not used [-Werror=unused-function] This marks them __maybe_unused to shut up the warnings. Fixes: c4755fb9064f ("drm/tegra: Add Tegra186 display hub support") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: Use IOMMU groupsThierry Reding3-18/+28
In order to support IOMMUs more generically and transparently handle the ARM SMMU on Tegra186, move to using groups instead of devices for domain attachment. An IOMMU group is a set of devices that share the same IOMMU domain and is therefore a good match to represent what Tegra DRM needs. Signed-off-by: Thierry Reding <[email protected]>
2017-12-21gpu: host1x: Use IOMMU groupsThierry Reding2-7/+16
Use IOMMU groups to attach the host1x device to its IOMMU domain. This is not strictly necessary because the domain isn't shared with any other device, but it makes the code consistent with how IOMMU is handled in other drivers and provides an easy way to detect when no IOMMU has been attached via device tree. Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: Implement zpos propertyThierry Reding5-32/+95
Implement the standard zpos property for planes on Tegra124 and later. Earlier generations have a different blending unit that needs different programming. Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: dc: Remove redundant spinlockThierry Reding2-12/+2
The spinlock is only used to serialize accesses to the DC_CMD_INT_MASK register. However, this register is accesses either with interrupts masked (in tegra_crtc_atomic_enable()) or protected by the vbl_lock and vblank_time_lock spinlocks of the DRM device. Therefore, these accesses don't need any extra serialization and the lock can be removed. Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: dc: Use direct offset to plane registersThierry Reding5-107/+116
Traditionally, windows were accessed indirectly, through a register selection window that required a global register to be programmed with the index of the window to access. Since the global register could be written from modesetting functions as well as the interrupt handler concurrently, accesses had to be serialized using a lock. Using direct accesses to the window registers the lock can be avoided. Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/tegra: dc: Support more formatsThierry Reding4-22/+235
Also, split up formats into per-SoC lists because not all generations support all of them. Note that the list is now exhaustive for all RGB formats, but not for YUV and indexed formats. Signed-off-by: Thierry Reding <[email protected]>
2017-12-21drm/i915: Disable all planes for load detection, v2.Ville Syrjälä1-129/+18
We don't need any active planes during load detection, so just disable them all. This saves us from having to come up with a suitable framebuffer. And we also avoid leaving sprite/cursor planes on and potentially presenting them at a peculiar location during the load detection. Changes since v1 (Maarten): - Add missing call to add_all_affected_planes. Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102707 Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]>
2017-12-21Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie193-5873/+6633
into drm-next * 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: (171 commits) drm/amdgpu: fix test for shadow page tables drm/amd/display: Expose dpp1_set_cursor_attributes drm/amd/display: Update FMT and OPPBUF functions drm/amd/display: check for null before calling is_blanked drm/amd/display: dal 3.1.27 drm/amd/display: Fix unused variable warnings. drm/amd/display: Only blank DCN when we have set_blank implementation drm/amd/display: Put dcn_mi_registers with other structs drm/amd/display: hubp refactor drm/amd/display: integrating optc pseudocode drm/amd/display: Call validate_fbc should_enable_fbc drm/amd/display: Clean up DCN cursor code drm/amd/display: fix 180 full screen pipe split drm/amd/display: reprogram surface config on scaling change drm/amd/display: Remove dwbc from pipe_ctx drm/amd/display: Use the maximum link setting which EDP reported. drm/amd/display: Add hdr_supported flag drm/amd/display: fix global sync param retrieval when not pipe splitting drm/amd/display: Update HUBP drm/amd/display: fix rotated surface scaling ...
2017-12-21Merge tag 'omapdrm-4.16' of ↵Dave Airlie70-483/+854
git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next omapdrm changes for v4.16 * support memory bandwidth limits * DSI command mode panel cleanups for N9 * DMM error handling * tag 'omapdrm-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (27 commits) drm: omapdrm: Simplify platform registration drm: omapdrm: Remove filename from header and fix copyright tag drm/omap: DMM: Check for DMM readiness after successful transaction commit drm/omap: DMM: Print information if we received an error interrupt drm/omap: DMM: In case of error/timeout in wait_status() print the reason drm/omap: DMM: Fix DMM_IRQSTAT_ERR_MASK definition drm: omapdrm: Deconstruct the omap_drv.h header. drm: omapdrm: venc: Return error code on OF parsing failure drm: omapdrm: dpi: Remove dpi_data port_initialized field drm: omapdrm: dss: Make dss_dump_clocks() function static drm: omapdrm: dss: Set the DMA coherent mask drm: omapdrm: Remove unused omap_dss_find_device() function drm: omapdrm: Pass drm_device to omap_gem_resume() drm: omapdrm: dpi: Don't treat GPIO probe deferral as an error drm/omap: panel-dsi-cm: switch to gpiod drm/omap: panel-dsi-cm: add external backlight support drm/omap: panel-dsi-cm: add physical size support drm/omap: panel-dsi-cm: add regulator support drm/omap: panel-dsi-cm: fix driver drm/omap: add support for physical size hints from display drivers ...
2017-12-21Merge tag 'tilcdc-4.16' of https://github.com/jsarha/linux into drm-nextDave Airlie2-51/+2
drm/tilcdc changes for 4.16 * tag 'tilcdc-4.16' of https://github.com/jsarha/linux: drm/tilcdc: make tilcdc_mode_hvtotal() static drm/tilcdc: Remove drm_framebuffer_get() and *_put() calls drm/tilcdc: ensure nonatomic iowrite64 is not used
2017-12-21Merge tag 'drm-intel-next-2017-12-14' of ↵Dave Airlie85-1305/+3099
git://anongit.freedesktop.org/drm/drm-intel into drm-next - Fix documentation build issues (Randy, Markus) - Fix timestamp frequency calculation for perf on CNL (Lionel) - New DMC firmware for Skylake (Anusha) - GTT flush fixes and other GGTT write track and refactors (Chris) - Taint kernel when GPU reset fails (Chris) - Display workarounds organization (Lucas) - GuC and HuC initialization clean-up and fixes (Michal) - Other fixes around GuC submission (Michal) - Execlist clean-ups like caching ELSP reg offset and improving log readability (Chri\ s) - Many other improvements on our logs and dumps (Chris) - Restore GT performance in headless mode with DMC loaded (Tvrtko) - Stop updating legacy fb parameters since FBC is not using anymore (Daniel) - More selftest improvements (Chris) - Preemption fixes and improvements (Chris) - x86/early-quirks improvements for Intel graphics stolen memory. (Joonas, Matthew) - Other improvements on Stolen Memory code to be resource centric. (Matthew) - Improvements and fixes on fence allocation/release (Chris). GVT: - fixes for two coverity scan errors (Colin) - mmio switch code refine (Changbin) - more virtual display dmabuf fixes (Tina/Gustavo) - misc cleanups (Pei) - VFIO mdev display dmabuf interface and gvt support (Tina) - VFIO mdev opregion support/fixes (Tina/Xiong/Chris) - workload scheduling optimization (Changbin) - preemption fix and temporal workaround (Zhenyu) - and misc fixes after refactor (Chris) * tag 'drm-intel-next-2017-12-14' of git://anongit.freedesktop.org/drm/drm-intel: (87 commits) drm/i915: Update DRIVER_DATE to 20171214 drm/i915: properly init lockdep class drm/i915: Show engine state when hangcheck detects a stall drm/i915: make CS frequency read support missing more obvious drm/i915/guc: Extract doorbell verification into a function drm/i915/guc: Extract clients allocation to submission_init drm/i915/guc: Extract doorbell creation from client allocation drm/i915/guc: Call invalidate after changing the vfunc drm/i915/guc: Extract guc_init from guc_init_hw drm/i915/guc: Move GuC workqueue allocations outside of the mutex drm/i915/guc: Move shared data allocation away from submission path drm/i915: Unwind i915_gem_init() failure drm/i915: Ratelimit request allocation under oom drm/i915: Allow fence allocations to fail drm/i915: Mark up potential allocation paths within i915_sw_fence as might_sleep drm/i915: Don't check #active_requests from i915_gem_wait_for_idle() drm/i915/fence: Use rcu to defer freeing of irq_work drm/i915: Dump the engine state before declaring wedged from wait_for_engines() drm/i915: Bump timeout for wait_for_engines() drm/i915: Downgrade misleading "Memory usable" message ...
2017-12-20i915: Reject CCS modifiers for pipe C on GeminilakeGabriel Krisman Bertazi1-1/+1
Current code advertises (on the modifiers blob property) support for CCS modifier for pipe C on GLK, only to reject it later when validating the request before the atomic commit. This fixes the tests igt@kms_ccs@pipe-c-*, which should skip on GLK for pipe C (see bug 104096). A relevant discussion is archived at: https://lists.freedesktop.org/archives/intel-gfx/2017-December/150646.html Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104096 Signed-off-by: Gabriel Krisman Bertazi <[email protected]> Cc: Ben Widawsky <[email protected]> Reviewed-by: Ben Widawsky <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-12-20drm/amdgpu: fix test for shadow page tablesChristian König1-1/+5
They don't work 100% correctly at the moment. Reviewed-and-Tested-by: Michel Dänzer <[email protected]> Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-20drm/amd/display: Expose dpp1_set_cursor_attributesYue Hin Lau1-0/+4
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-20drm/amd/display: Update FMT and OPPBUF functionsEric Bernstein6-54/+120
Updates to FMT and OPPBUF programming from HW team pseudocode review. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-20drm/amd/display: check for null before calling is_blankedYue Hin Lau1-2/+2
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-20drm/amd/display: dal 3.1.27Andrew Jiang1-1/+1
Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-20drm/amd/display: Fix unused variable warnings.Leo (Sunpeng) Li1-7/+0
... since linux kernel compile treats warnings as errors. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>