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2018-07-13drm/amd/display: Linux Set/Read link rate and lane count through debugfsHersen Wu2-0/+82
expose dc function to be called by linux dm Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Sun peng Li <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Implement cursor multiplierKrunoslav Kovac3-4/+24
DCN allows cursor multiplier when blending FP16 surface. Signed-off-by: Krunoslav Kovac <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: support access ddc for mst branchEric Yang1-0/+4
[Why] Megachip dockings accesses ddc line through display driver when installing FW. Previously, we would fail every transaction because link attached to mst branch did not have their ddc transaction type set. [How] Set ddc transaction type when mst branch is connected. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Add avoid_vbios_exec_table debug bitTony Cheng1-0/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Yongqiang Sun <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/display: Separate HUBP surface size and rotation/mirror programmingEric Bernstein2-13/+23
Separate HUBP surface size and rotation/mirror programming so that HUBP revision without mirror/rotation do not access those register fields. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13Revert "drm/amd/display: make dm_dp_aux_transfer return payload bytes ↵Harry Wentland5-13/+21
instead of size" This reverts commit cc195141133ac3e767d930bedd8294ceebf1f10b. This commit was problematic on other OSes. The real solution is to leave all the error checking to DRM and don't do it in DC, which is addressed by "Return aux replies directly to DRM" later in this patchset. v2: Add reason for revert. Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13Revert "drm/amd/display: Don't return ddc result and read_bytes in same ↵Harry Wentland3-22/+13
return value" This reverts commit 8a61bc085ffab3071c59efcbeff4044c034e7490. Need to revert "make dm_dp_aux_transfer return payload bytes instead of size", which this commit is based on. That commit was problematic on other OSes. The real solution is to leave all the error checking to DRM and don't do it in DC, which is addressed by "Return aux replies directly to DRM" later in this patchset. v2: Add reason for revert. Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: Warn and update pin_size values when destroying a pinned BOMichel Dänzer1-7/+25
This shouldn't happen, but if it does, we'll get a backtrace of the caller, and update the pin_size values as needed. v2: * Check bo->pin_count instead of placement flags (Christian König) Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: Make pin_size values atomicMichel Dänzer4-21/+23
Concurrent execution of the non-atomic arithmetic could result in completely bogus values. v2: * Rebased on v2 of the previous patch Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/106872 Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: Keep track of amount of pinned CPU visible VRAMMichel Dänzer5-19/+14
Instead of CPU invisible VRAM. Preparation for the following, no functional change intended. v2: * Also change amdgpu_vram_mgr_bo_invisible_size to amdgpu_vram_mgr_bo_visible_size, allowing further simplification (Christian König) Cc: [email protected] Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/scheduler: modify args of drm_sched_entity_initNayan Deshmukh11-33/+33
replace run queue by a list of run queues and remove the sched arg as that is part of run queue itself Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Eric Anholt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/scheduler: add a pointer to scheduler in the rqNayan Deshmukh2-2/+6
This patch is in preparation for a better load balancing in scheduler. It allows us to associate entities with the run queues instead of binding them to a scheduler. Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Eric Anholt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: fix TTM move entity init orderChristian König1-16/+21
We are initializing the entity before the scheduler is actually initialized. This can lead to all kind of problem, but especially NULL pointer deref because of Nayan's scheduler work. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd: Use newly added interrupt source defs for SOC15.Andrey Grodzovsky7-15/+29
Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd: Add interrupt source definitions for SOC15 v3.Andrey Grodzovsky9-0/+359
Stop using 'magic numbers' when registering interrupt sources. v2: Switch to kernel style comments. v3: Rebase. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd: Use newly added interrupt source defs for VI v3.Andrey Grodzovsky12-26/+46
v2: Rebase v3: Use defines for CP_SQ and CP_ECC_ERROR interrupts. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd: Add interrupt source definitions for VI v3.Andrey Grodzovsky1-0/+98
Stop using 'magic numbers' when registering interrupt sources. v2: Clean redundant comments. Switch to kernel style comments. v3: Add CP_ECC_ERROR define Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/powerplay: convert the sclk/mclk into Mhz for comparationEvan Quan1-2/+2
Convert the clocks into right Mhz unit. Otherwise, it will miss the equal situation. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/powerplay: no need to mask workable gfxoff feature for vega12Evan Quan1-1/+1
Gfxoff feature for vega12 is workable. So, there is no need to mask it any more. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amd/powerplay: add vega12 SMU gfxoff support v3Evan Quan3-0/+46
Export apis for enabling/disabling SMU gfxoff support. v2: fit the latest gfxoff support framework v3: add feature_mask control Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <ray.huang at amd.com> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: reduce the idle period that RLC has to wait before request CGCGEvan Quan1-4/+7
Gfxoff feature may depends on the CGCG(on vega12, that's the case). This change will help to enable gfxoff feature more frequently. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: no touch for the reserved bit of RLC_CGTT_MGCG_OVERRIDEEvan Quan1-4/+11
On vega12, the bit0 of RLC_CGTT_MGCG_OVERRIDE is reserved. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: drop mmRLC_PG_CNTL clear v2Evan Quan1-3/+0
SMU owns this register so the driver should not set it to avoid breaking gfxoff. v2: update description Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <alexander.deucher at amd.com> Reviewed-by: Huang Rui <ray.huang at amd.com> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: correct rlc save restore list initialization for v2_1Evan Quan1-6/+12
The save restore list initialization does not have to be pg guarded. And for some asic(e.g. Vega12), it does not have cntl/gpm/srm lists. Signed-off-by: Evan Quan <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: init CSIB regardless of rlc version and pg statusEvan Quan1-1/+2
CSIB init has no relation with rlc version and pg status. It should be needed regardless of them. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-13drm/amdgpu: pin the csb buffer on hw init v2Evan Quan1-0/+40
Without this pin, the csb buffer will be filled with inconsistent data after S3 resume. And that will causes gfx hang on gfxoff exit since this csb will be executed then. v2: fit amdgpu_bo_pin change(take one less argument) Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amd/pp: fix semicolon.cocci warningskbuild test robot1-1/+1
drivers/gpu/drm/amd/amdgpu/../powerplay/amd_powerplay.c:1209:17-18: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci Fixes: ea870e44415a ("drm/amd/pp: Export notify_smu_enable_pwe to display") CC: Rex Zhu <[email protected]> Signed-off-by: kbuild test robot <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: get VCN start to process in the dpm disabled caseLeo Liu1-1/+1
Fixes: 22cc6c5e19 (drm/amdgpu: Add runtime VCN PG support) Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: move cache window setup after power and clock resumeLeo Liu1-2/+2
To make register read/write reliable Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: Take VCN jpeg ring into account in idle work handlerLeo Liu1-0/+2
VCN won't get power off when only jpeg active Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/ttm: Replace ttm_bo_unref() with ttm_bo_put()Thomas Zimmermann3-9/+9
A call to ttm_bo_unref() clears the supplied pointer to NULL, while ttm_bo_put() does not. None of the converted call sites requires the pointer to become NULL, so the respective assign operations has been left out from the patch. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/ttm: Replace ttm_bo_reference() with ttm_bo_get()Thomas Zimmermann2-5/+8
Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/ttm: Introduce ttm_bo_get() and ttm_bo_put() for ref countingThomas Zimmermann2-2/+31
The TTM buffer-object interface provides ttm_bo_reference() and ttm_bo_unref() for managing reference counts. Replacing them with ttm_bo_get() and ttm_bo_put() aligns the API with conventions used throughout the Linux kernel. The implementation of ttm_bo_unref() clears the supplied pointer to NULL. This leads to workarounds where the caller saves the pointer's value before de-referencing the BO. ttm_bo_put() does not clear the supplied pointer. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/ttm: use swap macro in ttm_bo_handle_move_memGustavo A. R. Silva1-5/+2
Make use of the swap macro and remove unnecessary variable *tmp_mem*. This makes the code easier to read and maintain. Also, reduces the stack usage. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amd/pp: Send khz clock values to DC for smu7/8Harry Wentland2-7/+7
The previous change wasn't covering smu 7 and 8 and therefore DC was seeing wrong clock values. This fixes an issue where the pipes seem to hang with a 4k DP and 1080p HDMI display. Fixes: c3df50abc84b ("drm/amd/pp: Convert clock unit to KHz as defined") Signed-off-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Cc:[email protected] Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: Verify root PD is mapped into kernel address space (v4)Andrey Grodzovsky1-1/+3
Problem: When PD/PT update made by CPU root PD was not yet mapped causing page fault. Fix: Verify root PD is mapped into CPU address space. v2: Make sure that we add the root PD to the relocated list since then it's get mapped into CPU address space bt default in amdgpu_vm_update_directories. v3: Drop change to not move kernel type BOs to evicted list. v4: Remove redundant bo move to relocated list. Link: https://bugs.freedesktop.org/show_bug.cgi?id=107065 Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: Present amdgpu_task_info in VM_FAULTS.Andrey Grodzovsky3-5/+18
Extract and present the reposnsible process and thread when VM_FAULT happens. v2: Use getter and setter functions. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Jim Qu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: Add support for logging process info in amdgpu_vm.Andrey Grodzovsky2-0/+55
Add process and thread names and pids and a function to extract this info from relevant amdgpu_vm. v2: Add documentation and fix identation. v3: Add getter and setter functions for amdgpu_task_info. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Jim Qu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amd/display: Make function pointer structs constHarry Wentland5-6/+6
const to avoid hard-to-find bugs where some function overrides a function pointer. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amd/display: make function tables constChristian König3-5/+5
It is good practice to make global function tables const to avoid accidental override. Signed-off-by: Christian König <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amd/display: fix invalid function table overrideChristian König1-2/+25
Otherwise we try to program hardware with the wrong watermark functions when multiple DCE generations are installed in one system. Signed-off-by: Christian König <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amd/pp: Convert 10KHz to KHz as variable nameRex Zhu2-3/+2
The default clock unit in powerplay is 10KHz. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: Add CLK IP base offsetRex Zhu2-0/+2
so we can read/write the registers in CLK domain through RREG32/WREG32_SOC15 Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: Reserve VM root shared fence slot for command submission (v3)Michel Dänzer1-0/+4
Without this, there could not be enough slots, which could trigger the BUG_ON in reservation_object_add_shared_fence. v2: * Jump to the error label instead of returning directly (Jerry Zhang) v3: * Reserve slots for command submission after VM updates (Christian König) Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/106418 Reported-by: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: fix kmap error handling for bo creationsJunwei Zhang1-1/+1
kmap happens after bo pin, so unpin is required on error Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: allocate gart memory when it's required (v3)Junwei Zhang7-10/+57
Instead of calling gart address space on every bo pin, allocates it on demand v2: fix error handling v3: drop the change on amdgpu_amdkfd_gpuvm.c, not needed. Signed-off-by: Junwei Zhang <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10drm/amdgpu: separate gpu address from bo pinJunwei Zhang17-57/+50
It could be got by amdgpu_bo_gpu_offset() if need Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-07-10Merge tag 'vmwgfx-next-4.19-3' of ↵Dave Airlie16-969/+2032
git://people.freedesktop.org/~thomash/linux into drm-next This introduces a header update and support for multisample surfaces. Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-07-10Merge tag 'vmwgfx-next-4.19-2' of ↵Dave Airlie25-1644/+2011
git://people.freedesktop.org/~thomash/linux into drm-next A series of cleanups / reorganizations and modesetting changes that mostly target atomic state validation. [airlied: conflicts with SPDX stuff in amdgpu tree] Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-07-10Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie137-2873/+4229
into drm-next More features for 4.19: - Use core pcie functionality rather than duplicating our own for pcie gens and lanes - Scheduler function naming cleanups - More documentation - Reworked DC/Powerplay interfaces to improve power savings - Initial stutter mode support for RV (power feature) - Vega12 powerplay updates - GFXOFF fixes - Misc fixes Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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