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2020-09-17ASoC: dt-bindings: Correct interrupt flags in examplesKrzysztof Kozlowski7-7/+7
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted some logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: dt-bindings: aries-wm8994: Match compatibles with enumKrzysztof Kozlowski1-6/+5
The common pattern for enumerating compatibles is enum, not oneOf. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17Merge branch 'asoc-5.9' into asoc-5.10Mark Brown28-192/+364
2020-09-17ASoC: fsl_sai: Set MCLK input or output directionShengjiu Wang1-0/+7
SAI support select MCLK direction with version.major > 3 and version.minor > 1, the default direction is input, set it to be output according to DT property. Signed-off-by: Shengjiu Wang <[email protected]> Acked-by: Nicolin Chen <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: fsl_sai: Add fsl_sai_check_version functionShengjiu Wang2-0/+75
fsl_sai_check_version can help to parse the version info in VERID and PARAM registers. Signed-off-by: Shengjiu Wang <[email protected]> Acked-by: Nicolin Chen <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: fsl_sai: Add new added registers and new bit definitionShengjiu Wang2-0/+82
On i.MX8MQ/i.MX8MN/i.MX8MM platform, the sai IP is upgraded. There are some new registers and new bit definition. This patch is to complete the register list. Signed-off-by: Shengjiu Wang <[email protected]> Acked-by: Nicolin Chen <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: q6afe-clocks: add q6afe clock controllerSrinivas Kandagatla3-0/+275
q6afe already exposes lpass clocks, however this was not presented as proper clock controller driver. This patch basically adds clock controller support for q6afe clocks. This is useful for other drivers like lpass digital codec or lpass lowpower island drivers to request or vote for these clocks. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: q6afe: dt-bindings: add q6afe clock bindingsSrinivas Kandagatla2-1/+96
q6afe exposes various lpass clocks controls via q6dsp q6afe commands. This patch adds bindings required for this clock controller. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: Intel: hda: reduce verbosity of boot error logsPierre-Louis Bossart4-10/+28
Previous commits reduced the verbosity of errors during boot iterations, but there are still a couple remaining which generate false positives. Errors should only be logged when after last attempt to download firmware failed. Duplicating logs and assigning them different levels based on the iteration number isn't really elegant, use macro as suggested by Guennadi. Suggested-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: fix range checksGuennadi Liakhovetski2-23/+35
On multiple locations checks are performed of untrusted values after adding a constant to them. This is wrong, because the addition might overflow and the result can then pass the check, although the original value is invalid. Fix multiple such issues by checking the actual value and not a sum of it and a constant. Signed-off-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: remove several superfluous type-castsGuennadi Liakhovetski1-3/+3
No need to type-cast assignments between void and other pointers in C. Signed-off-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: (cosmetic) remove redundant "ret" variable usesGuennadi Liakhovetski2-28/+18
In some cases no "ret" variable is even needed, those functions always return 0 anyway, in other cases "ret" initialisation is redundant. Signed-off-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: control: update test for pm_runtime_get_sync()Pierre-Louis Bossart1-1/+1
We need to avoid reporting an error for -EACCESS when pm_runtime is not enabled. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: debug: update test for pm_runtime_get_sync()Pierre-Louis Bossart1-1/+1
We need to avoid reporting an error for -EACCESS when pm_runtime is not enabled. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: Add `src_hash` to `sof_ipc_fw_version` structureKarol Trzcinski1-1/+3
This field will be used to compare ldc file with loaded fw version, to assert validity of trace logs. Value used in sof-logger. Signed-off-by: Karol Trzcinski <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: SOF: imx: Add debug support for imx platformsIulian Olaru6-2/+137
This patch adds debug support for imx platforms. This is important in order to gather information about the state of the DSP in case of an oops and the reason for the oops. This is done by checking if a message with a panic code has been placed in the debug box, in the imx8_dsp_handle_request function from sof/imx. If positive, the function imx8_dump, added in common, will be called. The first step is to gather information about the registers, filename, line number and stack by calling the imx8_get_registers, added in common. Then the information will be printed to the console by calling the get_status function. Signed-off-by: Iulian Olaru <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Daniel Baluta <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: tlv320adcx140: Fix BCLK inversion for DSP modesDan Murphy1-21/+23
Fix the BCLK inversion for DSP modes This is how it is defined by ASoC: * BCLK: * - "normal" polarity means signal is available at rising edge of BCLK * - "inverted" polarity means signal is available at falling edge of BCLK The adcx140 defines the BCLK edge based on coding type. The PCM (DSP_A/B) should drive on rising and sample on falling edge, so from ASoC pov, it is IB_NF. But from the codec pov if it is configured in DSP mode, then the BCLK should not be inverted, defaults to the coding standard. For i2s, it is NB_NF from ASoC pov (drive on falling, sample on rising). >From the codec's pov BCLK should not invert either, as this is the default for the coding. So, inversion must take the format into account: IB_NF + DSP_A/B == the codec bclk inversion should be disabled NB_NF + DSP_A/B == the codec bclk inversion should be enabled NB_NF + I2S == the codec bclk inversion should be disabled Signed-off-by: Dan Murphy <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: tlv320adcx140: Idle the device while writing registersDan Murphy2-11/+34
It was observed that if the device was active and register writes were performed there were some unwanted behaviors particularly when writing the word length and some filter options. So when writing to the device the device should be placed in sleep mode and then exit sleep mode once the register update is complete. Signed-off-by: Dan Murphy <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: tlv320adcx140: Fix digital gain rangeCamel Guo1-1/+1
According to its datasheet, the digital gain should be -100 dB when CHx_DVOL is 1 and 27 dB when CHx_DVOL is 255. But with the current dig_vol_tlv, "Digital CHx Out Volume" shows 27.5 dB if CHx_DVOL is 255 and -95.5 dB if CHx_DVOL is 1. This commit fixes this bug. Fixes: 689c7655b50c ("ASoC: tlv320adcx140: Add the tlv320adcx140 codec driver family") Signed-off-by: Camel Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: topology: disable size checks for bytes_ext controls if neededPierre-Louis Bossart1-0/+11
When CONFIG_SND_CTL_VALIDATION is set, accesses to extended bytes control generate spurious error messages when the size exceeds 512 bytes, such as [ 11.224223] sof_sdw sof_sdw: control 2:0:0:EQIIR5.0 eqiir_coef_5:0: invalid count 1024 In addition the error check returns -EINVAL which has the nasty side effect of preventing applications accessing controls from working, e.g. root@plb:~# alsamixer cannot load mixer controls: Invalid argument It's agreed that the control interface has been abused since 2014, but forcing a check should not prevent existing solutions from working. This patch skips the checks conditionally if CONFIG_SND_CTL_VALIDATION is set and the byte array provided by topology is > 512. This preserves the checks for all other cases. Fixes: 1a3232d2f61d2 ('ASoC: topology: Add support for TLV bytes controls') BugLink: https://github.com/thesofproject/linux/issues/2430 Reported-by: Takashi Iwai <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Jaska Uimonen <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-17ASoC: fsl_audmix: make clock and output src write onlyViorel Suman1-4/+12
"alsactl -f state.conf store/restore" sequence fails because setting "mixing clock source" and "output source" requires active TDM clock being started for configuration propagation. Make these two controls write only so that their values are not stored at "alsactl store". Signed-off-by: Viorel Suman <[email protected]> Acked-by: Nicolin Chen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-14ASoC: rt1015: Fix the failure to flush DAC data before playbackderek.fang2-7/+63
Fix the failure to flush DAC data before playback. Signed-off-by: derek.fang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-14ASoC: rt1015: Fix DC calibration on bypass boost modederek.fang2-14/+35
Fix the DC calibration unsuccessful issue on rt1015 bypass boost mode. Signed-off-by: derek.fang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11Merge series "ASoC: SOF: DSP core management fixes for 5.10" from Kai ↵Mark Brown10-31/+34
Vehmanen <[email protected]>: This series contains some improvements to how DSP core management is done in SOF, and adds a distinction between cores managed by the host versus cores managed by the DSP. Pierre-Louis Bossart (1): ASoC: SOF: Intel: hda-loader: s/master/primary Ranjani Sridharan (3): ASoC: SOF: rename cores_mask to host_managed_cores_mask ASoC: SOF: Intel: hda: modify core_power_up/down op ASoC: SOF: Intel: remove the HDA_DSP_CORE_MASK() macro sound/soc/sof/intel/apl.c | 2 +- sound/soc/sof/intel/bdw.c | 2 +- sound/soc/sof/intel/byt.c | 6 +++--- sound/soc/sof/intel/cnl.c | 15 ++++----------- sound/soc/sof/intel/hda-dsp.c | 20 +++++++++++++++++--- sound/soc/sof/intel/hda-loader.c | 11 +++++------ sound/soc/sof/intel/hda.c | 2 +- sound/soc/sof/intel/hda.h | 3 --- sound/soc/sof/intel/shim.h | 2 +- sound/soc/sof/intel/tgl.c | 2 +- 10 files changed, 34 insertions(+), 31 deletions(-) -- 2.27.0
2020-09-11Merge series "ASoC: mediatek: mt8183-da7219: support machine driver for ↵Mark Brown3-0/+42
rt1015p" from Tzung-Bi Shih <[email protected]>: The series reuses mt8183-da7219-max98357.c for supporting machine driver with rt1015p speaker amplifier. The 1st patch adds document for the new proposed compatible string. The 2nd patch changes the machine driver to support "RT1015P" codec. Tzung-Bi Shih (2): ASoC: dt-bindings: mt8183-da7219: add compatible string for using rt1015p ASoC: mediatek: mt8183-da7219: support machine driver with rt1015p .../bindings/sound/mt8183-da7219-max98357.txt | 1 + sound/soc/mediatek/Kconfig | 1 + .../mediatek/mt8183/mt8183-da7219-max98357.c | 40 +++++++++++++++++++ 3 files changed, 42 insertions(+) -- 2.28.0.526.ge36021eeef-goog
2020-09-11Merge series "ASoC: ti: j721e-evm: Support for j7200 variant" from Peter ↵Mark Brown2-22/+81
Ujfalusi <[email protected]>: Hi, Changes since v1: - Suffix the 2359296000 constant with 'u' to silence C90 warning When j7200 SOM is connected to the CPB, the audio setup is a bit different: Only 48KHz family have clock path, 44.1KHz is not supported. Update the binding documentation and add support for the j7200 version of CPB to the driver. Regards, Peter --- Peter Ujfalusi (2): ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb ASoC: ti: j721e-evm: Add support for j7200-cpb audio .../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++----- sound/soc/ti/j721e-evm.c | 11 +++ 2 files changed, 81 insertions(+), 22 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
2020-09-11ASoC: stm32: sai: add pm_runtime supportOlivier Moysan1-2/+8
Enable support of pm_runtime on STM32 SAI driver to allow SAI power state monitoring. pm_runtime_put_autosuspend() is called from ASoC framework on pcm device close. The pmdown_time delay is available in runtime context, and may be set in SAI driver to take into account shutdown delay on playback. However, this shutdown delay is already handled in the DAPMs of the audio codec linked to SAI CPU DAI. So, the choice is made, not to support this delay on CPU DAI side. Signed-off-by: Olivier Moysan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ALSA: rockchip_i2s: fix a possible divide-by-zero bug in ↵Tuo Li1-1/+1
rockchip_i2s_hw_params() The variable bclk_rate is checked in: if (bclk_rate && mclk_rate % bclk_rate) This indicates that bclk_rate can be zero. If so, a divide-by-zero bug will occur: div_bclk = mclk_rate / bclk_rate; To fix this possible bug, the function returns -EINVAL when bclk_rate is zero. Signed-off-by: Tuo Li <[email protected]> Link: https://lore.kernel.org/r/TY2PR04MB4029799E60A5BCAAD5B7B5BBB8280@TY2PR04MB4029.apcprd04.prod.outlook.com Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: SOF: Intel: Use DMI oem string search for tgl_max98373_rt5682Sathyanarayana Nujella2-2/+2
DMI product name is used to support system variants based out of tgl_max98373_rt5682 in current implementation. Replace this DMI search with DMI_OEM_STRING. Coreboot(BIOS used in these systems) is setting the needed DMI_OEM_STRING field to uniquely identify these systems. Signed-off-by: Sathyanarayana Nujella <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: SOF: Intel: hda-loader: s/master/primaryPierre-Louis Bossart1-1/+1
Use inclusive language for DSP cores. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Jaska Uimonen <[email protected]> Reviewed-by: Seppo Ingalsuo <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: SOF: Intel: remove the HDA_DSP_CORE_MASK() macroRanjani Sridharan5-19/+8
Remove the HDA_DSP_CORE_MASK() macro and use BIT() and GENMASK() macros directly for more clarity. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Keyon Jie <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: SOF: Intel: hda: modify core_power_up/down opRanjani Sridharan1-2/+16
Modify the core_power_up/down ops for HDA platforms to restrict the core_mask to the ones allowed by chip->cores_mask. This is needed because on some HDA platforms not all cores can be powered up/down by the host and this must be handled internally in the FW. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Keyon Jie <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: SOF: rename cores_mask to host_managed_cores_maskRanjani Sridharan9-16/+16
Rename the cores_mask in struct sof_intel_dsp_desc to host_managed_cores_mask to be more indicative of the fact that only these cores can be powered up/down by the host. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Guennadi Liakhovetski <[email protected]> Reviewed-by: Keyon Jie <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: ti: j721e-evm: Add support for j7200-cpb audioPeter Ujfalusi1-0/+11
When j7200 SOM is attached to the CPB we only have parent clock for 48KHz family and the rate of the parent clock is 2359296000Hz. Signed-off-by: Peter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: dt-bindings: ti, j721e-cpb-audio: Document support for j7200-cpbPeter Ujfalusi1-22/+70
j721e or j7200 SOM can be attached to the same Common Processor Board (CPB) With the j7200 SOM only the 48KHz family parent clock is available and McASP0 is used for the audio. Signed-off-by: Peter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: mediatek: mt8183-da7219: support machine driver with rt1015pTzung-Bi Shih2-0/+41
Supports machine driver with rt1015p ("mt8183_da7219_rt1015p"). Embeds in the existing mt8183-da7219-max98357.c because they share most of the code. Signed-off-by: Tzung-Bi Shih <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-11ASoC: dt-bindings: mt8183-da7219: add compatible string for using rt1015pTzung-Bi Shih1-0/+1
Machines with rt1015p should use the compatible string "mediatek,mt8183_da7219_rt1015p". Signed-off-by: Tzung-Bi Shih <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10Merge series "ASoC: q6dsp: Add support to Codec Ports." from Srinivas ↵Mark Brown5-24/+689
Kandagatla <[email protected]>: LPASS IP on SoCs like SM8250 has Digital Codec part integrated into it. This ports are exposed in Q6DSP as Codec ports. This patchset adds support to those q6afe ports along with q6routing and q6afe-dai. This patchset has been tested along with other patches on Qualcomm Robotics RB5 Platform with Soundwire and WSA8815 Codec. Thanks, srini Srinivas Kandagatla (8): ASoC: q6dsp: q6afe: add support to Codec DMA ports ASoC: q6dsp: q6routing: add support to Codec DMA ports ASoC: q6dsp: q6afe: prepare afe_apr_send_pkt to take response opcode ASoC: q6dsp: q6afe: add global q6afe waitqueue ASoC: q6dsp: q6afe: add lpass hw voting support ASoC: q6dsp: q6afe: update q6afe_set_param to support global clocks ASoC: q6dsp: q6afe: add codec lpass clocks ASoC: q6dsp: q6afe-dai: add support to Codec DMA ports include/dt-bindings/sound/qcom,q6afe.h | 22 ++ sound/soc/qcom/qdsp6/q6afe-dai.c | 229 ++++++++++++++++++ sound/soc/qcom/qdsp6/q6afe.c | 308 +++++++++++++++++++++++-- sound/soc/qcom/qdsp6/q6afe.h | 33 ++- sound/soc/qcom/qdsp6/q6routing.c | 121 +++++++++- 5 files changed, 689 insertions(+), 24 deletions(-) -- 2.21.0
2020-09-10ASoC: q6dsp: q6afe-dai: add support to Codec DMA portsSrinivas Kandagatla1-0/+229
Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: q6dsp: q6afe: add codec lpass clocksSrinivas Kandagatla2-0/+35
LPASS now has integrated codec control whose clocks are controlled by Q6DSP. This patch adds support to those clocks. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: q6dsp: q6afe: update q6afe_set_param to support global clocksSrinivas Kandagatla1-10/+15
Previously there was no case where we need to set clock or send commands that are not associated with q6afe ports, now we have cases like clock voting and clock consumers like codecs that needed these clocks. update q6afe_set_param() to support such cases, including token passing. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: q6dsp: q6afe: add lpass hw voting supportSrinivas Kandagatla2-0/+107
Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: q6dsp: q6afe: add global q6afe waitqueueSrinivas Kandagatla1-5/+17
In some cases like clocks q6afe would have to process commands without an associated q6afe port, in such cases waitqueue is required at global level to wait for the command to finish. This patch also adds the command result to go with this waitqueue. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: q6dsp: q6afe: prepare afe_apr_send_pkt to take response opcodeSrinivas Kandagatla1-7/+6
Update afe_apr_send_pkt() to take response opcode that it should wait for. This is helpful in cases where we expect response other than the actual command opcode. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: q6dsp: q6routing: add support to Codec DMA portsSrinivas Kandagatla1-1/+120
Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: q6dsp: q6afe: add support to Codec DMA portsSrinivas Kandagatla3-2/+161
New LPASS supports various codec macros, DSP firmware already has support to those ports. Add corresponding configuration support to those ports in adsp drivers. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: dt-bindings: rt1015p: add documentTzung-Bi Shih1-0/+36
Adds DT binding document for rt1015p. Signed-off-by: Tzung-Bi Shih <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-10ASoC: rt1015p: add codec driverTzung-Bi Shih3-0/+157
Adds rt1015p codec driver. Rt1015p is a rt1015 variant. - It doesn't support I2C. - It only supports S24, 48kHz, 64FS. Signed-off-by: Tzung-Bi Shih <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-09ASoC: add DT bindings for Microchip S/PDIF TX ControllerCodrin Ciubotariu1-0/+75
This patch adds DT bindings for the new Microchip S/PDIF TX Controller embedded inside sama7g5 SoCs. Signed-off-by: Codrin Ciubotariu <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-09-09ASoC: mchp-spdiftx: add driver for S/PDIF TX ControllerCodrin Ciubotariu3-0/+885
The new SPDIF TX controller is a serial port compliant with the IEC- 60958 standard. It also supports programmable User Data and Channel Status fields. This IP is embedded in Microchip's sama7g5 SoC. Signed-off-by: Codrin Ciubotariu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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