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2016-11-18usb: dwc3: ep0: avoid empty-body warningArnd Bergmann1-6/+7
Building with W=1, we get a warning about harmless empty statements: drivers/usb/dwc3/ep0.c: In function 'dwc3_ep0_handle_intf': drivers/usb/dwc3/ep0.c:491:4: error: suggest braces around empty body in an 'if' statement [-Werror=empty-body] Instead of adding empty braces which would introduce checkpatch.pl warnings, we're just removing the code which doesn't do anything and making sure we return 0 so USBCV tool is happy. Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Move functions from header to sourceRazmik Karapetyan2-34/+29
Removed extern specifier from dwc2_host_start(), dwc2_host_disconnect() and dwc2_host_hub_info() functions. Moved those functions from header to source. Then make them static. Signed-off-by: Razmik Karapetyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Fix fifo_show() functionalityRazmik Karapetyan1-1/+1
NPTXFIFO's start address is showing 0x03000000 instead of 0x00000800. Replaced val & FIFOSIZE_DEPTH_MASK by val & FIFOSIZE_STARTADDR_MASK in fifo_show() function. Signed-off-by: Razmik Karapetyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Remove unnecessary request length checkingRazmik Karapetyan1-10/+0
Remove request length checking from dwc2_hsotg_unmap_dma() and dwc2_hsotg_map_dma(). That checking is done in functions called from those functions, usb_gadget_unmap_request_by_dev() and usb_gadget_map_request_by_dev() respectively, so it's unnecessary. Signed-off-by: Razmik Karapetyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Fix Control Write issue in DMA modeRazmik Karapetyan1-0/+7
While sending zlp for DWC2_EP0_STATUS_IN EP direction was changed to IN. Change it back to complete OUT transfer request. This affects only on DMA mode, because DMA buffer map/unmap function is direction sensitive. Signed-off-by: Razmik Karapetyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Don't program DMA address for 0 length requestRazmik Karapetyan1-1/+1
Check the request length in dwc2_hsotg_start_req() function. If length == 0, do not write DMA address to control register. Signed-off-by: Razmik Karapetyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Stop Complete Splits after Data PID == 0Sevak Arakelyan1-1/+6
Stop sending complete split requests in case of ISOC IN split transfers after getting data with PID0. Otherwise we will get a NYET for each additional IN token. Signed-off-by: Sevak Arakelyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: pci: avoid build warningFelipe Balbi1-24/+26
dwc3_pci_dsm() is only needed if (PM || PM_SLEEP), we should make sure it's not defined if neither of those is defined. This fixes a randconfig build warning. Acked-by: Arnd Bergmann <[email protected]> Reported-by: Arnd Bergmann <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: Workaround for irq mask issueJohn Youn1-0/+11
This is a workaround for STAR 9000961433 which affects only version 3.00a of the DWC_usb3 core. This prevents the controller interrupt from being masked while handling events. Enabling interrupt moderation allows us to work around this issue because once the GEVNTCOUNT.count is written the IRQ is immediately deasserted and won't be asserted again until GEVNTCOUNT.EHB is cleared. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: Implement interrupt moderationJohn Youn3-0/+47
Implement interrupt moderation which allows the interrupt rate to be throttled. To enable this feature the dwc->imod_interval must be set to 1 or greater. This value specifies the minimum inter-interrupt interval, in 250 ns increments. A value of 0 disables interrupt moderation. This applies for DWC_usb3 version 3.00a and higher and for DWC_usb31 version 1.20a and higher. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: add amcc,dwc-otg supportChristian Lamparter2-0/+2
This patch adds support for the "amcc,usb-otg" device which is found in the PowerPC Canyonlands' dts. The device definition was added by: commit c89b3458d8cc ("powerpc/44x: Add USB DWC DTS entry to Canyonlands board") but without any driver support as the dwc2 driver wasn't available at that time. Note: The system can't use the generic "snps,dwc2" compatible because of the special ahbcfg configuration. The default GAHBCFG_HBSTLEN_INCR4 of snps,dwc2 can cause a system hang when the USB and SATA is used concurrently. Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: fixes host_dma logicChristian Lamparter1-3/+2
This patch moves the the host_dma initialization before dwc2_set_param_dma_desc_enable() and dwc2_set_param_dma_desc_fs_enable(). The reason being that both function need it. Fixes: 1205489cee75bf39 ("usb: dwc2: Get host DMA device properties") Acked-by: John Youn <[email protected]> Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Add new core parameter for low speedVardan Mikayelyan4-11/+33
Added new core param for low speed, which can be used only when SNPSID is equal to DWC2_CORE_FS_IOT. When LS mode is enabled, we are restricting ep types and providing to upper layer only INTR and CTRL endpoints. Signed-off-by: Vardan Mikayelyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Program ep0_mps for LSVardan Mikayelyan1-0/+2
When device is enumerated in LS we should program ep0_mps accordingly. USB2 spec says that in LS mode, control ep mps must be 8. Signed-off-by: Vardan Mikayelyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Add IOT device IDs, configure core accordinglyVardan Mikayelyan2-1/+26
Add new device IDs for IOT gadget. Done changes in probe to configure core accordingly depending on device ID value. Signed-off-by: Vardan Mikayelyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Add support of dedicated full-speed PHY interfaceVahram Aharonyan1-5/+21
Do modifications in dwc2_hsotg_core_init_disconnected() function to enable USB 1.1 Full-Speed Serial Transceiver Select in GUSBCFG register if corresponding speed and PHY types are chosen. Adjust device speed selection in DCFG register as well. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Disable enabled HW endpoint in dwc2_hsotg_ep_disableVahram Aharonyan1-89/+93
Check if endpoint is enabled during dwc2_hsotg_ep_disable() function processing and call dwc2_hsotg_ep_stop_xfr() to disable it and flush associated FIFO. Move dwc2_hsotg_ep_stop_xfr() and dwc2_hsotg_wait_bit_set() functions upper before dwc2_hsotg_ep_enable and dwc2_hsotg_ep_disable function definitions. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Correct dwc2_hsotg_ep_stop_xfr() functionVahram Aharonyan1-23/+41
Correct dwc2_hsotg_ep_stop_xfr() function to follow dwc2 programming guide for setting NAK on specific endpoint, disabling it and flushing corresponding FIFO. Current code does not take into account whether core acts in shared or dedicated FIFO mode, current endpoint is periodic or not. It does not clear EPDISBLD interrupt after programming of DXEPCTL_EPDIS, does not flush shared TX FIFO and tries to clear global out NAK in wrong manner instead of setting DCTL_CGOUTNAK. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: For DDMA parse setup only after SetUp interruptVahram Aharonyan1-0/+10
Tests with various hosts show that depend on time difference between host sending SETUP packet and IN/OUT token SW could get Xfercomplete interrupt without SetUp interrupt. On the other hand, SW should parse received SETUP packet only after ensuring that Host has moved to either Data or Status stage of control transfer. For this purpose added checking in the dwc2_hsotg_epint() function to not handle xfercomplete and postpone SETUP packet analysis till SW's getting of setup phase done interrupt. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Adjust ISOC OUT request's actual len for DDMAVahram Aharonyan1-0/+4
In DDMA mode if programmed ISOC OUT transfer length is not DWORD aligned, after closing descriptor HW leaves value of 4 - (ureq->length % 4) in the RX bytes. This is caused because DMA works using 4B chunks. Example: if length = 9 and all 9 bytes were received from the bus, after xfercomplete rx_bytes value is 3. Hence add this value to the amount of transferred bytes. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Enable the BNA interruptVahram Aharonyan2-0/+5
Enable the BNA (Buffer Not Available) interrupt in descriptor DMA mode. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Start and complete DDMA isoc transfersVahram Aharonyan1-5/+304
For DDMA mode in case of isochronous transfers completion performed differently than other transfer types. This is because each usb request was mapped to one descriptor in the chain and SW gets xfercomplete interrupt on all descriptors. The endpoint remains enabled until HW processes last descriptor with "L" bit set or BNA interrupt gets asserted for IN and OUT endpoints correspondingly. Add function dwc2_gadget_complete_isoc_request_ddma() - completes one isochronous request taken from endpoint's queue. Add function dwc2_gadget_start_next_isoc_ddma() - tries to restart isochronous endpoint if requests are pending. Check for EPENA. If the endpoint was disabled, try to restart it after programming descriptor chain prepared by SW earlier, switch SW to fill the other half of chain. Add function dwc2_gadget_fill_isoc_desc() - initializes DMA descriptor for isochronous transfer based on the received request data and endpoint characteristics. Added function dwc2_gadget_start_isoc_ddma() - prepare DMA chain for isochronous transfer in DDMA, programs corresponding DMA address to DEPDMA, enables the endpoint. This function is called once SW decides to start isochronous IN or OUT transfer depend on reception of NAK or OUTTknEPdis interrupts indicating first isochronous token arrival from host. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: In DDMA keep incompISOOUT and incompISOIN maskedVahram Aharonyan1-2/+4
In DDMA mode incompISOOUT should be masked, similar as Bulk Out - XferCompl and BNA should be handled. incompISOIN is not valid in DDMA and is not getting asserted. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Add DDMA isoc related fields to dwc2_hsotg_epVahram Aharonyan2-0/+7
Preparing for isochronous transfers support adding in DDMA mode. In DDMA isochronous transfers are handled differently compared to Slave and BDMA modes. This is caused by fact that isoc requests contain data for one frame/microframe. HW descriptor should contain data of one frame/microframe as well. Hence each DMA descriptor in the chain will correspond to one usb request. Decided to divide endpoints descriptor chain to two halves - while one will be processed by HW, other one will be under SW control. First part will be passed to HW once ISOC traffic needs to be started. In parallel to HW's work SW will keep creating new entries in the other half of chain if new requests arrive in ep_queue routine. This will allow passing of already pre-prepared descriptors to HW immediately after endpoint gets disabled. The endpoint should be disabled once HW closes descriptor with "L" bit set. Afterwards SW will switch to use first part of chain if more requests are arriving. Add two members to the dwc2_hsotg_ep structure to be used in isochronous transfers' handling in DDMA mode: -isoc_chain_num - indicates which half of EP descriptor chain can be used by SW to add new queued requests while HW is processing other half. -next_desc - index which points to next not yet programmed descriptor in the half of descriptor chain which is under SW control. Also add initialization of these fields in function dwc2_hsotg_ep_enable(). Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Enable descriptor DMA modeVahram Aharonyan2-2/+9
Add DCFG register field macro for descriptor DMA mode and update core initialization routine to set that bit accordingly. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Start DDMA IN status phase in StsPhseRcvd handlerVahram Aharonyan1-2/+9
In DDMA mode of operation IN status phase of control write transfer should start after getting StsPhseRcvd interrupt. This interrupt is issued by HW once host starts to send IN tokens after data stage. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Fixes for StsPhseRcvd interruptVahram Aharonyan1-6/+7
The StsPhseRcvd interrupt should not be enabled in slave mode. Also move the StsPhsRcvd interrupt checking in the endpoint interrupt handler to the correct order according to the databook. The interrupt itself will be implemented in a later commit. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: DDMA transfer start and completeVahram Aharonyan1-13/+83
Update transfer starting dwc2_hsotg_start_req() routine with call of function dwc2_gadget_config_nonisoc_xfer_ddma() to fill descriptor chain. Add call of dwc2_gadget_get_xfersize_ddma() in dwc2_hsotg_handle_outdone() and dwc2_hsotg_complete_in() interrupt handlers for DDMA mode to get information on transferred data from descriptors instead of DXEPTSIZ. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: EP 0 specific DDMA programmingVahram Aharonyan1-5/+161
Add dwc2_gadget_set_ep0_desc_chain() function to switch between EP0 DDMA chains depend on the stage of control transfer. Include EP0 DDMA chain selection during ep_queue called from dwc2_hsotg_enqueue_setup() for setup stage. Selecting and filling DDMA chain for status phase as well - add calls of dwc2_gadget_set_ep0_desc_chain() and dwc2_gadget_config_nonisoc_xfer_ddma() functions. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Remove reading in of invalid propertyJohn Youn1-6/+1
This property was mistakenly added, then removed, so don't read it in. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: twl6030-usb: make driver DT onlyNicolae Rosia2-17/+7
All users are DT-only and it makes no sense to keep unused code Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Nicolae Rosia <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: gadget: clear events in top-half handlerJohn Youn1-2/+2
Now that all the infrastructure is in place, we can clear events in the top-half handler in order to bring IRQ line low ASAP. This is also a necessary step in order to implement workaround for known erratum in follow-up patches. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: gadget: use evt->cache for processing eventsJohn Youn1-1/+8
Let's start copying events from evt->buf to evt->cache and use evt->cache for processing events. A follow-up patch will be added to clear events in the top-half handler in order to bring IRQ line low as soon as possible. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: gadget: use evt->length as we shouldFelipe Balbi1-1/+1
Instead of always accessing the macro directly, let's rely on evt->length which is the actual length of current event buffer. While unlikely, we could change event buffer's size at any time. Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: core: add a event buffer cacheJohn Youn2-0/+6
This extra buffer will be used so we can copy triggered events from our event buffer to this cache and process all of them later in bottom half handler. We need this in order to implement a workaround for a known erratum in recent DWC3 release. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: phy: phy-generic: add the implementation of .set_suspendPeter Chen1-0/+9
Add clock operation at .set_suspend if the PHY has suspend requirement, it can be benefit of power saving for phy and the whole system (parent clock may also be disabled). Signed-off-by: Peter Chen <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: core: remove dwc3_soft_reset()Felipe Balbi1-39/+0
dwc3_soft_reset() is doing the same thing as dwc3_core_soft_reset(). Let's remove dwc3_soft_reset() since that's not needed anymore. Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: gadget: Fix checkpatch error for bracesAnson Jacob4-50/+25
Fix error message by checkpath.pl open brace '{' following struct/enum go on the same line Patch applied by running fix inplace capability of checkpatch: checkpatch.pl -f *.[ch] --types OPEN_BRACE --fix-inplace Signed-off-by: Anson Jacob <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: isp1301-omap: don't opencode IS_REACHABLE()Fabian Frederick1-1/+1
We have a macro which does the same trick. Let's use it. Signed-off-by: Fabian Frederick <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: core: urb make use of usb_endpoint_maxp_multMike Krinkin1-5/+2
Since usb_endpoint_maxp now returns only lower 11 bits mult calculation here isn't correct anymore and that breaks webcam for me. Patch make use of usb_endpoint_maxp_mult instead of direct calculation. Fixes: abb621844f6a ("usb: ch9: make usb_endpoint_maxp() return only packet size") Signed-off-by: Mike Krinkin <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: Add a function to check propertiesJohn Youn1-26/+33
Add a function to check properties and call it from probe. This will allow us to add check code without bloating the probe function. This needs to be done after dwc3_get_properties() and dwc3_core_init() so that all the properties and hardware configs are available. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc3: Add a check for the DWC_usb3 coreJohn Youn1-0/+6
Add a helper function to check if we are running on a DWC_usb3 core. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Add DDMA chain pointers to dwc2_hsotg_ep structureVahram Aharonyan2-2/+38
Add DMA descriptor members to the dwc2_hsotg_ep structure. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Transfer length limit checking for DDMAVahram Aharonyan1-1/+31
Add dwc2_gadget_get_chain_limit() function and its call in transfer start routine to correctly estimate one go on transfer size if descriptor DMA mode is selected. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: host: Rename MAX_DMA_DESC_SIZE to HOST_DMA_NBYTES_LIMITVahram Aharonyan2-3/+3
Rename MAX_DMA_DESC_SIZE to HOST_DMA_NBYTES_LIMIT as it stores value of host DMA descriptor transfer bytes' limit. Values are different in case of gadget DMA descriptors. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Add DMA descriptor chains for EP 0Vahram Aharonyan2-0/+67
Update dwc2_hsotg structure to add descriptor chains for EP 0: two DMA descriptors for Setup phase, per one for IN/OUT data and status phases. Add their allocation function dwc2_gadget_alloc_ctrl_desc_chains() and its call during gadget probe. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Add DMA descriptor status quadlet fieldsVahram Aharonyan1-0/+37
Add device mode DMA transfer descriptor status quadlet field notations. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: gadget: Add descriptor DMA parameterVahram Aharonyan3-0/+19
Add a parameter for descriptor DMA and set it based on hardware capabilities. This won't actually be used by the gadget until later, when the descriptor DMA code is in place. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Make the DMA descriptor structure packedVahram Aharonyan1-1/+1
Make the DMA descriptor structure packed to guarantee alignment and size in memory. Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
2016-11-18usb: dwc2: Update DMA descriptor structureVahram Aharonyan4-29/+30
Rename DMA descriptor structure from dwc2_hcd_dma_desc to dwc2_dma_desc as it is applies to both host and gadget. Signed-off-by: Vahram Aharonyan <[email protected]> Signed-off-by: John Youn <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
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