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2020-04-22drm/amd/display: Avoid NULL pointer in set_backlight when ABM is NULLNicholas Kazlauskas1-2/+1
[Why] On ASIC without ABM support (most dGPU) we run into a null pointer dereference when attempting to set the backlight level. [How] This function requires ABM, so fix up the condition to only allow DMCU to be optional. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Wyatt Wood <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: fix stream setting for diags on siliconDmytro Laktyushkin1-2/+2
We need to set up stream even with virtual displays when running diags. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Cast int to float before divisionSung Lee1-2/+2
[Why]: Some inputs to dml_ceil have it dividied by int which causes a truncation. This loss of precision means the ceil function becomes redundant and does not round up. [How]: Cast parameter to float before division. Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Set meta_chunk_value to 0 in DML if DCC disabled in DCN2.1Sung Lee1-1/+4
[WHY]: Calculating refcyc_per_meta_chunk_vblank_l when DCC is disabled may lead to a large number causing an assert to get hit. In VBA, this value is 0 when DCC is disabled. [HOW]: Set value to 0 to avoid hitting the assert. Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: add optc get crc support for timings with ODM/DSCWenjing Liu5-3/+33
[why] Optc needs to know if timing is enabled with ODM or DSC before computing crc. Otherwise value computed will be inaccurate. Before this change, the CRC computed without ODM is not equal to the CRC computed with ODM for the same timing. This is unexpected as we are driving the same timing despite of the underlaying hardware setup to achieve it. This is caused by missing hardware programming sequence to support it. [how] Add the new programming sequence based on hardware guide. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Workaround to disable YCbCrJinze Xu2-1/+3
[Why] Some mst dock can't translate DP to HDMI properly. [How] Bypass YCbCr timings on specific MST device. Signed-off-by: Jinze Xu <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Check ramp != NULL before applying lut1d for degammaNicholas Kazlauskas1-1/+1
[Why] A NULL ramp is a valid configuration for passing into mod_color_calculate_degamma_params but we'll hit a NULL pointer if we do so. We need this in order to get the right transfer function to do degamma on NV12 formats where we aren't supplied with a custom user degamma. [How] Add the NULL check. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Zhan Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Unify psr feature flagsWyatt Wood13-39/+72
[Why] As it stands, psr has feature flags in dm, stream, and link. Most are not defined well enough, and different dm layers have different uses for these same flags. [How] We define a new structure called psr_settings in dc_link that will hold the following psr feature flags: psr_feature_enable - psr is supported psr_allow_active - psr is currently active psr_version - internal psr version supported psr_frame_capture_indication_req psr_sdp_transmit_line_num_deadline The last two flags were moved out of the power module for the purposes of consolidating psr flags. Their use is already well-defined. Psr caps reported by sink will also be stored in dc_link, in dpcd_caps.psr_caps. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Support plane-level gamut remap in DMStylon Wang1-0/+3
[Why] Plane-level gamut remap is not enabled in DM, which is necessary to support CTM as a plane-level property. [How] Enable gamut remap in DM. Signed-off-by: Stylon Wang <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Add SetBacklight call to abm on dmcubWyatt Wood4-9/+9
[Why] Set backlight calls to firmware are are being prevented by dmcu == null check. Dmcu is expected to be null in this case. [How] Only prevent call if dmcu and abm are null. Also rename variable 'use_smooth_brightness' to 'fw_set_brightness' as it's more appropriate. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Remove byte swapping for dmcub abm config tableWyatt Wood1-38/+36
[Why] Since x86 and dmcub are both little endian, byte swapping isn't necessary. Dmcu requires byte swapping as it is big endian. [How] Add flag to function definitions to determine if byte swapping is necessary. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Force watermark value propagationJoshua Aberback2-1/+6
[Why] The HUBBUB watermark registers are in an area that cannot be power gated, but the HUBP copies of the watermark values are in areas that can be power gated. When we power on a pipe, it will not automatically take the HUBBUB values, we need to force propagation by writing to a watermark register. [How] - new HUBBUB function to re-write current value in a WM register - touch WM register after enabling the plane in program_pipe Signed-off-by: Joshua Aberback <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Move enable fractional pwm callWyatt Wood1-17/+17
[Why] Dmcu init fw call has some logic to initialize abm values. Since this doesn't exist on dmcub, must find a proper place for it in the abm sequence. [How] Move enable fractional pwm call. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Add user backlight level reg writeWyatt Wood1-0/+2
[Why] Porting abm from dmcu to dmcub missed one register write. [How] Add this register write in the SetBacklightLevel sequence. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Correct updating logic of dcn21's pipe VM flagsDale Zhao1-5/+1
[Why]: Renoir's pipe VM flags are not correctly updated if pipe strategy has changed during some scenarios. It will result in watermarks mistakenly calculation, thus underflow and garbage appear. [How]: Correctly update pipe VM flags to pipes which have been populated. Signed-off-by: Dale Zhao <[email protected]> Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Yongqiang Sun <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: Remove aconnector condition check for dpcd readZhan Liu1-20/+18
[Why] Aconnector is not necessary to be NULL in order to read dpcd successfully. Actually if we rely on checking aconnector here, we won't be able to turn off all displays before doing display detection. That will cause some MST hubs not able to light up. [How] Remove aconnector check when turning off all displays at hardware initialization stage. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Joseph Gravenor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/dc: remove unused variable 'video_optimized_pixel_rates'YueHaibing1-33/+0
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1017:50: warning: ‘video_optimized_pixel_rates’ defined but not used [-Wunused-const-variable=] static const struct pixel_rate_range_table_entry video_optimized_pixel_rates[] = { ^~~~~~~~~~~~~~~~~~~~~~~~~~~ commit d8cd587d2bfd ("drm/amd/display: removing MODULO change for dcn2") left behind this unused vairable, remove it. Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/powerplay: remove defined but not used variablesJason Yan1-23/+0
Fix the following gcc warning: drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_powertune.c:710:46: warning: ‘PSMGCEDCThresholdConfig_vega10’ defined but not used [-Wunused-const-variable=] static const struct vega10_didt_config_reg PSMGCEDCThresholdConfig_vega10[] = ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_powertune.c:654:46: warning: ‘PSMSEEDCThresholdConfig_Vega10’ defined but not used [-Wunused-const-variable=] static const struct vega10_didt_config_reg PSMSEEDCThresholdConfig_Vega10[] = ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Reported-by: Hulk Robot <[email protected]> Signed-off-by: Jason Yan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu: fix race between pstate and remote buffer mapJonathan Kim6-53/+49
Vega20 arbitrates pstate at hive level and not device level. Last peer to remote buffer unmap could drop P-State while another process is still remote buffer mapped. With this fix, P-States still needs to be disabled for now as SMU bug was discovered on synchronous P2P transfers. This should be fixed in the next FW update. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu/display: give aux i2c buses more meaningful namesAlex Deucher3-4/+9
Mirror what we do for i2c display buses. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu/display: fix aux registration (v2)Alex Deucher2-5/+14
We were registering the aux device in the MST late_register rather than the regular one. v2: handle eDP as well Fixes: 405a1f9090d1ac ("drm/amdgpu/display: split dp connector registration (v4)") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1100 Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Harry Wentland <[email protected]>
2020-04-22drm/amdgpu: Correctly initialize thermal controller for GPUs with Powerplay ↵Sandeep Raghuraman1-0/+26
table v0 (e.g Hawaii) Initialize thermal controller fields in the PowerPlay table for Hawaii GPUs, so that fan speeds are reported. Signed-off-by: Sandeep Raghuraman <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22Revert "drm/amdgpu: Disable gfx off if VCN is busy"James Zhu1-2/+0
This reverts commit 3fded222f4bf7f4c56ef4854872a39a4de08f7a8 This is work around for vcn1 only. Currently vcn1 has separate begin_use and idle work handle. Signed-off-by: James Zhu <[email protected]> Tested-by: changzhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu: fix kernel page fault issue by ras recovery on sGPUGuchun Chen1-2/+3
When running ras uncorrectable error injection and triggering GPU reset on sGPU, below issue is observed. It's caused by the list uninitialized when accessing. [ 80.047227] BUG: unable to handle page fault for address: ffffffffc0f4f750 [ 80.047300] #PF: supervisor write access in kernel mode [ 80.047351] #PF: error_code(0x0003) - permissions violation [ 80.047404] PGD 12c20e067 P4D 12c20e067 PUD 12c210067 PMD 41c4ee067 PTE 404316061 [ 80.047477] Oops: 0003 [#1] SMP PTI [ 80.047516] CPU: 7 PID: 377 Comm: kworker/7:2 Tainted: G OE 5.4.0-rc7-guchchen #1 [ 80.047594] Hardware name: System manufacturer System Product Name/TUF Z370-PLUS GAMING II, BIOS 0411 09/21/2018 [ 80.047888] Workqueue: events amdgpu_ras_do_recovery [amdgpu] Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu: Disable FRU read on ArcturusKent Russell1-3/+4
Update the list with supported Arcturus chips, but disable for now until final list is confirmed. Ideally we can poll atombios for FRU support, instead of maintaining this list of chips, but this will enable serial number reading for supported ASICs for the time-being. Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/powerplay: fix resume failed as smu table initialize early exitPrike Liang1-1/+6
When the amdgpu in the suspend/resume loop need notify the dpm disabled, otherwise the smu table will be uninitialize and result in resume failed. Signed-off-by: Prike Liang <[email protected]> Tested-by: Mengbing Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu/gmc: Fix spelling mistake.Rajneesh Bhardwaj1-6/+6
Fixes a minor typo in the file. Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rajneesh Bhardwaj <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu: cache smu fw version infoJohn Clements5-12/+29
reduce cmd submission to smu by caching version info Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22Revert "drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2"Kent Russell1-26/+0
This reverts commit c12b84d6e0d70f1185e6daddfd12afb671791b6e. The original patch causes a RAS event and subsequent kernel hard-hang when running the KFDMemoryTest.PtraceAccessInvisibleVram on VG20 and Arcturus dmesg output at hang time: [drm] RAS event of type ERREVENT_ATHUB_INTERRUPT detected! amdgpu 0000:67:00.0: GPU reset begin! Evicting PASID 0x8000 queues Started evicting pasid 0x8000 qcm fence wait loop timeout expired The cp might be in an unrecoverable state due to an unsuccessful queues preemption Failed to evict process queues Failed to suspend process 0x8000 Finished evicting pasid 0x8000 Started restoring pasid 0x8000 Finished restoring pasid 0x8000 [drm] UVD VCPU state may lost due to RAS ERREVENT_ATHUB_INTERRUPT amdgpu: [powerplay] Failed to send message 0x26, response 0x0 amdgpu: [powerplay] Failed to set soft min gfxclk ! amdgpu: [powerplay] Failed to upload DPM Bootup Levels! amdgpu: [powerplay] Failed to send message 0x7, response 0x0 amdgpu: [powerplay] [DisableAllSMUFeatures] Failed to disable all smu features! amdgpu: [powerplay] [DisableDpmTasks] Failed to disable all smu features! amdgpu: [powerplay] [PowerOffAsic] Failed to disable DPM! [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <powerplay> failed -5 Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu/gfx9: add gfxoff quirkAlex Deucher1-0/+2
Fix screen corruption with firefox. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=207171 Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu: set mp1 state before reloadJohn Clements2-7/+10
Set MP1 state to prepare for unload before reloading SMU FW Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu: update psp fw loading sequenceJohn Clements1-49/+77
Added dedicated function to check if particular fw should be skipped from loading. Added dedicated function for SMU FW loading via PSP Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/powerplay: update Arcturus smu-driver if headerEvan Quan2-3/+14
To fit the latest PMFW. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/powerplay: properly set the dpm_enabled stateEvan Quan5-66/+216
On the ASIC powered down(in baco or system suspend), the dpm_enabled will be set as false. Then all access (e.g. df state setting issued on RAS error event) to SMU will be blocked. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/powerplay: correct i2c eeprom init/fini sequenceEvan Quan3-15/+17
As data transfer may starts immediately after i2c eeprom init completed. Thus i2c eeprom should be initialized after SMU ready. And i2c data transfer should be prohibited when SMU down. That is the i2c eeprom fini sequence needs to be updated also. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/powerplay: bump the NAVI10 smu-driver if versionEvan Quan1-1/+1
To fit the latest SMC firmware 42.53 and eliminate the warning on driver loading. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/powerplay: revise the way to retrieve the board parametersEvan Quan2-71/+130
It can support different NV1x ASIC better. And this can guard no member got missing. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amdgpu: fix the hw hang during perform system reboot and resetPrike Liang1-0/+2
The system reboot failed as some IP blocks enter power gate before perform hw resource destory. Meanwhile use unify interface to set device CGPG to ungate state can simplify the amdgpu poweroff or reset ungate guard. Fixes: 487eca11a321ef ("drm/amdgpu: fix gfx hang during suspend with video playback (v2)") Signed-off-by: Prike Liang <[email protected]> Tested-by: Mengbing Wang <[email protected]> Tested-by: Paul Menzel <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-22drm/amd/display: remove redundant assignment to variable dp_ref_clk_khzColin Ian King1-1/+1
The variable dp_ref_clk_khz is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/radeon: remove defined but not used variables in ci_dpm.cJason Yan1-14/+0
Fix the following gcc warning: drivers/gpu/drm/radeon/ci_dpm.c:82:36: warning: ‘defaults_saturn_pro’ defined but not used [-Wunused-const-variable=] static const struct ci_pt_defaults defaults_saturn_pro = ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/radeon/ci_dpm.c:68:36: warning: ‘defaults_bonaire_pro’ defined but not used [-Wunused-const-variable=] static const struct ci_pt_defaults defaults_bonaire_pro = ^~~~~~~~~~~~~~~~~~~~ Reported-by: Hulk Robot <[email protected]> Signed-off-by: Jason Yan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/radeon: remove defined but not used 'dte_data_tahiti_le'Jason Yan1-18/+0
Fix the following gcc warning: drivers/gpu/drm/radeon/si_dpm.c:255:33: warning: ‘dte_data_tahiti_le’ defined but not used [-Wunused-const-variable=] static const struct si_dte_data dte_data_tahiti_le = Reported-by: Hulk Robot <[email protected]> Signed-off-by: Jason Yan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amdgpu: remove dead code in si_dpm.cJason Yan1-20/+0
This code is dead, let's remove it. Reported-by: Hulk Robot <[email protected]> Signed-off-by: Jason Yan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amd/amdgpu: remove hardcoded module name in printsAurabindo Pillai6-9/+9
Let format prefixes take care of printing the module name through pr_fmt and dev_fmt definitions. Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amd/amdgpu: add print prefix for dev_* variantsAurabindo Pillai1-0/+6
Define dev_fmt macro for informative print messages Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amd/amdgpu: add prefix for pr_* printsAurabindo Pillai1-0/+6
amdgpu uses lots of pr_* calls for printing error messages. With this prefix, errors shall be more obvious to the end use regarding its origin, and may help debugging. Prefix format: [xxx.xxxxx] amdgpu: ... Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amd/display: code clean up in dce80_hw_sequencer.cJason Yan1-28/+0
Fix the following gcc warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_hw_sequencer.c:43:46: warning: ‘reg_offsets’ defined but not used [-Wunused-const-variable=] static const struct dce80_hw_seq_reg_offsets reg_offsets[] = { ^~~~~~~~~~~ Reported-by: Hulk Robot <[email protected]> Signed-off-by: Jason Yan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amdgpu/ring: simplify scheduler setup logicAlex Deucher1-3/+1
Set up a GPU scheduler based on the ring flag rather than the ring type. Reviewed-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amdgpu/kiq: add no_scheduler flag to KIQAlex Deucher1-0/+1
We don't want a GPU scheduler for this ring. Reviewed-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amdgpu/ring: add no_scheduler flagAlex Deucher2-1/+3
This allows IPs to flag whether a specific ring requires a GPU scheduler or not. E.g., sometimes instances of an IP are asymmetric and have different capabilities. Reviewed-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-04-13drm/amdgpu/powerplay: get SMC FW size to a flexible wayLikun Gao2-2/+3
Get SMC fw size before backdoor loading instead of giving an certain value, as it may different for different ASIC. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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