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2016-09-10ARM: sun8i: a23/a33: Add RGB666 pinsMaxime Ripard1-0/+10
The LCD output needs to be muxed. Add the proper pinctrl node. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10ARM: sun8i: a33: Add display pipelineMaxime Ripard1-0/+152
Add all the needed blocks to the A33 DTSI. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10ARM: sun8i: Convert the A23 and A33 to the CCUMaxime Ripard3-306/+75
Now that we have support for the CCU driver in sunxi-ng, convert the A23 and A33 DTs to that driver. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10ARM: dts: sun6i: switch A31/A31s to new CCU clock bindingsChen-Yu Tsai1-327/+97
Now that we have a different clock representation, switch to it. Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2016-09-10Merge branch 'sunxi/clk-for-4.9' into sunxi/dt-for-4.9Maxime Ripard24-79/+3860
2016-09-10clk: sunxi-ng: Add hardware dependencyJean Delvare1-0/+1
The sunxi-ng clock driver is useless for other architectures. Signed-off-by: Jean Delvare <[email protected]> Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2016-09-10clk: sunxi-ng: Add A23 CCUMaxime Ripard4-0/+751
Add support for the clock unit found in the A23. Due to the similarities with the A33, it also shares its clock IDs to allow sharing the DTSI. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10clk: sunxi-ng: Add A33 CCU supportMaxime Ripard7-0/+1071
This commit introduces the clocks found in the Allwinner A33 CCU. Since this SoC is very similar to the A23, and we share a significant share of the DTSI, the clock IDs that are going to be used will also be shared with the A23, hence the name of the various header files. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10clk: sunxi-ng: Add N-class clocks supportMaxime Ripard4-0/+173
Add support for the class with a single factor, N, being a multiplier. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10clk: sunxi-ng: mux: Add mux table macroMaxime Ripard1-13/+13
Add a new macro to declare muxes based on a table and a gate. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard5-33/+55
Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-10clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structureMaxime Ripard1-0/+14
The internal _ccu_div structure is meant to be embedded into other structures to combine the various dividers and to form the clock classes support. Start to document those structures by using kerneldoc. Signed-off-by: Maxime Ripard <[email protected]>
2016-09-10clk: sunxi-ng: div: Add mux table macrosMaxime Ripard1-7/+21
Add some macros to ease the declaration of clocks that are using them. Signed-off-by: Maxime Ripard <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]>
2016-09-08arm64: dts: r8a7796: Add GPIO device nodesTakeshi Kihara1-0/+112
Add GPIO device nodes to the DT of the r8a7796 SoC. Signed-off-by: Takeshi Kihara <[email protected]> Signed-off-by: Simon Horman <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Tested-by: Laurent Pinchart <[email protected]>
2016-09-08arm64: dts: r8a7796: salvator-x: add serial console pinsUlrich Hecht1-0/+16
Adds pin control for SCIF2. Signed-off-by: Ulrich Hecht <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: r8a7796: Add pinctrl device nodeTakeshi Kihara1-0/+5
This patch adds pinctrl device node for R8A7796 SoC. Signed-off-by: Takeshi Kihara <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB outputLaurent Pinchart1-0/+7
Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: h3ulcb: enable GPIO ledsVladimir Barinov1-0/+11
This supports GPIO leds on H3ULCB board Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: h3ulcb: Sound SSI supportVladimir Barinov1-0/+118
This supports SSI sound for H3ULCB board. SSI DMA mode used. CS2000 used as AUDIO_CLK_B. Signed-off-by: Vladimir Barinov <[email protected]> Acked-by: Kuninori Morimoto <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: h3ulcb: enable SDHI0Vladimir Barinov1-0/+49
This supports SDHI0 on H3ULCB board SD card slot Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: h3ulcb: enable GPIO keysVladimir Barinov1-0/+13
This supports GPIO keys on H3ULCB board Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed propertySimon Horman1-2/+0
Remove cap-mmc-highspeed property from SDHI2 and SDHI3. This property is unnecessary as the driver automatically sets the highspeed capability. Furthermore its use is inconsistent with SDHI0 and SDHI1 which are also highspeed capable but do not have this property present. Found by inspection. Signed-off-by: Simon Horman <[email protected]>
2016-09-08arm64: dts: h3ulcb: enable USB2.0 Host channel 1Vladimir Barinov1-0/+8
This supports USB2.0 Host channel 1 on H3ULCB board Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-07net: stmmac: update the module description of the dwmac-meson driverMartin Blumenstingl1-2/+2
The dwmac-meson glue driver supports Meson6 and Meson8 SoCs. Newer SoCs are supported by the dwmac-meson8b driver. Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-09-07net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMACMartin Blumenstingl3-4/+328
The Ethernet controller available in Meson8b and GXBB SoCs is a Synopsys DesignWare MAC IP core which is already supported by the stmmac driver. In addition to the standard stmmac driver some Meson8b / GXBB specific registers have to be configured for the PHY clocks. These SoC specific registers are called PRG_ETHERNET_ADDR0 and PRG_ETHERNET_ADDR1 in the datasheet. These registers are not backwards compatible with those on Meson 6b, which is why a new glue driver is introduced. This worked for many boards because the bootloader programs the PRG_ETHERNET registers correctly. Additionally the meson6-dwmac driver only sets bit 1 of PRG_ETHERNET_ADDR0 which (according to the datasheet) is only used during reset. Currently all configuration values can be determined automatically, based on the configured phy-mode (which is mandatory for the stmmac driver). If required the tx-delay and the mux clock (so it supports the MPLL2 clock as well) can be made configurable in the future. Signed-off-by: Martin Blumenstingl <[email protected]> Tested-by: Kevin Hilman <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-09-07stmmac: introduce get_stmmac_bsp_priv() helperJoachim Eastwood1-0/+8
Create a helper to retrieve dwmac private data from a dev pointer. This is useful in PM callbacks and driver remove. Signed-off-by: Joachim Eastwood <[email protected]> Tested-by: Martin Blumenstingl <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-09-07net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindingsMartin Blumenstingl1-8/+37
This patch adds the documentation for the DWMAC ethernet controller found in Amlogic Meson 8b (S805) and GXBB (S905) SoCs. The main difference between the Meson6 glue is that different registers (with different layout) are used. Signed-off-by: Martin Blumenstingl <[email protected]> Acked-by: Rob Herring <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-09-06arm64: dts: h3ulcb: enable USB2 PHY of channel 1Vladimir Barinov1-0/+12
This supports USB2 PHY channel #1 on H3ULCB board Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: h3ulcb: enable WDTVladimir Barinov1-0/+5
This supports watchdog timer for H3ULCB board Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: h3ulcb: enable EXTALR clkVladimir Barinov1-0/+4
This enables EXTALR clock that can be used for the watchdog. Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: h3ulcb: enable I2C2Vladimir Barinov1-0/+12
This supports I2C2 bus on H3ULCB board Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: h3ulcb: enable EthernetAVBVladimir Barinov1-0/+32
This supports Ethernet AVB on H3ULCB board Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: h3ulcb: enable SCIF clk and pinsVladimir Barinov1-0/+13
This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: h3ulcb: initial device treeVladimir Barinov2-1/+52
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost board. This commit supports the following peripherals: - SCIF (console) Signed-off-by: Vladimir Barinov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: h3ulcb: add H3ULCB board DT bindingsVladimir Barinov1-0/+2
Add H3ULCB Device tree bindings Documentation, listing it as a supported board. Signed-off-by: Vladimir Barinov <[email protected]> Acked-by: Rob Herring <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodesGeert Uytterhoeven1-2/+4
The audio-dmac nodes used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: renesas: salvator-x: Enable DULaurent Pinchart1-0/+44
Only the VGA output is supported for now. Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: renesas: r8a7795: Add DU device to DTLaurent Pinchart1-0/+46
Add the DU device to r8a7795.dtsi in a disabled state. Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: renesas: r8a7795: Add VSP instancesLaurent Pinchart1-0/+90
The r8a7795 has 9 VSP instances. Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: renesas: r8a7795: Add FCPV nodesLaurent Pinchart1-0/+63
The FCPs handle the interface between various IP cores and memory. Add the instances related to the VSP2s. Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: salvator-x: enable HSUSBYoshihiro Shimoda1-0/+4
Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0Yoshihiro Shimoda1-0/+8
We have to set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0Yoshihiro Shimoda1-0/+24
This patch also adds a regulator node for USB2.0 to handle VBUS on/off by the phy-rcar-gen3-usb2 driver. Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: Add HSUSB device nodeYoshihiro Shimoda1-0/+17
Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: set maximum frequency for SDHI clocksWolfram Sang1-0/+4
Define the upper limit otherwise the driver cannot utilize max speeds. Signed-off-by: Wolfram Sang <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: add FDP1 device nodesKieran Bingham1-0/+27
Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Kieran Bingham <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06arm64: dts: r8a7795: add FCPF device nodesKieran Bingham1-0/+21
Provide nodes for the FCP devices dedicated to the FDP device channels. Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Kieran Bingham <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-09-06devicetree: Add vendor prefix for FriendlyARMJames Pettigrew1-0/+1
Guangzhou FriendlyARM Computer Tech Co., Ltd is a Chinese ARM board vendor. Signed-off-by: James Pettigrew <[email protected]> Reviewed-by: Rask Ingemann Lambertsen <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2016-09-06ARM: dts: sun8i: Add dts file for the NanoPi NEO SBCJames Pettigrew2-0/+126
The NanoPi NEO is a minimal H3 based SBC. It comes with 256/512M RAM, a micro SD slot, 10/100Mbit ethernet and a single USB-A port. Signed-off-by: James Pettigrew <[email protected]> Reviewed-by: Rask Ingemann Lambertsen <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2016-09-05ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllersHans de Goede1-0/+49
Most of the sun8i q8 boards have an SDIO wifi controller, on the variants which use an USB wifi controller, this will result in a couple of error msg-s in dmesg when proving the sdio bus and an used mmc controller. The best way to deal with wifi on this boards really is to simply let the kernel auto-detect usb or sdio wifi controllers, so we will just have to live with the few errors in dmesg. This has been tested on a23 based q8 tablets with ESP8089, RTL8703AS and RTL8189FTV wifi controllers. Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
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