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2014-09-15drm/nva3/clk: Set intermediate core clock on reclockingRoy Spliet3-14/+51
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: For PLL clocks always make sure the PLL is not in useRoy Spliet1-0/+9
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: Abort when PLL doesn't lockRoy Spliet1-1/+5
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: HOST clockRoy Spliet2-8/+78
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: Set PLL refclkRoy Spliet3-29/+48
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nva3/clk: Parse clock control registers more accuratelyRoy Spliet1-4/+28
Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau: Fix duplicate definition of NV04_PFB_BOOT_0_*Pierre Moreau3-32/+24
Signed-off-by: Pierre Moreau <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau: Display Nouveau boot options at launchPierre Moreau9-6/+37
It can help to remove any ambiguity about which options were passed to Nouveau, especially in case the user had some options set in /etc/modprobe.d/*.conf that he forgot about, as they won't appear in a dmesg. Signed-off-by: Pierre Moreau <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: wait for scrubbers to finish before uploading new ucodeBen Skeggs1-3/+2
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr/fuc: make $r1-$r10 registers callee-saved in kernel.fucMartin Peres5-736/+749
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr/fuc: add ld/st macrosMartin Peres1-0/+10
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: add helpers for delay-to-ticks and ticks-to-delayMartin Peres9-2284/+2446
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: add some arith functions (mul32_32_64, subu64 and addu64)Martin Peres10-1735/+1919
Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/pwr: fix the timers implementation with concurent processesMartin Peres5-990/+1133
The problem with the current implementation is that adding a timer improperly checked which process would time up first by not taking into account how much time elapsed since their timer got scheduled. Rework the re-scheduling decision t fix this. The catch with this fix is that we are limited to scheduling timers of up to 2^31 ticks to avoid any potential overflow. Since we are unlikely to need to wait for more than a second, this won't be a problem :) Another possible fix would be to decrement the timeouts of all processes but it would duplicate a lot of code and dealing with edge cases wasn't pretty last time I checked. Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/ppwr: enable ppwr on gm107Martin Peres2-1/+5
For some reason, it is now required to wait a 20 µs after the 0x200 reset of the engine. Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gm107/therm: add PWM fan support v2Martin Peres7-6/+106
v2: change the copyright ownership from "Nouveau Community" to myself, as per Illia's recommendation. Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/therm/fan: do not use the pwm mode when the vbios tells us to ↵Martin Peres1-1/+7
use toggle Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/bios/fan: add support for maxwell's fan management table v2Martin Peres4-1/+111
Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) v2: - Do not memset the table to 0 as it erases the pre-set default values Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/ltc: allocate tagram from memory that spans all partitionsBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: allow allocation to be confined to a specific slice of heapBen Skeggs16-26/+38
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: fill in holes with "allocated" nodesBen Skeggs2-6/+21
The allocation algorithm doesn't expect there to be holes in the mm, which causes its alignment/cutoff calculations to choke (and go negative) when encountering the last chunk of a block before a hole. The least expensive solution is to simply fill in any holes with nodes that are pre-marked as being allocated. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: dump mm when trying to tear one down that still has ↵Ben Skeggs1-9/+32
allocations Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: modify test for if building a mm with holes in itBen Skeggs2-2/+4
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core/mm: make it clearer what (type == 0) meansBen Skeggs2-9/+10
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/gf100/ltc: translate interrupt status into more meaningful namesBen Skeggs2-5/+29
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/ltc: drop workaround for an interrupt storm that no longer happensBen Skeggs2-10/+0
This is really the wrong thing to do, but at the time it was our only option to prevent worse issues. We no longer cause quite so much anger from LTC, so it's not needed. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nv50-/disp: add support for completion eventsBen Skeggs11-11/+173
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/core: pass related object into notify constructorBen Skeggs18-28/+42
The event source types/index might need to be derived from it. Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15drm/nouveau/bar: ioremap only the areas that we're actually usingBen Skeggs2-20/+19
Signed-off-by: Ben Skeggs <[email protected]>
2014-09-15Merge tag 'topic/core-stuff-2014-09-15' of ↵Dave Airlie7-75/+107
git://anongit.freedesktop.org/drm-intel into drm-next Here's the updated topic/core-stuff pull request with the two patches already merged into drm-fixes dropped. * tag 'topic/core-stuff-2014-09-15' of git://anongit.freedesktop.org/drm-intel: drm: Drop modeset locking from crtc init function drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modes drm/edid: Reduce horizontal timings for pixel replicated modes drm: Include task->name and master status in debugfs clients info drm/gem: Fix kerneldoc typo drm: use c99 initializers in structures drm: fix drm_modeset_lock.h kernel-doc notation
2014-09-15drm: Drop modeset locking from crtc init functionDaniel Vetter1-5/+0
At driver init no one can access modeset objects and we're single-threaded. So locking is just cargo-culting here. Worse, with the new ww mutexes and ww mutex slowpath debugging the mutex_lock might actually fail, and we don't have the full-blown ww recovery dance. Which then leads to fireworks when we try to unlock the not-locked crtc lock. An audit of all the functions called from here shows that none of them contain locking checks, so there's also no reason to keep the locking around just for consistency of caller contexts. Besides that I have the rule (at least in i915) that such places where we take locks just to simplify locking checks and not for correctness always require a comment. This regression was introduced in commit 51fd371bbaf94018a1223b4e2cf20b9880fd92d4 Author: Rob Clark <[email protected]> Date: Tue Nov 19 12:10:12 2013 -0500 drm: convert crtc and connection_mutex to ww_mutex (v5) v2: Don't drop the lock_init call, spotted by the 0day builder. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=83341 Cc: Rob Clark <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Daniel Vetter <[email protected]>
2014-09-15drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modesClint Taylor1-3/+12
Enable 2x pixel replication for modes the mode flag DBLCLK to double horizontal timings and pixel clock across TMDS. Signed-off-by: Clint Taylor <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-09-15drm/edid: Reduce horizontal timings for pixel replicated modesClint Taylor1-48/+48
Pixel replicated modes should be non-2x horizontal timings and pixel replicated by the HW across the HDMI cable at 2X pixel clock. Current horizontal resolution of 1440 does not allow pixel duplication to occur and scaling artifacts occur on the TV. HDMI certification 7-26 currently fails for all pixel replicated modes. This change will allow HDMI certification with 480i/576i modes once pixel replication is turned on. Signed-off-by: Clint Taylor <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-09-15drm: Include task->name and master status in debugfs clients infoChris Wilson1-5/+22
Showing who is the current master is useful for trying to decypher errors when trying to acquire master (e.g. a race with X taking over from plymouth). By including the process name as well as the pid simplifies the task of grabbing enough information remotely at the point of error. v2: Add the command column header and flesh out a couple of comments. (David Herrmann) Signed-off-by: Chris Wilson <[email protected]> Cc: David Herrmann <[email protected]> Reviewed-by: David Herrmann <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-09-15drm/gem: Fix kerneldoc typoLaurent Pinchart1-1/+1
The drm_gem_private_object_init function is called drm_gem_object_init in its kerneldoc. Fix it. Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2014-09-15drm/ast: Cleanup analog init code pathBenjamin Herrenschmidt1-18/+31
Move the MMIO mangling to a separate routine and actually disable the DVO output when using pure analog. Signed-off-by: Benjamin Herrenschmidt <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2014-09-15drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chipsBenjamin Herrenschmidt1-4/+10
It looks like the AST2400 comes up with the DVO enable bit set, which causes us to incorrectly assume we have a SIL164 regardless of the value of the scratch registers setup by the BMC firmware. So let's limit that test to the case where the chip has already been setup by a BIOS. Signed-off-by: Benjamin Herrenschmidt <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2014-09-15drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx()Benjamin Herrenschmidt1-0/+11
If the P2A has been used to target other SOC registers before that call, we're going to hit the wrong place so make sure we set the base address up properly before using it. (P2A stands for PCIe to AHB bridge and is the bride that allows accessing the AST's internal AHB bus using a relocatable 64k window in the second half of the PCIe MMIO BAR) Signed-off-by: Benjamin Herrenschmidt <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2014-09-15drm/ast: POST chip at probe time if VGA not enabledBenjamin Herrenschmidt3-11/+62
We need to do it on machines without a BIOS such as POWER8. Also for detection to work without triggering PCIe errors, we need to enable VGA early on, inside ast_detect_chip(). While touching those files, replace a few hard coded register numbers with the corresponding symbolic constant. Signed-off-by: Benjamin Herrenschmidt <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2014-09-15drm/ast: Try to use MMIO registers when PIO isn't supportedBenjamin Herrenschmidt2-4/+21
If the PIO resources haven't been assigned, then we have no choice but try to use the MMIO version. This is the case for example on POWER8 which doesn't support PIO at all. Chips rev 0x20 or later have MMIO decoding enabled by default. Signed-off-by: Benjamin Herrenschmidt <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2014-09-14Linux 3.17-rc5Linus Torvalds1-1/+1
2014-09-14Merge branch 'for-linus' of ↵Linus Torvalds3-23/+39
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull vfs fixes from Al Viro: "double iput() on failure exit in lustre, racy removal of spliced dentries from ->s_anon in __d_materialise_dentry() plus a bunch of assorted RCU pathwalk fixes" The RCU pathwalk fixes end up fixing a couple of cases where we incorrectly dropped out of RCU walking, due to incorrect initialization and testing of the sequence locks in some corner cases. Since dropping out of RCU walk mode forces the slow locked accesses, those corner cases slowed down quite dramatically. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: be careful with nd->inode in path_init() and follow_dotdot_rcu() don't bugger nd->seq on set_root_rcu() from follow_dotdot_rcu() fix bogus read_seqretry() checks introduced in b37199e move the call of __d_drop(anon) into __d_materialise_unique(dentry, anon) [fix] lustre: d_make_root() does iput() on dentry allocation failure
2014-09-14vfs: avoid non-forwarding large load after small store in path lookupLinus Torvalds2-9/+11
The performance regression that Josef Bacik reported in the pathname lookup (see commit 99d263d4c5b2 "vfs: fix bad hashing of dentries") made me look at performance stability of the dcache code, just to verify that the problem was actually fixed. That turned up a few other problems in this area. There are a few cases where we exit RCU lookup mode and go to the slow serializing case when we shouldn't, Al has fixed those and they'll come in with the next VFS pull. But my performance verification also shows that link_path_walk() turns out to have a very unfortunate 32-bit store of the length and hash of the name we look up, followed by a 64-bit read of the combined hash_len field. That screws up the processor store to load forwarding, causing an unnecessary hickup in this critical routine. It's caused by the ugly calling convention for the "hash_name()" function, and easily fixed by just making hash_name() fill in the whole 'struct qstr' rather than passing it a pointer to just the hash value. With that, the profile for this function looks much smoother. Signed-off-by: Linus Torvalds <[email protected]>
2014-09-14Merge branch 'parisc-3.17-1' of ↵Linus Torvalds9-8/+280
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc updates from Helge Deller: "The most important patch is a new Light Weigth Syscall (LWS) for 8, 16, 32 and 64 bit atomic CAS operations which is required in order to be able to implement the atomic gcc builtins on our platform. Other than that, we wire up the seccomp, getrandom and memfd_create syscalls, fixes a minor off-by-one bug and a wrong printk string" * 'parisc-3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Implement new LWS CAS supporting 64 bit operations. parisc: Wire up seccomp, getrandom and memfd_create syscalls parisc: dino: fix %d confusingly prefixed with 0x in format string parisc: sys_hpux: NUL terminator is one past the end
2014-09-14be careful with nd->inode in path_init() and follow_dotdot_rcu()Al Viro1-2/+13
in the former we simply check if dentry is still valid after picking its ->d_inode; in the latter we fetch ->d_inode in the same places where we fetch dentry and its ->d_seq, under the same checks. Cc: [email protected] # 2.6.38+ Signed-off-by: Al Viro <[email protected]>
2014-09-14don't bugger nd->seq on set_root_rcu() from follow_dotdot_rcu()Al Viro1-16/+17
return the value instead, and have path_init() do the assignment. Broken by "vfs: Fix absolute RCU path walk failures due to uninitialized seq number", which was Cc-stable with 2.6.38+ as destination. This one should go where it went. To avoid dummy value returned in case when root is already set (it would do no harm, actually, since the only caller that doesn't ignore the return value is guaranteed to have nd->root *not* set, but it's more obvious that way), lift the check into callers. And do the same to set_root(), to keep them in sync. Cc: [email protected] # 2.6.38+ Signed-off-by: Al Viro <[email protected]>
2014-09-14Merge tag 'ntb-3.17' of git://github.com/jonmason/ntbLinus Torvalds2-3/+17
Pull ntb driver bugfixes from Jon Mason: "NTB driver fixes for queue spread and buffer alignment. Also, update to MAINTAINERS to reflect new e-mail address" * tag 'ntb-3.17' of git://github.com/jonmason/ntb: ntb: Add alignment check to meet hardware requirement MAINTAINERS: update NTB info NTB: correct the spread of queues over mw's
2014-09-14Merge branch 'irq-urgent-for-linus' of ↵Linus Torvalds4-22/+23
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull ARM irq chip fixes from Thomas Gleixner: "Another pile of ARM specific irq chip fixlets: - off by one bugs in the crossbar driver - missing annotations - a bunch of "make it compile" updates I pulled the lot today from Jason, but it has been in -next for at least a week" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip: gic-v3: Declare rdist as __percpu pointer to __iomem pointer irqchip: gic: Make gic_default_routable_irq_domain_ops static irqchip: exynos-combiner: Fix compilation error on ARM64 irqchip: crossbar: Off by one bugs in init irqchip: gic-v3: Tag all low level accessors __maybe_unused irqchip: gic-v3: Only define gic_peek_irq() when building SMP
2014-09-14Merge tag 'irqchip-urgent-3.17' of ↵Thomas Gleixner4-22/+23
git://git.infradead.org/users/jcooper/linux into irq/urgent irqchip fixes for v3.17 from Jason Cooper - GIC/GICV3: Various fixlets - crossbar: Fix off-by-one bug - exynos-combiner: Fix arm64 build error
2014-09-14ntb: Add alignment check to meet hardware requirementDave Jiang1-0/+13
The NTB translate register must have the value to be BAR size aligned. This alignment check make sure that the DMA memory allocated has the proper alignment. Another requirement for NTB to function properly with memory window BAR size greater or equal to 4M is to use the CMA feature in 3.16 kernel with the appropriate CONFIG_CMA_ALIGNMENT and CONFIG_CMA_SIZE_MBYTES set. Signed-off-by: Dave Jiang <[email protected]> Signed-off-by: Jon Mason <[email protected]>
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