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2020-03-31Merge tag 'gvt-next-fixes-2020-03-31' of https://github.com/intel/gvt-linux ↵Rodrigo Vivi4-19/+15
into drm-intel-next-fixes gvt-next-fixes-2020-03-31 - Fix non-privilege access warning (Tina) - Fix display port type (Tina) - BDW cmd parser missed SWTESS_BASE_ADDRESS (Yan) - Bypass length check of LRI (Yan) - Fix one klocwork warning (Tina) Signed-off-by: Rodrigo Vivi <[email protected]> From: Zhenyu Wang <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-27drm/i915/gvt: Fix klocwork issues about data sizeTina Zhang1-2/+2
Add llu suffix and cast operator to fix the klocwork warning about "Operands in a bitwise operation have different size" Signed-off-by: Tina Zhang <[email protected]> Acked-by: Zhenyu Wang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-26drm/i915/display: Fix mode private_flags comparison at atomic_checkUma Shankar1-2/+2
This patch fixes the private_flags of mode to be checked and compared against uapi.mode and not from hw.mode. This helps properly trigger modeset at boot if desired by driver. It helps resolve audio_codec initialization issues if display is connected at boot. Initial discussion on this issue has happened on below thread: https://patchwork.freedesktop.org/series/74828/ v2: No functional change. Fixed the Closes tag and added Maarten's RB. v3: Added Fixes tag. Cc: Ville Syrjä <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Kai Vehmanen <[email protected]> Cc: Souza, Jose <[email protected]> Fixes: 58d124ea2739 ("drm/i915: Complete crtc hw/uapi split, v6.") Closes: https://gitlab.freedesktop.org/drm/intel/issues/1363 Suggested-by: Ville Syrjä <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Signed-off-by: SweeAun Khor <[email protected]> Reviewed-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit d5e56705927e00f703b2eb5a98299dd6622d16e5) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-26drm/i915/gt: Stage the transfer of the virtual breadcrumbChris Wilson1-5/+15
We move the virtual breadcrumb from one physical engine to the next, if the next virtual request is scheduled on a new physical engine. Since the virtual context can only be in one signal queue, we need it to track the current physical engine for the new breadcrumbs. However, to move the list we need both breadcrumb locks -- and since we cannot take both at the same time (unless we are careful and always ensure consistent ordering) stage the movement of the signaler via the current virtual request. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1510 Fixes: 6d06779e8672 ("drm/i915: Load balancing across a virtual engine") Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 6c81e21a4742385c00713137c6fdcade0412e93c) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-26drm/i915/gt: Select the deepest available parking mode for rc6Chris Wilson2-5/+28
On Ivybridge, we can go lower than rc6 to rc6p. And this is required for Ivybridge to hit the same minimum power consumption as rc6 on other platforms, so make it so. v2: Update selftest to include all rc6 residency counters Note that Andi did mention that we should be converting the magic numbers into opaque magic macros, so if they ever get reused (unlikely given only Ivybridge used the extra modes) we'll need to pay back the technical debt. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1518 Fixes: 730eaeb52426 ("drm/i915/gt: Manual rc6 entry upon parking") Testcase: igt/i915_pm_rc6_residency/rc6-idle Signed-off-by: Chris Wilson <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Imre Deak <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 13c5a577b342d80ea06b7300ce69420a2d0928ca) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-26drm/i915: Avoid live-lock with i915_vma_parked()Chris Wilson1-15/+14
Abuse^W Take advantage that we know we are inside the GT wakeref and that prevents any client execbuf from reopening the i915_vma in order to claim all the vma to close without having to drop the spinlock to free each one individually. By keeping the spinlock, we do not have to restart if we run concurrently with i915_gem_free_objects -- which causes them both to restart continually and make very very slow progress. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1361 Fixes: 77853186e547 ("drm/i915: Claim vma while under closed_lock in i915_vma_parked()") Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 3447c4c55d0edc95742fdcd91c3efb050546b907) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-26drm/i915/gt: Treat idling as a RPS downclock eventChris Wilson1-0/+13
If we park/unpark faster than we can respond to RPS events, we never will process a downclock event after expiring a waitboost, and thus we will forever restart the GPU at max clocks even if the workload switches and doesn't justify full power. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1500 Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management") Signed-off-by: Chris Wilson <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Lyude Paul <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Cc: <[email protected]> # v5.5+ (cherry picked from commit 21abf0bf168dffff1192e0f072af1dc74ae1ff0e) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-26drm/i915/gt: Cancel a hung context if already closedChris Wilson1-0/+5
Use the restored ability to check if a context is closed to decide whether or not to immediately ban the context from further execution after a hang. Fixes: be90e344836a ("drm/i915/gt: Cancel banned contexts after GT reset") Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 8e37d699139128139c0468e005c2f0d6215b0c55) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-26drm/i915: Use explicit flag to mark unreachable intel_contextChris Wilson5-6/+14
I need to keep the GEM context around a bit longer so adding an explicit flag for syncing execbuf with closed/abandonded contexts. v2: * Use already available context flags. (Chris) Signed-off-by: Tvrtko Ursulin <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 207e4a71fb53e761be72daaeb78a49225bc31c69) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-20drm/i915/perf: Invalidate OA TLB on when closing perf streamUmesh Nerlige Ramappa2-0/+10
On running several back to back perf capture sessions involving closing and opening the perf stream, invalid OA reports are seen in the beginning of the OA buffer in some sessions. Fix this by invalidating OA TLB when the perf stream is closed or disabled on gen12. Signed-off-by: Umesh Nerlige Ramappa <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Fixes: 00a7f0d7155c ("drm/i915/tgl: Add perf support on TGL") Signed-off-by: Lionel Landwerlin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit a639b0c15065df930467695b76ef38d5edaed049) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-20drm/i915/gem: Check for a closed context when looking up an engineChris Wilson1-2/+6
Beware that the context may already be closed as we try to lookup an engine. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1389 Fixes: 130a95e9098e ("drm/i915/gem: Consolidate ctx->engines[] release") Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit a22f34783476a39d157b60485285aaa43554cb2d) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-20drm/i915/gt: Restrict gen7 w/a batch to HaswellChris Wilson1-1/+1
The residual w/a batch is causing system instablity on Ivybridge and Baytrail under some workloads, so disable until resolved. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1405 Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts") Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Prathap Kumar Valsan <[email protected]> Cc: Akeem G Abodunrin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Acked-by: Mika Kuoppala <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit a62774782b994026ac3198bf115717d55d536166) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-03-20Merge tag 'mediatek-drm-next-5.7' of ↵Dave Airlie3-1/+20
https://github.com/ckhu-mediatek/linux.git-tags into drm-next Mediatek DRM Next for Linux 5.7 This include MT8183 DPI support. Signed-off-by: Dave Airlie <[email protected]> From: CK Hu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/1584580683.29614.5.camel@mtksdaap41
2020-03-20Merge tag 'amd-drm-next-5.7-2020-03-19' of ↵Dave Airlie88-503/+955
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-next-5.7-2020-03-19: amdgpu: - SR-IOV fixes - RAS fixes - Fallthrough cleanups - Kconfig fix for ACP - Fix load balancing with VCN - DC fixes - GPU reset fixes - Various cleanups scheduler: - Revert job distribution optimization - Add a helper to pick the least loaded scheduler Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19drm: amd: fix spelling mistake "shoudn't" -> "shouldn't"Colin Ian King3-3/+3
There are spelling mistakes in pr_err messages and a comment. Fix these. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: Remove unnecessary variable shadow in gfx_v9_0_rlcg_wregNathan Chancellor1-5/+1
clang warns: drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:754:6: warning: variable 'shadow' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] if (offset == grbm_cntl || offset == grbm_idx) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:757:6: note: uninitialized use occurs here if (shadow) { ^~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:754:2: note: remove the 'if' if its condition is always true if (offset == grbm_cntl || offset == grbm_idx) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:738:13: note: initialize the variable 'shadow' to silence this warning bool shadow; ^ = 0 1 warning generated. shadow is only assigned in one condition and used as the condition for another if statement; combine the two if statements and remove shadow to make the code cleaner and resolve this warning. Fixes: 2e0cc4d48b91 ("drm/amdgpu: revise RLCG access path") Link: https://github.com/ClangBuiltLinux/linux/issues/936 Suggested-by: Joe Perches <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: fix typo for vcn2.5/jpeg2.5 idle checkJames Zhu2-2/+2
fix typo for vcn2.5/jpeg2.5 idle check Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: fix typo for vcn2/jpeg2 idle checkJames Zhu2-2/+2
fix typo for vcn2/jpeg2 idle check Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: fix typo for vcn1 idle checkJames Zhu1-1/+1
fix typo for vcn1 idle check Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: add CAP fw loadingZhigang Luo5-2/+38
The CAP fw is for enabling driver compatibility. Currently, it only enabled for vega10 VF. Signed-off-by: Zhigang Luo <[email protected]> Reviewed-by: Shaoyun Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19amd/powerplay: arcturus baco reset disable all featuresJohn Clements1-8/+13
issue smu cmd to disable all features upon baco entry for arcturus to mitigate potential dirty I2C controller on boot Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amdgpu: miss PRT case when bo updateYintian Tao1-3/+3
Originally, only the PTE valid is taken in consider. The PRT case is missied when bo update which raise problem. We need add condition for PRT case. v2: add PRT condition for amdgpu_vm_bo_update_mapping, too v3: fix one typo error Signed-off-by: Yintian Tao <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: add on demand pipe merge logic for dcn2+Dmytro Laktyushkin3-16/+56
Adds logic that will determine if pipes need merging during validation. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Chris Park <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Allocate scratch space for DMUB CW7Wyatt Wood2-4/+16
[Why] The scratch space can be used to pass data between x86 and DMCUB. DMCUB will manage the actually mapping of CW7 internally, driver does not program the window. [How] Allocate extra space within the DMUB service's framebuffer for this scratch space and expose them from the service for use in DC. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: DPP DTO isn't update properly.Yongqiang Sun3-4/+6
[Why] before update dpp DTO, we check dppclks in context to determine it is changed or not, but dppclks in context will be updated anyways after flip is done, so compare dppclks in context will always get an equal result. [How] Add pipe dpp clks in dccg and compare values between dccg and context. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Remove connect DIG FE to its BE during timing programmingNikola Cornij4-17/+4
[why] Causes regression with MST DSC displays not lighting up after DPMS [how] Revert commit 8cc426d79be1c3 ("drm/amd/display: Program DSC during timing programming") Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: combine watermark change and clock change for update clocks.Yongqiang Sun3-9/+10
[Why] underflow happened when playing video on 1366x768 + 4K clone mode due to incorrect handle watermark change flag and lower down clocks to early. [How] Check watermark change flag when decide doing optimized, and check optimized required flag to do clock update. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: guard DPPHY_Internal_ctrlCharlene Liu1-1/+1
[why] this register not exist in some asic, based on request remove this from dc. [how] add guard for sanization. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: differentiate vsc sdp colorimetry use criteria between MST ↵Martin Tsai4-22/+22
and SST [Why] We should check MST BU support capability on output port before building vsc info packet. [How] Add a new definition for port and sink capability check. Signed-off-by: Martin Tsai <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Program self refresh control register on bootSung Lee1-0/+3
[WHY] In headless boot cases, self refresh control registers are not programmed on boot. In certain hybrid graphics cases this may cause cstate entering to get blocked causing a hang. [HOW] Program self refresh control register on boot. Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: remove magic numbers in hdcp_ddcWenjing Liu1-6/+6
[why] DP doesn't have message id as the first byte of an hdcp message, current hdcp psp unifies HDMI and DP message so that it is required when reading DP HDCP messages in hdcp_ddc, a message id needs to be added as the first byte of the HDCP message. The id is currently assigned as a magic number which is not a good coding practice. [how] Replace magic numbers with macro defined in hdcp headers. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Ashley Thomas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Fallback to dmcub for psr when dmcu is disabledWyatt Wood1-1/+1
[Why] We want to be able to enable/disable psr on dmcub and fallback to dmcu when necessary. [How] Use dc config option to do so. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Set disable_dmcu flag properly per asicWyatt Wood3-6/+6
[Why] The default value for disable_dmcu is true, even for asics that require dmcu. [How] Set flag properly per asic. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Remove PSR dependency on swizzle modeRoman Li1-6/+1
[Why] The PSR enablement was dependent on swizzle as a workaround for non-pageflipping fb console. It's no longer required. [How] Remove PSR-enable dependency on swizzle mode. Signed-off-by: Roman Li <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Explicitly disable triplebuffer flipsNicholas Kazlauskas1-0/+3
[Why] This is enabled by default on Renoir but there's userspace/API support to actually make use of this. Since we're not passing this down through surface updates, let's explicitly disable this for now. This fixes "dcn20_program_front_end_for_ctx" warnings associated with incorrect/unexpected programming sequences performed while this is enabled. [How] Disable it at the topmost level in DM in case anyone tries to flip this to enabled for any of the other ASICs like Navi10/14. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Pass triplebuffer surface flip flags down to plane stateNicholas Kazlauskas2-0/+3
[Why] A "dcn20_program_front_end_for_ctx" warning is observed on Renoir. Since the resource definition doesn't explicitly disable triplebuffer flips like Navi10 DC actually attempts to go and setup triplebuffering even when we pass in false to the plane state. If we hit a full update after triplebuffering has been setup we see the assertion since we don't expect full updates while performing triplebuffer flips. Normally this would get reset back to false whne we pass in the new plane state, but since we never actually copy the flag when doing surface updates this doesn't happen. [How] Copy the flag onto the plane update based on the requested surface update state. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: fix split threshold w/a to work with mpoDmytro Laktyushkin1-26/+13
Right now only stream count is used to avoid split. This change updates the W/A to check plane count instead. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Wesley Chalmers <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: workaround for HDMI hotplug in DPMSOFF stateYongqiang Sun5-0/+31
[Why] When hotplug a HDMI monitor during entering S0i3 or DPMSOFF state due to entering infinite loop when calling vbios to program pixel clocks. In this scenario, pll is enabled but phy is not, and there is not a programing guide for this case. [How] Before we having the proper programing guide, before disable pll, doing a phy enable and disable to avoid the issue. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Remove redundant hdcp display stateIsabel Zhang6-48/+27
[Why] Due to previous code changes displays which are in active state immediately transition to the active and added state. This makes the two states redundant and unnecessary. [How] Instead of updating the device state to active and added after successful addition, change state to inactive if addition failed. Also, change references to active and added state to just added state. Signed-off-by: Isabel Zhang <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Fix test pattern color space inconsistency for LinuxJerry (Fangzhi) Zuo1-3/+6
[why] When reprogram MSA with updated color space, the test color space shows inconsistency. Linux has separate routine to set up test pattern color space, but it fails to configure RGB. [How] Add RGB to test pattern. Fixes: 43563bc2e6a769 ("drm/amd/display: update MSA and VSC SDP on video test pattern request") Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: update connector->display_info after read edidHersen Wu3-5/+19
[Why] drm_connector->display_info is not passed to amdgpu_dm right way after read edid. [How] display_info is parsed from edid and saved into drm_connector by drm_connector_update_edid_proerty which is called within amdgpu_dm_update_connector_after_detect. call this function after read edid to update drm_connector->display_info Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19drm/amd/display: Revert "DCN2.x Do not program DPPCLK if same value"Sung Lee1-1/+1
[WHY] Not programming dto with same values causes test failures in DCN2 diags DPP tests. [HOW] This reverts commit 1b53e733238c0f7faa4744ec7c8c6f193649f168. Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Yongqiang Sun <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19Merge tag 'exynos-drm-next-for-v5.7' of ↵Dave Airlie2-4/+3
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Two cleanups . Replace the hand rolled encoder bitmask thing with drm_encoder_mask() . Use mode->clock instead of reverse calculating it from the vrefresh Signed-off-by: Dave Airlie <[email protected]> From: Inki Dae <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge tag 'drm-misc-next-2020-03-17' of ↵Dave Airlie44-229/+917
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.7: UAPI Changes: Cross-subsystem Changes: Core Changes: - dp-mst: Remove register_connector callback, add drm_dp_destroy_connector - Changes to scnprintf on multiple instances Driver Changes: - meson: Support for YUV420 - panel: Support Ortustech COM37H3M, idk-1110wr and idk-2121wr, multiple dotclock fixes Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux ↵Dave Airlie9-148/+14
into drm-next - Disable DMA when using SEV encryption - An -RT fix - Code cleanups Signed-off-by: Dave Airlie <[email protected]> From: "Thomas Hellstrom (VMware)" <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge tag 'drm-intel-next-2020-03-13' of ↵Dave Airlie172-4132/+6992
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: On i915 we have a new UAPI to allow userspace to specify CS ring buffer size on construction (I915_CONTEXT_PARAM_RINGSIZE) and also new sysfs entries exposing various engine properties GVT Changes: VFIO edid getting expanded to all platforms and a big cleanup around attr group, unused vblank complete, kvmgt, Intel engine and dev_priv usages. i915 Changes: - new UAPI to allow userspace to specify CS ring buffer size on construction (I915_CONTEXT_PARAM_RINGSIZE) - (Chris) - New sysfs entries exposing various engine properties (Chris) - Tiger Lake is out of require_force_probe protection (Jose) - Changes in many places around active requests, reset and heartbeat (Chris) - Stop assigning drm-dev_private pointer (Jani) - Many code refactor in many places, including intel_modeset_init, increasing use of intel_uncore_*, vgpu, and gvt stuff (Jani) - Fixes around display pipe iterators (Anshuman) - Tigerlake enabling work (Matt Ropper, Matt Atwood, Ville, Lucas, Daniele, Jose, Anusha, Vivek, Swathi, Caz. Kai) - Code clean-up like reducing use of drm/i915_drv.h, removing unused registers, removing garbage warns, and some other code polishing (Jani, Lucas, Ville) - Selftests fixes, improvements and additions (Chris, Dan, Aditya, Matt Auld) - Fix plane possible_crtcs bit mask (Anshuman) - Fixes and cleanup on GLK pre production identification and w/a (Ville) - Fix display orientation on few cases (Hans, Ville) - dbuf clean-up and improvements for slice arrays handling (Ville) - Improvement around min cdclk calculation (Stanislav) - Fixes and refactor around display PLLs (Imre) - Other execlists and perf fixes (Chris) - Documentation fixes (Jani, Chris) - Fix build issue (Anshuman) - Many more fixes around the locking mechanisms (Chris) - Other fixes and debugability info around preemption (Chris, Tvrtko) - Add mechanism to submit a context WA on ring submission (Mika) - Clear all Eu/L3 resitual context (Prathap) - More changes around local memory (Abdiel, Matt, Chris) - Fix RPS (Chris) - DP MST fix (Lyude) - Display FBC fixes (Jose, RK) - debugfs cleanup (Tvrtko) - More convertion towards drm_debive based loggin (Wambui, Ram) - Avoid potential buffer overflow (Takashi) - Ice Lake and Elkhart Lake workarounds (Matt Roper) Signed-off-by: Dave Airlie <[email protected]> From: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-19Merge tag 'drm/tegra/for-5.7-rc1' of ↵Dave Airlie2-14/+40
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v5.7-rc1 This contains some minor cleanups, nothing too exciting. Signed-off-by: Dave Airlie <[email protected]> From: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-18drm/i915/gvt: do not check len & max_len for lriYan Zhao1-12/+0
lri ususally of variable len and far exceeding 127 dwords. Fixes: 00a33be40634 ("drm/i915/gvt: Add valid length check for MI variable commands") Signed-off-by: Yan Zhao <[email protected]> Acked-by: Zhenyu Wang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-18drm/i915/gvt: add support to command SWTESS_BASE_ADDRESSYan Zhao1-0/+4
This cmd access is found on BDW. Signed-off-by: Yan Zhao <[email protected]> Acked-by: Zhenyu Wang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-18drm/exynos: Use mode->clock instead of reverse calculating it from the vrefreshVille Syrjälä1-1/+1
htotal*vtotal*vrefresh ~= clock. So just use say "clock" when we mean it. Cc: Inki Dae <[email protected]> Cc: Joonyoung Shim <[email protected]> Cc: Seung-Woo Kim <[email protected]> Cc: Kyungmin Park <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Inki Dae <[email protected]>
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