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2015-07-28clk: qcom: Give clk-qcom.ko module a GPLv2 licenseStephen Boyd1-0/+3
The missing license causes the clk-qcom.ko module to taint the kernel. Add the appropriate license to avoid taint. Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: gpio: Mark parent_names array constStephen Boyd2-7/+8
Let's encourage const arrays of parent names like other basic clock types. Cc: Sergej Sawazki <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28Merge branch 'v4.3-topic/clk-samsung' of ↵Michael Turquette4-2/+63
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into clk-next
2015-07-28clk: allow a clk divider with max divisor when zeroJim Quinlan2-5/+15
This commit allows certain Broadcom STB clock dividers to be used with clk-divider.c. It allows for a clock whose field value is the equal to the divisor, execpt when the field value is zero, in which case the divisor is 2^width. For example, consider a divisor clock with a two bit field: value divisor 0 4 1 1 2 2 3 3 Signed-off-by: Jim Quinlan <[email protected]> Signed-off-by: Michael Turquette <[email protected]>
2015-07-28clk: socfpga: switch to GENMASK()Andy Shevchenko5-5/+4
Convert the code to use GENMASK() helper instead of div_mask() macro. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Dinh Nguyen <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: pxa: fix core frequency reporting unitRobert Jarzmik3-3/+3
Legacy drivers which are not yet ported, such as cpufreq-pxa[23]xx, rely on pxaXXx_get_clk_frequency_khz() to find the CPU core frequency. This reporting was broken because the expected unit is kHz and not Hz. Fix the reporting for pxa25x, pxa27x and pxa3xx. Fixes: fe7710fae477 ("clk: add pxa25x clock drivers") Fixes: d40670dc6169 ("clk: add pxa27x clock drivers") Fixes: 9bbb8a338fb2 ("clk: pxa: add pxa3xx clock driver") Signed-off-by: Robert Jarzmik <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: rockchip: Fix PLL bandwidthDouglas Anderson4-15/+15
In the TRM we see that BWADJ is "a 12-bit bus that selects the values 1-4096 for the bandwidth divider (NB)": NB = BWADJ[11:0] + 1 The recommended setting of NB: NB = NF / 2. So: NB = NF / 2 BWADJ[11:0] + 1 = NF / 2 BWADJ[11:0] = NF / 2 - 1 Right now, we have: { \ .rate = _rate##U, \ .nr = _nr, \ .nf = _nf, \ .no = _no, \ .bwadj = (_nf >> 1), \ } That means we set bwadj to NF / 2, not NF / 2 - 1 All of this is a bit confusing because we specify "NR" (the 1-based value), "NF" (the 1-based value), "NO" (the 1-based value), but "BWADJ" (the 0-based value) instead of "NB" (the 1-based value). Let's change to working with "NB" and fix the off by one error. This may affect PLL jitter in a small way (hopefully for the better). Signed-off-by: Douglas Anderson <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd165-147/+112
* cleanup-clk-h-includes: (62 commits) clk: Remove clk.h from clk-provider.h clk: h8300: Remove clk.h and clkdev.h includes clk: at91: Include clk.h and slab.h clk: ti: Switch clk-provider.h include to clk.h clk: pistachio: Include clk.h clk: ingenic: Include clk.h clk: si570: Include clk.h clk: moxart: Include clk.h clk: cdce925: Include clk.h clk: Include clk.h in clk.c clk: zynq: Include clk.h clk: ti: Include clk.h clk: sunxi: Include clk.h and remove unused clkdev.h includes clk: st: Include clk.h clk: qcom: Include clk.h clk: highbank: Include clk.h clk: bcm: Include clk.h clk: versatile: Remove clk.h and clkdev.h includes clk: ux500: Remove clk.h and clkdev.h includes clk: tegra: Properly include clk.h ...
2015-07-28clk: ti: make use of of_clk_parent_fill helper functionDinh Nguyen5-14/+5
Use of_clk_parent_fill to fill in the parent clock names' array. Signed-off-by: Dinh Nguyen <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: sunxi: make use of of_clk_parent_fill helper functionDinh Nguyen4-19/+7
Use of_clk_parent_fill to fill in the parent clock names' array. Signed-off-by: Dinh Nguyen <[email protected]> Acked-by: Maxime Ripard <[email protected]> Cc: "Emilio López" <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: st: make use of of_clk_parent_fill helper functionDinh Nguyen2-9/+4
Use of_clk_parent_fill to fill in the parent clock names' array. Signed-off-by: Dinh Nguyen <[email protected]> Tested-by Gabriel Fernandez <[email protected]> Cc: Peter Griffin <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: keystone: make use of of_clk_parent_fill helper functionDinh Nguyen1-2/+1
Use of_clk_parent_fill to fill in the parent clock names' array. Signed-off-by: Dinh Nguyen <[email protected]> Acked-by: Santosh Shilimkar <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: at91: make use of of_clk_parent_fill helper functionDinh Nguyen6-42/+7
Use of_clk_parent_fill to fill in the parent clock names' array. Signed-off-by: Dinh Nguyen <[email protected]> Cc: Boris Brezillon <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: mediatek: Add MT8173 MMPLL change rate supportJames Liao3-6/+42
MT8173 MMPLL frequency settings are different from common PLLs. It needs different post divider settings for some ranges of frequency. This patch add support for MT8173 MMPLL frequency setting by adding div-rate table to lookup suitable post divider setting under a specified frequency. Signed-off-by: James Liao <[email protected]> Acked-by: Sascha Hauer <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: mediatek: Fix calculation of PLL rate settingsJames Liao1-2/+2
Avoid u32 overflow when calculate post divider setting, and increase the max post divider setting from 3 (/8) to 4 (/16). Signed-off-by: James Liao <[email protected]> Acked-by: Sascha Hauer <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: mediatek: Fix PLL registers setting flowJames Liao1-9/+12
Write postdiv and pcw settings at the same time for PLLs if postdiv and pcw settings are on the same register. This is need by PLLs such as MT8173 MMPLL and ARM*PLL. Signed-off-by: James Liao <[email protected]> Acked-by: Sascha Hauer <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: Allow providers to configure min/max ratesStephen Boyd2-2/+16
clk providers are using the consumer APIs to set min/max rates on the clock they're providing. To encourage clk providers to move away from the consumer APIs, add a provider API to set the min/max rate of a clock. The assumption is that this is done before the clock can be requested via clk_get() and that the clock rate is already within the boundaries of the min/max that's configured. Tested-by: Sudeep Holla <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: twl6040: Convert to use devm_clk_registerAxel Lin1-11/+1
Use devm_clk_register() to simplify the code by removing twl6040_clk_remove(). Signed-off-by: Axel Lin <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: s2mps11: Simplify s2mps11_clk_probe unwind pathsAxel Lin1-10/+4
The devm_clk_unregister() in .probe error case is not necessary as it will be automatically called when probe fails. Signed-off-by: Axel Lin <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: shmobile: Remove unneeded #include <linux/clkdev.h>Geert Uytterhoeven7-7/+7
The CCF implementations for the various shmobile SoCs don't use clkdev functionality, hence drop the inclusion of <linux/clkdev.h>. Add the missing #include <linux/slab.h>, which was included implicitly through <asm/clkdev.h> before. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: ti: Force pointer to be __iomemStephen Boyd1-1/+1
Add __force here so that sparse doesn't complain about us playing tricks with __iomem. Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: ti: clk-3xxx: Remove unused structuresStephen Boyd1-10/+0
Sparse complains about these structures missing static, but they also don't look to be used. Remove them. drivers/clk/ti/clk-3xxx.c:74:30: warning: symbol 'clkhwops_omap3430es2_ssi_wait' was not declared. Should it be static? drivers/clk/ti/clk-3xxx.c:157:30: warning: symbol 'clkhwops_omap3430es2_hsotgusb_wait' was not declared. Should it be static? Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: ti: Mark ti_clk_features staticStephen Boyd1-1/+1
This variable isn't exported outside of this file so mark it static. Silences the following sparse warning: drivers/clk/ti/clk.c:36:24: warning: symbol 'ti_clk_features' was not declared. Should it be static? Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: ti: Check kzalloc() for failuresStephen Boyd1-0/+2
smatch reports a failure to check kzalloc() here: drivers/clk/ti/clk.c:232 omap2_clk_provider_init() error: potential null dereference 'io'. (kzalloc returns null) Check for an allocation failure and return -ENOMEM. Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28Merge branch 'for-4.2/ti-clk-move' of https://github.com/t-kristo/linux-pm ↵Stephen Boyd39-2382/+1320
into clk-next From Tero Kristo: "This pull request contains the TI clock driver set to move the clock implementations under clock driver. Some small portions of the clock driver code still remain under mach-omap2 after this, it should be decided whether this code is now obsolete and should be deleted or should someone try to fix it." Slight merge conflicts with determine_rate prototype changes.
2015-07-28clk: h8300: Fix signness bugAxel Lin2-2/+2
of_clk_get_parent_count() may return negative error code, so num_parents needs to be int rather than unsigned int. Signed-off-by: Axel Lin <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocksStephen Boyd2-0/+2
The other ce clocks have the flag set, but ce1 doesn't, so clk_set_rate() doesn't propagate up the tree to the ce1_src_clk. Set the flag as this is supported. Reported-by: Bjorn Andersson <[email protected]> Tested-by: Bjorn Andersson <[email protected]> Fixes: 02824653200b ("clk: qcom: Add APQ8084 Global Clock Controller support") Fixes: d33faa9ead8d ("clk: qcom: Add support for MSM8974's global clock controller (GCC)") Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: gpio: Unlock mutex on error pathStephen Boyd1-2/+4
We don't unlock the mutex if we fail to allocate the parent names array. Unlock it and return an error in this case as well. Reported-by: kbuild test robot <[email protected]> Acked-by: Julia Lawall <[email protected]> Cc: Sergej Sawazki <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: h8300: Use standard Linux I/O accessorsStephen Boyd1-5/+5
There doesn't seem to be any reason why we can't use the standard readb()/writeb() accessors here because ctrl_inb() and ctrl_outb() match the generic implementation of readb() and writeb() that the h8300 architecture uses. This allows us to test compile this driver on other architectures besides h8300. Cc: Yoshinori Sato <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28clk: h8300: Drop allocation printk and cleanup sizeof styleStephen Boyd1-4/+2
We don't need to print an error on allocation failures, drop it. While we're here, change the sizeof() to be sizeof(*<ptr>) to make code more future proof. Cc: Yoshinori Sato <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-28Merge branch 'clk-determine-rate-struct' into clk-nextStephen Boyd20-404/+411
* clk-determine-rate-struct: clk: fix some determine_rate implementations clk: change clk_ops' ->determine_rate() prototype
2015-07-27clk: fix some determine_rate implementationsBoris Brezillon8-8/+24
Some determine_rate implementations are not returning an error when they failed to adapt the rate according to the rate request. Fix them so that they return an error instead of silently returning 0. Signed-off-by: Boris Brezillon <[email protected]> CC: Jonathan Corbet <[email protected]> CC: Tony Lindgren <[email protected]> CC: Ralf Baechle <[email protected]> CC: "Emilio López" <[email protected]> CC: Maxime Ripard <[email protected]> Cc: Tero Kristo <[email protected]> CC: Peter De Schrijver <[email protected]> CC: Prashant Gaikwad <[email protected]> CC: Stephen Warren <[email protected]> CC: Thierry Reding <[email protected]> CC: Alexandre Courbot <[email protected]> CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] Signed-off-by: Stephen Boyd <[email protected]>
2015-07-27clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon20-401/+392
Clock rates are stored in an unsigned long field, but ->determine_rate() (which returns a rounded rate from a requested one) returns a long value (errors are reported using negative error codes), which can lead to long overflow if the clock rate exceed 2Ghz. Change ->determine_rate() prototype to return 0 or an error code, and pass a pointer to a clk_rate_request structure containing the expected target rate and the rate constraints imposed by clk users. The clk_rate_request structure might be extended in the future to contain other kind of constraints like the rounding policy, the maximum clock inaccuracy or other things that are not yet supported by the CCF (power consumption constraints ?). Signed-off-by: Boris Brezillon <[email protected]> CC: Jonathan Corbet <[email protected]> CC: Tony Lindgren <[email protected]> CC: Ralf Baechle <[email protected]> CC: "Emilio López" <[email protected]> CC: Maxime Ripard <[email protected]> Acked-by: Tero Kristo <[email protected]> CC: Peter De Schrijver <[email protected]> CC: Prashant Gaikwad <[email protected]> CC: Stephen Warren <[email protected]> CC: Thierry Reding <[email protected]> CC: Alexandre Courbot <[email protected]> CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] CC: [email protected] [[email protected]: Fix parent dereference problem in __clk_determine_rate()] Signed-off-by: Stephen Boyd <[email protected]> Tested-by: Romain Perier <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> [[email protected]: Folded in fix from Heiko for fixed-rate clocks without parents or a rate determining op] Signed-off-by: Stephen Boyd <[email protected]>
2015-07-24clk: exynos3250: Add cpu clock configuration data and instaniate cpu clockChanwoo Choi2-2/+31
This patch add CPU clock configuration data and instantiate the CPU clock type for Exynos3250 to support Samsung specific cpu-clock type. Cc: Sylwester Nawrocki <[email protected]> Cc: Tomasz Figa <[email protected]> Signed-off-by: Chanwoo Choi <[email protected]> Acked-by: Kyungmin Park <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Acked-by: Michael Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2015-07-24clk: exynos5250: add cpu clock configuration data and instantiate cpu clockThomas Abraham2-0/+32
With the addition of the new Samsung specific cpu-clock type, the arm clock can be represented as a cpu-clock type. Add the CPU clock configuration data and instantiate the CPU clock type for Exynos5250. Cc: Tomasz Figa <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> [b.zolnierkie: split exynos5250 support from the original patch] [b.zolnierkie: moved E5250_CPU_DIV[0,1] macros to clk-exynos5250.c] Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Tested-by: Javier Martinez Canillas <[email protected]> Acked-by: Sylwester Nawrocki <[email protected]> Acked-by: Viresh Kumar <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: Michael Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2015-07-20clk: Remove clk.h from clk-provider.hStephen Boyd1-1/+1
Remove clk.h from clk-provider.h so that we can clearly split clk providers from clk consumers. This will allow us to quickly detect when clock providers are using the consumer APIs by looking at the includes. Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: h8300: Remove clk.h and clkdev.h includesStephen Boyd2-4/+0
Neither of these includes are used in these files, remove them. Cc: Yoshinori Sato <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: at91: Include clk.h and slab.hStephen Boyd1-0/+2
This clock provider uses the consumer API, so include clk.h explicitly. Also include slab.h instead of relying on clkdev.h for it. Acked-by: Boris Brezillon <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: ti: Switch clk-provider.h include to clk.hStephen Boyd1-1/+1
This file isn't a clock provider but uses the consumer API, so include clk.h instead of clk-provider.h. Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: pistachio: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Andrew Bresticker <[email protected]> Cc: Ralf Baechle <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: ingenic: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Paul Burton <[email protected]> Cc: Paul Cercueil <[email protected]> Cc: Ralf Baechle <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: si570: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Guenter Roeck <[email protected]> Acked-by: Sören Brinkmann <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: moxart: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Jonas Jensen <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: cdce925: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Mike Looijmans <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: Include clk.h in clk.cStephen Boyd1-0/+1
This file implements the clk API and so it should include clk.h directly instead of indirectly including it through clk-provider.h. Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: zynq: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Acked-by: Sören Brinkmann <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: ti: Include clk.hStephen Boyd10-0/+10
This clock provider uses the consumer API, so include clk.h explicitly. Acked-by: Tero Kristo <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: sunxi: Include clk.h and remove unused clkdev.h includesStephen Boyd6-5/+10
This clock provider uses the consumer API, so include clk.h explicitly. Also remove clkdev.h in files that aren't using it and include slab.h when clkdev.h was being used to implicitly include it. Cc: Chen-Yu Tsai <[email protected]> Cc: Maxime Ripard <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: st: Include clk.hStephen Boyd4-0/+4
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Gabriel Fernandez <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-07-20clk: qcom: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Signed-off-by: Stephen Boyd <[email protected]>