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2016-07-07drm/amdgpu: fix ring debugfs bugMonk Liu2-0/+13
debugfs file added but not released after driver unloaded Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: ring debugfs is read in increments of 4 bytesTom St Denis1-1/+1
If a user tries to read a non-multiple of 4 bytes it would have read until the end of the ring potentially crashing the user task. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: Convert ring debugfs entries to binaryTom St Denis1-65/+62
They now emit ring data in binary which will be read/written by the userspace tool umr shortly. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon: drop explicit pci D3/D0 setting for ATPX power controlAlex Deucher1-4/+4
The ATPX power control method does this for you. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon/atpx: hybrid platforms use d3coldAlex Deucher1-1/+3
The platform d3 cold is used to power down the dGPU. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon/atpx: track whether if this is a hybrid graphics platformAlex Deucher2-1/+10
hybrid graphics in this case refers to systems which use the new platform d3 cold ACPI methods as opposed to ATPX for dGPU power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: drop explicit pci D3/D0 setting for ATPX power controlAlex Deucher1-4/+4
The ATPX power control method does this for you. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: hybrid platforms use d3coldAlex Deucher1-1/+3
The platform d3 cold is used to power down the dGPU. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: track whether if this is a hybrid graphics platformAlex Deucher2-1/+10
hybrid graphics in this case refers to systems which use the new platform d3 cold ACPI methods as opposed to ATPX for dGPU power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon/atpx: drop forcing of dGPU power controlAlex Deucher1-5/+0
Now that we handle this correctly, there is no need to force it. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon: use PCI_D3hot for PX systems without dGPU power controlAlex Deucher1-1/+4
On PX systems without dGPU power control, use PCI_D3hot. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon/atpx: add a query for ATPX dGPU power controlAlex Deucher2-0/+6
The runtime pm sequence is different depending on whether or not the platform supports ATPX dGPU power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon: add a delay after ATPX dGPU power offAlex Deucher1-0/+5
ATPX dGPU power control requires a 200ms delay between power off and on. This should fix dGPU failures on resume from power off. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-07-07drm/radeon: clean up atpx power control handlingAlex Deucher1-22/+28
The presence of the power control method should be determined via the presence of the method in function 0. However, some sbioses only set the appropriate bits in function 1 so use then to override a missing power control function. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon: disable power control on hybrid laptopsAlex Deucher1-0/+5
Windows 10 (and some 8.1) systems use standardized ACPI calls for hybrid laptops to control dGPU power. Detect those cases and disable the AMD specific ATPX power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: drop forcing of dGPU power controlAlex Deucher1-5/+0
Now that we handle this correctly, there is no need to force it. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: use PCI_D3hot for PX systems without dGPU power controlAlex Deucher1-1/+4
On PX systems without dGPU power control, use PCI_D3hot. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/atpx: add a query for ATPX dGPU power controlAlex Deucher2-0/+6
The runtime pm sequence is different depending on whether or not the platform supports ATPX dGPU power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add a delay after ATPX dGPU power offAlex Deucher1-0/+5
ATPX dGPU power control requires a 200ms delay between power off and on. This should fix dGPU failures on resume from power off. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-07-07drm/amdgpu: clean up atpx power control handlingAlex Deucher1-22/+29
The presence of the power control method should be determined via the presence of the method in function 0. However, some sbioses only set the appropriate bits in function 1 so use then to override a missing power control function. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: disable power control on hybrid laptopsAlex Deucher1-0/+5
Windows 10 (and some 8.1) systems use standardized ACPI calls for hybrid laptops to control dGPU power. Detect those cases and disable the AMD specific ATPX power control. Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon: allow PACKET3_PFP_SYNC_ME on evergreenEdmondo Tommasina3-1/+10
Reviewed-by: Christian König <[email protected]> Signed-off-by: Edmondo Tommasina <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disableTom St Denis1-0/+2
Must wait for SERDES idle before exiting RLC SAFEMODE Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add mclk OD(overdrive) support for Polaris10Eric Huang1-0/+43
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add mclk OD(overdrive) support for FijiEric Huang1-0/+44
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add mclk OD(overdrive) support for TongaEric Huang1-0/+44
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add mclk OD(overdrive) support for CIEric Huang1-0/+36
The maximum OD percentage is 20. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the common code to support mclk ODEric Huang5-0/+107
This implements mclk OverDrive(OD) through sysfs. The new entry pp_mclk_od is read/write. The value of input/output is an integer of the overclocking percentage. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add powercontainment module parameterHuang Rui8-9/+24
This patch makes powercontainment feature configurable. Currently, the powercontainment is not very stable, so add a module parameter to enable/disable it via user mode. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix and cleanup job destructionChristian König5-63/+30
Remove the job reference counting and just properly destroy it from a work item which blocks on any potential running timeout handler. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: move locking into the functions who need itChristian König1-9/+9
Otherwise the locking becomes rather confusing. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: properly abstract scheduler timeout handlingChristian König5-13/+19
The driver shouldn't mess with the scheduler internals. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove use_shed hack in job cleanupChristian König3-7/+8
Remembering the code path in a variable to cleanup differently is usually not a good idea at all. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix coding style in amdgpu_job_freeChristian König1-3/+4
Ther should be a new line between code and decleration. Also use amdgpu_ib_free() instead of releasing the member manually. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove duplicated timeout callbackChristian König2-5/+1
No need for double housekeeping here. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove begin_job/finish_jobChristian König4-22/+9
Completely pointless and confusing to use a callback to call into the same code file. Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix coding style in the scheduler v2Christian König3-23/+32
v2: fix even more Signed-off-by: Christian König <[email protected]> Reviewed-by: Monk.Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the CI code to enable sclk OD(OverDrive)Eric Huang2-0/+41
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the CI code to enable clock level selectionEric Huang1-0/+114
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the new common pm code to support sclk ODEric Huang2-9/+17
This extends OD (OverDrive) support to the non-Powerplay code paths. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add the new common pm code to select the clock levelsEric Huang2-18/+34
This extends dpm clock level selection to the non-powerplay code paths. This interface can be used to select individual clock levels. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: Enable GFX PG on CZTom St Denis1-0/+8
Based on Alex's patches this enables GFX PG on CZ. Tested with xonotic-glx/glxgears/supertuxkart and idle desktop. Also read-back registers via umr for verificiation that the bits are truly enabled. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: clean up polaris11 PG enableAlex Deucher1-5/+13
Fix the logic for enabling/disabling. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: add powergating support for CZ/STAlex Deucher1-6/+126
This implements powergating support for CZ/ST asics. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add new GFX powergating typesAlex Deucher1-0/+2
Add some new GFX powergating flags. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: rename some pg functionsAlex Deucher1-10/+12
So they can be shared with other asics. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gatingAlex Deucher1-5/+128
This sets up the CP jump table and GDS buffer and sets the PG state registers. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon/gfx7: expand cp jt size to handle GDS as wellAlex Deucher1-1/+2
The size needs to handle the CP JT and GDS. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu/gfx7: expand cp jt size to handle GDS as wellAlex Deucher1-1/+2
The size needs to handle the CP JT and GDS. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add sclk OD support on Polaris10Eric Huang1-0/+44
This implements sclk overdrive(OD) overclocking support for Polaris10, and the maximum overdrive percentage is 20. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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