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2016-07-11drm/panel: simple: Add support for Samsung LSN122DL01-C01 panelYakir Yang1-0/+25
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD panel connected using eDP interfaces. Signed-off-by: Yakir Yang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-07-11dt-bindings: Add Samsung LSN122DL01-C01 panel bindingYakir Yang1-0/+7
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD panel connected using eDP interfaces. Signed-off-by: Yakir Yang <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-07-11drm/panel: simple: Add support for LG LP097QX1-SPA1 panelYakir Yang1-0/+25
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel connected using eDP interfaces. Signed-off-by: Yakir Yang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-07-11dt-bindings: Add LG LP097QX1-SPA1 panel bindingYakir Yang1-0/+7
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel connected using eDP interfaces. Signed-off-by: Yakir Yang <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2016-07-11drm/panel: simple: Update backlight state propertyThierry Reding1-0/+2
Some backlight drivers ignore the power property and instead only use the state property. Fixup the panel driver to set the state property in addition to the power property. Signed-off-by: Thierry Reding <[email protected]>
2016-07-11drm/i915: Update DRIVER_DATE to 20160711Daniel Vetter1-1/+1
Signed-off-by: Daniel Vetter <[email protected]>
2016-07-10drm/i915: Select DRM_VGEM for igtChris Wilson1-0/+1
igt/prime_vgem (and others) depends upon VGEM so automatically select it when enabling i915 debugging. Signed-off-by: Chris Wilson <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Matthew Auld <[email protected]>
2016-07-10drm/i915: Select X86_MSR for igtChris Wilson1-0/+1
igt/pm_rpm depends upon /dev/*/msr so automatically select it when enabling i915 debugging. Signed-off-by: Chris Wilson <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Matthew Auld <[email protected]>
2016-07-08drm/i915: Fill unused GGTT with scratch pages for VT-dChris Wilson3-11/+11
One of the numerous VT-d workarounds we require is that the display hardware reads past the end of the buffer triggering VT-d faults. This is acknowledged in the code as being safe "since we fill the unused portions of the GGTT with the scratch page". Alas, that is no longer always true and so we trigger DMAR read faults. Skylake also requires another workaround to avoid mixing VT-d and unpopulated PTE, and so there we also need to ensure we fill unused entries with the scratch page. Reported-by: Mike Lothian <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96584 Fixes: f7770bfd9fd2 ("drm/i915: Skip clearing the GGTT on full-ppgtt systems") Signed-off-by: Chris Wilson <[email protected]> Cc: David Weinehall <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: David Weinehall <[email protected]>
2016-07-08Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie103-1596/+3924
into drm-next This is the main 4.8 pull for radeon and amdgpu. Sorry for the delay, I meant to send this out last week, but I was moving house. Lots of changes here: - ATPX improvements for better dGPU power control on PX systems - New power features for CZ/BR/ST - Pipelined BO moves and evictions in TTM - GPU scheduler improvements - GPU reset improvements - Overclocking on dGPUs with amdgpu - Lots of code cleanup - Bug fixes * 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (191 commits) drm/amd/powerplay: don't add invalid voltage. drm/amdgpu: add read/write function for GC CAC programming drm/amd/powerplay: add definitions related to di/dt feature for fiji and polaris. drm/amd/powerplay: add shared definitions for di/dt feature. drm/amdgpu: remove gfx8 registers that vary between asics drm/amd/powerplay: add mvdd dpm support. drm/amdgpu: get number of shade engine by cgs interface. drm/amdgpu: remove more of the ring backup code drm/amd/powerplay: Unify family defines drm/amdgpu: clean up ring_backup code, no need more drm/amdgpu: ib test first after gpu reset drm/amdgpu: recovery hw jobs when gpu reset V3 drm/amdgpu: abstract amdgpu_vm_is_gpu_reset drm/amdgpu: add a bool to specify if needing vm flush V2 drm/amdgpu: add amd_sched_job_recovery drm/amdgpu: force completion for gpu reset drm/amdgpu: block ttm first before parking scheduler drm/amd: add amd_sched_hw_job_reset drm/amd: add parent for sched fence drm/amdgpu: remove evict vram ...
2016-07-08Merge tag 'drm-hisilicon-next-2016-07-04' of github.com:xin3liang/linux into ↵Dave Airlie2-6/+9
drm-next drm-hisilicon-next * tag 'drm-hisilicon-next-2016-07-04' of github.com:xin3liang/linux: drm/hisilicon: Fix ADE vblank on/off handling drm/hisilicon: add select HISI_KIRIN_DW_DSI drm/hisilicon: Fix return value check in ade_dts_parse()
2016-07-08Merge branch 'drm-etnaviv-next' of git://git.pengutronix.de/git/lst/linux ↵Dave Airlie3-5/+60
into drm-next etnaviv-next only contains two patches to get rid of a confusing error message and finally one patch to enable the autonomous GPU clock gating. * 'drm-etnaviv-next' of git://git.pengutronix.de/git/lst/linux: drm/etnaviv: remove generic GPU init failure reporting drm/etnaviv: improve error reporting in GPU init path drm/etnaviv: enable GPU module level clock gating support
2016-07-08Merge tag 'drm-amdkfd-next-2016-07-03' of ↵Dave Airlie1-2/+2
git://people.freedesktop.org/~gabbayo/linux into drm-next A few amdkfd patches for 4.8. One patch replaces deprecated kernel api call (create_workqueue) and the other patch properly cleans up resources in case of failing to create a process object. * tag 'drm-amdkfd-next-2016-07-03' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: destroy mutex if process creation fails drm/amdkfd: Remove create_workqueue()
2016-07-07Merge tag 'drm-vc4-fixes-2016-06-06' into drm-vc4-nextEric Anholt4-21/+45
Merge Mario's get_vblank_counter fix forward to prevent conflicts with his followon patch to add precise vblank timestamping.
2016-07-07gpu: drm: vc4_hdmi: add missing of_node_put after calling of_parse_phandlePeter Chen1-6/+7
of_node_put needs to be called when the device node which is got from of_parse_phandle has finished using. Signed-off-by: Peter Chen <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
2016-07-07drm: vc4: enable XBGR8888 and ABGR8888 pixel formatsRob Herring1-0/+8
DRM_FORMAT_XBGR8888 and DRM_FORMAT_ABGR8888 are 2 of the native formats used in Android, so enable them for VC4. There seems to be no logic behind HVS_PIXEL_ORDER_xxxx naming, but HVS_PIXEL_ORDER_ARGB seems to work correctly. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
2016-07-07drm/amd/powerplay: don't add invalid voltage.Rex Zhu1-6/+6
if atomctrl_get_voltage_evv_on_sclk_ai returns non zero (fail) in the expansion of the PP_ASSERT_WITH_CODE macro the continue will actually do nothing, So invalid voltage will be added to ppbable. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add read/write function for GC CAC programmingRex Zhu5-0/+40
Create a GC_CAC_IND_INDEX/DATA pair of funcitons to program all the CAC registers Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add definitions related to di/dt feature for fiji and ↵Rex Zhu2-0/+26
polaris. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add shared definitions for di/dt feature.Rex Zhu2-0/+83
v1: delete some comflict definitions between polaris and fiji. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove gfx8 registers that vary between asicsKen Wang1-22/+0
those register mask definitions are different in polaris compare to former gfx 8 gpus, so remove them from misusing. Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add mvdd dpm support.Rex Zhu1-3/+2
SMC requires master switch bit to be set. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: get number of shade engine by cgs interface.Rex Zhu2-0/+4
the num of shade engine was needed to measure the activity of the graphics core and to enable di/dt feature. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove more of the ring backup codeAlex Deucher7-101/+4
Not used anymore. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: Unify family definesTom St Denis3-13/+6
s/AMD_FAMILY_/AMDGPU_FAMILY_/ Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: clean up ring_backup code, no need moreChunming Zhou3-103/+2
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: ib test first after gpu resetChunming Zhou1-10/+10
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: recovery hw jobs when gpu reset V3Chunming Zhou2-2/+5
V3: directly use pd_addr. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: abstract amdgpu_vm_is_gpu_resetChunming Zhou1-1/+8
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add a bool to specify if needing vm flush V2Chunming Zhou4-47/+36
which avoids job->vm_pd_addr be changed. V2: pass job structure to amdgpu_vm_grab_id and amdgpu_vm_flush directly. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add amd_sched_job_recoveryChunming Zhou2-0/+34
Which is to recover hw jobs when gpu reset. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: force completion for gpu resetChunming Zhou1-2/+3
After all hw jobs are reset, hw fence is meaningless, so force_completion Cc: William Lewis <[email protected]> Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: block ttm first before parking schedulerChunming Zhou1-2/+3
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd: add amd_sched_hw_job_resetChunming Zhou2-0/+15
amd_sched_hw_job_reset will remove callback from hw fence. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd: add parent for sched fenceChunming Zhou3-0/+3
Parent of sched fence is hw fence which is to signal sched fence. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove evict vramChunming Zhou1-3/+0
Previous vm fault is since page talbe losts connection with vmid after gpu reset. Now the issue is fixed by recovery. No need more. If we want to save vram for some EDC card, we will need to consider a complete solution. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: put old hw fence of job if gpu resetChunming Zhou1-0/+2
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove fence parameter from amd_sched_job_initChristian König4-12/+7
We return the fence as part of the job structur anyway, no need to do this twice. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: earlier free SA resourcesChristian König3-2/+4
Keep the time we don't have a fence associated with the resource smaller. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: shorten amdgpu_job_free_resourcesChristian König1-3/+5
The fence and the sync object are not hardware resources. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix user fence handling once moreChristian König4-14/+9
Same problem as with the VM page tables. The user fence address must be determined before the job is scheduled, not when the IB is executed. This fixes a security problem where user fences could be used to overwrite any part of VRAM. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: Add bank selection for MMIO debugfs (v3)Tom St Denis1-3/+32
(v2) Added INSTANCE selector (v3) Changed order of bank selectors Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: Add gca config debug entry (v4)Tom St Denis1-0/+70
A binary entry that lists GCA configuration data (and can be read by umr). (v2) Use kmalloc instead of vmalloc (v3) Minor indentation correction (v4) agd: Squash in kmalloc fix Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/gfx: add instance field to select_se_sh (v3)Tom St Denis5-29/+39
Add ability to specify instance in select_se_sh callback. Defaults to 0xffffffff all over the driver. (v2) Don't enable INSTANCE_BROADCAST by default (v3) Style changes Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: Poll for both connect/disconnect on analog connectorsLyude1-3/+4
DRM_CONNECTOR_POLL_CONNECT only enables polling for connections, not disconnections. Because of this, we end up losing hotplug polling for analog connectors once they get connected. Easy way to reproduce: - Grab a machine with an AMD GPU and a VGA port - Plug a monitor into the VGA port, wait for it to update the connector from disconnected to connected - Disconnect the monitor on VGA, a hotplug event is never sent for the removal of the connector. Originally, only using DRM_CONNECTOR_POLL_CONNECT might have been a good idea since doing VGA polling can sometimes result in having to mess with the DAC voltages to figure out whether or not there's actually something there since VGA doesn't have HPD. Doing this would have the potential of showing visible artifacts on the screen every time we ran a poll while a VGA display was connected. Luckily, amdgpu_vga_detect() only resorts to this sort of polling if the poll is forced, and DRM's polling helper doesn't force it's polls. Additionally, this removes some assignments to connector->polled that weren't actually doing anything. Cc: [email protected] Signed-off-by: Lyude <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/radeon: Poll for both connect/disconnect on analog connectorsLyude1-6/+9
DRM_CONNECTOR_POLL_CONNECT only enables polling for connections, not disconnections. Because of this, we end up losing hotplug polling for analog connectors once they get connected. Easy way to reproduce: - Grab a machine with a radeon GPU and a VGA port - Plug a monitor into the VGA port, wait for it to update the connector from disconnected to connected - Disconnect the monitor on VGA, a hotplug event is never sent for the removal of the connector. Originally, only using DRM_CONNECTOR_POLL_CONNECT might have been a good idea since doing VGA polling can sometimes result in having to mess with the DAC voltages to figure out whether or not there's actually something there since VGA doesn't have HPD. Doing this would have the potential of showing visible artifacts on the screen every time we ran a poll while a VGA display was connected. Luckily, radeon_vga_detect() only resorts to this sort of polling if the poll is forced, and DRM's polling helper doesn't force it's polls. Additionally, this removes some assignments to connector->polled that weren't actually doing anything. Cc: [email protected] Signed-off-by: Lyude <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: stop/resume fb access when gpu reset V3Chunming Zhou1-0/+7
V2: Add wait_for_mc_idle after stopping fb access V3: 1. Remove resume fb access since there is no need to do that for gpu reset. 2. Move stop fb access to amdgpu_gpu_reset function, since it's the same for all asics. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> (V1) Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: change condition judgment as function's return value changed.Rex Zhu1-7/+6
Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: functions's return state was reversedRex Zhu1-2/+2
In commit 195567e99bdf6491a370b71a1dcf6b4c891495d7, use true/false instead of 1/0 to fix build warning. But the original logic: '0' means true and '1' means false. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: stop disabling irqs when it isn't neccessaryChristian König1-8/+6
A regular spin_lock/unlock should do here as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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