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2020-01-23MIPS: Loongson64: Disable exec hazardJiaxun Yang1-0/+1
Loongson64 has hardware mechanism to prevent hazard issue, so we can simply disable exec hazard in cpu-features. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-23MIPS: Loongson64: Bump ISA level to MIPSR2Jiaxun Yang2-4/+6
Despite early sample of Loongson-3A1000, the whole Loongson64 family have implemented all the features required by MIPS64 Release2. Thus we decide to bump the ISA option to R2. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-23MIPS: Make DIEI support as a config optionJiaxun Yang3-5/+14
DI(Disable Interrupt) and EI(Enable Interrupt) instructions is required by MIPSR2/MIPSR6, however, it appears to be buggy on some processors such as Loongson-3A1000. Thus we make it as a config option to allow disable it at compile time with CPU_MIPSR2 selected. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-23MIPS: OCTEON: octeon-irq: fix spelling mistake "to" -> "too"Colin Ian King1-1/+1
There is a spelling mistake in a dev_err message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-23MIPS: asm: local: add barriers for LoongsonWang Xuerui1-0/+4
Somehow these LL/SC usages are not taken care of, breaking Loongson builds. Add the SYNCs appropriately. Signed-off-by: Wang Xuerui <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: Huacai Chen <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: <[email protected]> # v5.5+
2020-01-22MIPS: Loongson64: Select mac2008 only featureJiaxun Yang1-0/+1
Some Loongson-64 processor didn't set MAC2008 bit in fcsr, but actually all Loongson64 processors are MAC2008 only. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-22MIPS: Add MAC2008 SupportJiaxun Yang9-44/+141
MAC2008 means the processor implemented IEEE754 style Fused MADD instruction. It was introduced in Release3 but removed in Release5. The toolchain support of MAC2008 have never landed except for Loongson processors. This patch aimed to disabled the MAC2008 if it's optional. For MAC2008 only processors, we corrected math-emu behavior to align with actual hardware behavior. Signed-off-by: Jiaxun Yang <[email protected]> [[email protected]: Fixup MIPSr2-r5 check in cpu_set_fpu_2008.] Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-22Revert "MIPS: Add custom serial.h with BASE_BAUD override for generic kernel"Alexander Lobakin2-18/+1
This reverts commit c8ec2041f549e7f2dee0c34d25381be6f7805f99. There's no more need to set BASE_BAUD to 0 to make earlycon work properly on DTS-based boards since such cases were handled in commit 182ead3e418a ("earlycon: Remove hardcoded port->uartclk initialization in of_setup_earlycon"). earlycon no longer initializes port->uartclk with a value of BASE_BAUD * 16 when starting from FDT/OF. Signed-off-by: Alexander Lobakin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Microchip Linux Driver Support <[email protected]> Cc: Will Deacon <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Michal Simek <[email protected]> Cc: Allison Randal <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Eric W. Biederman <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-22MIPS: sort MIPS and MIPS_GENERIC Kconfig selects alphabetically (again)Alexander Lobakin1-10/+10
Cycles "sort selects alphabetically -> add new options at the end or at random place -> repeat" go on and on. Please double-check when adding new options and make sure that they don't break the existing order to prevent dumb commits like this one from appearing. Signed-off-by: Alexander Lobakin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Microchip Linux Driver Support <[email protected]> Cc: Will Deacon <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Michal Simek <[email protected]> Cc: Allison Randal <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Eric W. Biederman <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-22MIPS: make CPU_HAS_LOAD_STORE_LR opt-outAlexander Lobakin4-60/+40
CPU_HAS_LOAD_STORE_LR was introduced in 932afdeec18b ("MIPS: Add Kconfig variable for CPUs with unaligned load/store instructions") to make code in kernel/unaligned.c and lib/mem{cpy,set}.S more intuitive and give a possibility to easily add new CPUs without these instruction sets in future. Hovewer, this variant is not optimal for mainly two reasons: * For now, we have 20+ CPUs with such instructions and only two (MIPS R6) without. It will obviously be more effective and straightforward to have an option for these two rather than for the rest. * You can easily miss the fact that you need to select this option when adding a new CPU, while all processors lacking these sets are well-known, so the probability of missing something is way much lower. We can address both points by turning CPU_HAS_LOAD_STORE_LR into opt-out CPU_NO_LOAD_STORE_LR. This also makes MIPS root Kconfig more clear and understandable. Signed-off-by: Alexander Lobakin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Microchip Linux Driver Support <[email protected]> Cc: Will Deacon <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Michal Simek <[email protected]> Cc: Allison Randal <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Eric W. Biederman <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-22MIPS: generic: don't unconditionally select PINCTRLAlexander Lobakin2-1/+1
CONFIG_PINCTRL was converted from hidden selectable to a visible option with commit d219b924611a ("pinctrl: change Kconfig PINCTRL variable to a menuconfig"). Remove unconditional select and enable this symbol in Ocelot config, which currently is the only user among generic boards. Signed-off-by: Alexander Lobakin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Microchip Linux Driver Support <[email protected]> Cc: Will Deacon <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Michal Simek <[email protected]> Cc: Allison Randal <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Eric W. Biederman <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-22MIPS: don't explicitly select LIBFDT in KconfigAlexander Lobakin1-5/+0
It gets selected anyway through USE_OF -> OF_EARLY_FLATTREE -> OF_FLATTREE -> LIBFDT, no need to double-check. Signed-off-by: Alexander Lobakin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Microchip Linux Driver Support <[email protected]> Cc: Will Deacon <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Michal Simek <[email protected]> Cc: Allison Randal <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Eric W. Biederman <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-22MIPS: sync-r4k: do slave counter synchronization with disabled HW interruptsSergey Korolev1-0/+5
synchronise_count_slave() called with an enabled in mips_clockevent_init() timer interrupt which may decrease synchronization precision. Signed-off-by: Sergey Korolev <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected]
2020-01-22MIPS: SGI-IP30: Check for valid pointer before using itThomas Bogendoerfer1-2/+3
Fix issue detected by Smatch: ./arch/mips/sgi-ip30/ip30-irq.c:236 heart_domain_free() warn: variable dereferenced before check 'irqd' (see line 235) Fixes: 7505576d1c1a ("MIPS: add support for SGI Octane (IP30)") Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected] Cc: <[email protected]> # v5.5+
2020-01-20MIPS: syscalls: fix indentation of the 'SYSNR' messageAlexander Lobakin1-1/+1
It also lacks a whitespace (copy'n'paste error?) and also messes up the output: SYSHDR arch/mips/include/generated/uapi/asm/unistd_n32.h SYSHDR arch/mips/include/generated/uapi/asm/unistd_n64.h SYSHDR arch/mips/include/generated/uapi/asm/unistd_o32.h SYSNR arch/mips/include/generated/uapi/asm/unistd_nr_n32.h SYSNR arch/mips/include/generated/uapi/asm/unistd_nr_n64.h SYSNR arch/mips/include/generated/uapi/asm/unistd_nr_o32.h WRAP arch/mips/include/generated/uapi/asm/bpf_perf_event.h WRAP arch/mips/include/generated/uapi/asm/ipcbuf.h After: SYSHDR arch/mips/include/generated/uapi/asm/unistd_n32.h SYSHDR arch/mips/include/generated/uapi/asm/unistd_n64.h SYSHDR arch/mips/include/generated/uapi/asm/unistd_o32.h SYSNR arch/mips/include/generated/uapi/asm/unistd_nr_n32.h SYSNR arch/mips/include/generated/uapi/asm/unistd_nr_n64.h SYSNR arch/mips/include/generated/uapi/asm/unistd_nr_o32.h WRAP arch/mips/include/generated/uapi/asm/bpf_perf_event.h WRAP arch/mips/include/generated/uapi/asm/ipcbuf.h Present since day 0 of syscall table generation introduction for MIPS. Fixes: 9bcbf97c6293 ("mips: add system call table generation support") Cc: <[email protected]> # v5.0+ Signed-off-by: Alexander Lobakin <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-20MIPS: boot: fix typo in 'vmlinux.lzma.its' targetAlexander Lobakin1-1/+1
Commit 92b34a976348 ("MIPS: boot: add missing targets for vmlinux.*.its") fixed constant rebuild of *.its files on every make invocation, but due to typo ("lzmo") it made no sense for vmlinux.lzma.its. Fixes: 92b34a976348 ("MIPS: boot: add missing targets for vmlinux.*.its") Cc: <[email protected]> # v4.19+ Signed-off-by: Alexander Lobakin <[email protected]> [[email protected]: s/invokation/invocation/] Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-20MIPS: fix indentation of the 'RELOCS' messageAlexander Lobakin1-1/+1
quiet_cmd_relocs lacks a whitespace which results in: LD vmlinux SORTEX vmlinux SYSMAP System.map RELOCS vmlinux Building modules, stage 2. MODPOST 64 modules After this patch: LD vmlinux SORTEX vmlinux SYSMAP System.map RELOCS vmlinux Building modules, stage 2. MODPOST 64 modules Typo is present in kernel tree since the introduction of relocatable kernel support in commit e818fac595ab ("MIPS: Generate relocation table when CONFIG_RELOCATABLE"), but the relocation scripts were moved to Makefile.postlink later with commit 44079d3509ae ("MIPS: Use Makefile.postlink to insert relocations into vmlinux"). Fixes: 44079d3509ae ("MIPS: Use Makefile.postlink to insert relocations into vmlinux") Cc: <[email protected]> # v4.11+ Signed-off-by: Alexander Lobakin <[email protected]> [[email protected]: Fixup commit references in commit message.] Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-15dt-bindings: Document loongson vendor-prefixJiaxun Yang1-0/+2
Loongson is a MIPS-compatible processor vendor. Signed-off-by: Jiaxun Yang <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-15MIPS: CU1000-Neo: Refresh defconfig to support HWMON and WiFi.周琰杰 (Zhou Yanjie)1-1/+7
Refresh CU1000-Neo's defconfig to support ADS7830 based HWMON and AP6212A WiFi module. Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-15MIPS: Ingenic: Add missing nodes for X1000 and CU1000-Neo.周琰杰 (Zhou Yanjie)2-0/+116
Add I2C0/I2C1/I2C2 nodes for X1000 and add I2C0, ADS7830, MSC1, AP6212A, wlan_pwrseq nodes for CU1000-Neo. Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-15mips/vdso: Support mremap() for vDSOGuoyun Sun1-0/+13
vDSO VMA address is saved in mm_context for the purpose of using restorer from vDSO page to return to userspace after signal handling. In Checkpoint Restore in Userspace (CRIU) project we place vDSO VMA on restore back to the place where it was on the dump. Make vDSO code track the VMA address by supplying .mremap() fops the same way it's done for x86 and arm by: commit b059a453b1cf ("x86/vdso: Add mremap hook to vm_special_mapping") commit 739586951b8a ("arm64/vdso: Support mremap() for vDSO"). Signed-off-by: Guoyun Sun <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Allison Randal <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-14MIPS: ralink: dts: gardena_smart_gateway_mt7688: Limit UART1Reto Schneider1-0/+3
The radio module asserts CTS when its RX buffer has 10 bytes left. Putting just 8 instead of 16 bytes into the UART1 TX buffer on the Linux side ensures to not overflow the RX buffer on the radio module side. Signed-off-by: Reto Schneider <[email protected]> Signed-off-by: Stefan Roese <[email protected]> Cc: Paul Burton <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2020-01-14MIPS: ralink: dts: gardena_smart_gateway_mt7688: Enable WMACReto Schneider1-0/+5
This patch enables the WMAC controller on the GARDENA smart Gateway and configures the board specific factory EEPROM setting for this driver. Signed-off-by: Reto Schneider <[email protected]> Signed-off-by: Stefan Roese <[email protected]> Cc: Paul Burton <[email protected]> Cc: John Crispin <[email protected]> Cc: Felix Fietkau <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2020-01-14MIPS: ralink: dts: mt7628a.dtsi: Add WMAC DT nodeReto Schneider1-0/+10
This patch adds the WMAC controller description to the MT7628A dtsi file. Signed-off-by: Reto Schneider <[email protected]> Signed-off-by: Stefan Roese <[email protected]> Cc: Paul Burton <[email protected]> Cc: John Crispin <[email protected]> Cc: Felix Fietkau <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected]
2020-01-13tc: Make tc_match_device() staticGeert Uytterhoeven1-3/+2
Unlike its PCI counterpart, tc_match_device() was never used outside the TURBOchannel bus code. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Maciej W . Rozycki <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-13MIPS: ip22-gio: Make gio_match_device() staticGeert Uytterhoeven2-5/+3
Unlike its PCI counterpart, gio_match_device() was never used outside the GIO bus code. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-10MIPS: Loongson: Fix potential NULL dereference in loongson3_platform_init()Tiezhu Yang1-0/+3
If kzalloc fails, it should return -ENOMEM, otherwise may trigger a NULL pointer dereference. Fixes: 3adeb2566b9b ("MIPS: Loongson: Improve LEFI firmware interface") Signed-off-by: Tiezhu Yang <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Huacai Chen <[email protected]> Cc: Jiaxun Yang <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-10soc: lantiq: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-10MIPS: BPF: Use sizeof_field() instead of FIELD_SIZEOF()Kees Cook1-9/+9
The FIELD_SIZEOF() macro was redundant, and is being removed from the kernel. Since commit c593642c8be0 ("treewide: Use sizeof_field() macro") this is one of the last users of the old macro, so replace it. Signed-off-by: Kees Cook <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-10MIPS: use resource_sizeJulia Lawall1-4/+2
Use resource_size rather than a verbose computation on the end and start fields. The semantic patch that makes these changes is as follows: (http://coccinelle.lip6.fr/) <smpl> @@ struct resource ptr; @@ - (ptr.end - ptr.start + 1) + resource_size(&ptr) </smpl> Signed-off-by: Julia Lawall <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: [email protected] Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09mfd: ioc3: Add driver for SGI IOC3 chipThomas Bogendoerfer9-481/+893
SGI IOC3 chip has integrated ethernet, keyboard and mouse interface. It also supports connecting a SuperIO chip for serial and parallel interfaces. IOC3 is used inside various SGI systemboards and add-on cards with different equipped external interfaces. Support for ethernet and serial interfaces were implemented inside the network driver. This patchset moves out the not network related parts to a new MFD driver, which takes care of card detection, setup of platform devices and interrupt distribution for the subdevices. Serial portion: Acked-by: Greg Kroah-Hartman <[email protected]> Acked-for-MFD-by: Lee Jones <[email protected]> Network part: Reviewed-by: Jakub Kicinski <[email protected]> Network part: Acked-by: Jakub Kicinski <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: James Hogan <[email protected]> Cc: David S. Miller <[email protected]> Cc: Jiri Slaby <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: fix readb/writeb addressingThomas Bogendoerfer4-21/+44
Our chosen byte swapping, which is what firmware already uses, is to do readl/writel by normal lw/sw intructions (data invariance). This also means we need to mangle addresses for u8 and u16 accesses. The mangling for 16bit has been done aready, but 8bit one was missing. Correcting this causes different addresses for accesses to the SuperIO and local bus of the IOC3 chip. This is fixed by changing byte order in ioc3 and m48rtc_rtc structs. Acked-by: Alexandre Belloni <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: David S. Miller <[email protected]> Cc: Alessandro Zummo <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: PCI: Support mapping of INTB/C/D for pci-xtalk-bridgeThomas Bogendoerfer2-5/+26
Implented mapping of PCI INTB/C/D, which is needed for PCI multifunction devices, PCI-PCI bridges and IOC3. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: No need for slice_mapThomas Bogendoerfer2-6/+0
per_cpu_init is called exactly once for every CPU. So there is no need for protection via slice_map. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Store cpu speed when scanning for CPUs and use it laterThomas Bogendoerfer5-21/+5
Remember CPU speed while scanning for available CPUs to avoid looking it up a second time when printing CPU speed. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Only reserve interrupts used in LinuxThomas Bogendoerfer2-20/+1
Reduce number of reserved interrupts by removing bits copied from IRIX and not used by Linux. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Move all shared IP27 declarations to ip27-common.hThomas Bogendoerfer8-26/+19
Move all IP27 declarations into one file. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Use specific get_region_shiftThomas Bogendoerfer2-24/+20
IP35 has a different way to find out regions, so we move the IP27 implementation to IP27 specific file. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Use structs for decoding error status registersThomas Bogendoerfer1-18/+20
Convert printing of error status registers to use structs, which are defines for IP27 and IP35. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Use union instead of typedefThomas Bogendoerfer1-2/+2
The upcoming header files for SGI-IP35 shouldn't add new typedef. To be able to share ip27-hubio.c we need to access register layouts no longer via a typedef. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Split kldir.h into generic SN and IP27 partsThomas Bogendoerfer2-187/+192
SGI-IP35 uses slightly different memory layout, so we move IP27 defines to IP27 specific files and keep the common stuff in kldir.h Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: Move get_nasid() to a IP27 specific fileThomas Bogendoerfer3-16/+10
get_nasid() will be different for SGI-IP35, therefore move IP27 implementation to IP27 specific file. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: move IP27 specific macro to IP27 specific header fileThomas Bogendoerfer2-10/+12
Extracting node id from HUB register is specific to IP27 alias SN0. Move the macro definition to a SN0 header file. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: get rid of asm/sn/sn0/ip27.hThomas Bogendoerfer5-88/+3
The only piece needed in ip27.h is SEND_NMI. Move the define to the only place where it's used and remove ip27.h Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: use asm/sn/agent.h for including HUB related stuffThomas Bogendoerfer19-40/+22
By including agent.h where hub related defines/structs are needed, we have only one place to select, which agent chip (HUB or BEDROCK) is used. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: use cpu physid already present while scanning for CPUsThomas Bogendoerfer4-74/+8
By using cpu physid already present when scanning for CPUs get_cpu_slice() is unsued and can be removed together with two other then used functions. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: SGI-IP27: use nodemask instead of cpumaskThomas Bogendoerfer1-6/+6
Replication is done on a per node basis, so the use of cpumask was a misusage here. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: BPF: Restore MIPS32 cBPF JITPaul Burton4-0/+1557
Commit 716850ab104d ("MIPS: eBPF: Initial eBPF support for MIPS32 architecture.") enabled our eBPF JIT for MIPS32 kernels, whereas it has previously only been availailable for MIPS64. It was my understanding at the time that the BPF test suite was passing & JITing a comparable number of tests to our cBPF JIT [1], but it turns out that was not the case. The eBPF JIT has a number of problems on MIPS32: - Most notably various code paths still result in emission of MIPS64 instructions which will cause reserved instruction exceptions & kernel panics when run on MIPS32 CPUs. - The eBPF JIT doesn't account for differences between the O32 ABI used by MIPS32 kernels versus the N64 ABI used by MIPS64 kernels. Notably arguments beyond the first 4 are passed on the stack in O32, and this is entirely unhandled when JITing a BPF_CALL instruction. Stack space must be reserved for arguments even if they all fit in registers, and the callee is free to assume that stack space has been reserved for its use - with the eBPF JIT this is not the case, so calling any function can result in clobbering values on the stack & unpredictable behaviour. Function arguments in eBPF are always 64-bit values which is also entirely unhandled - the JIT still uses a single (32-bit) register per argument. As a result all function arguments are always passed incorrectly when JITing a BPF_CALL instruction, leading to kernel crashes or strange behavior. - The JIT attempts to bail our on use of ALU64 instructions or 64-bit memory access instructions. The code doing this at the start of build_one_insn() incorrectly checks whether BPF_OP() equals BPF_DW, when it should really be checking BPF_SIZE() & only doing so when BPF_CLASS() is one of BPF_{LD,LDX,ST,STX}. This results in false positives that cause more bailouts than intended, and that in turns hides some of the problems described above. - The kernel's cBPF->eBPF translation makes heavy use of 64-bit eBPF instructions that the MIPS32 eBPF JIT bails out on, leading to most cBPF programs not being JITed at all. Until these problems are resolved, revert the removal of the cBPF JIT performed by commit 716850ab104d ("MIPS: eBPF: Initial eBPF support for MIPS32 architecture."). Together with commit f8fffebdea75 ("MIPS: BPF: Disable MIPS32 eBPF JIT") this restores MIPS32 BPF JIT behavior back to the same state it was prior to the introduction of the broken eBPF JIT support. [1] https://lore.kernel.org/linux-mips/MWHPR2201MB13583388481F01A422CE7D66D4410@MWHPR2201MB1358.namprd22.prod.outlook.com/ Signed-off-by: Paul Burton <[email protected]> Fixes: 716850ab104d ("MIPS: eBPF: Initial eBPF support for MIPS32 architecture.") Cc: Daniel Borkmann <[email protected]> Cc: Hassan Naveed <[email protected]> Cc: Tony Ambardar <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2020-01-09MIPS: Loongson2ef: drop pointless static qualifier in loongson_suspend_enter()Mao Wenan1-1/+1
There is no need to have the 'T *v' variable static since new value always be assigned before use it. Reported-by: Hulk Robot <[email protected]> Signed-off-by: Mao Wenan <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]> Cc: <[email protected]>
2020-01-09MIPS: mm: Place per_cpu on different nodes, if NUMA is enabledThomas Bogendoerfer2-0/+53
Implement placing of per_cpu into memory, which is local to the CPU. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
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