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2014-09-18ARM: OMAP4+: Remove static iotable mappings for SRAMRajendra Nayak7-31/+27
In order to handle errata I688, a page of sram was reserved by doing a static iotable map. Now that we use gen_pool to manage sram, we can completely remove all of these static mappings and use gen_pool_alloc() to get the one page of sram space needed to implement errata I688. omap_bus_sync will be NOP until SRAM initialization happens. Suggested-by: Sekhar Nori <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Dave Gerlach <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: OMAP4+: Move SRAM data to DTRajendra Nayak7-29/+19
Use drivers/misc/sram.c driver to manage SRAM on all DT only OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of the existing private plat-omap/sram.c Address and size related data is removed from mach-omap2/sram.c and now passed to drivers/misc/sram.c from DT. Users can hence use general purpose allocator apis instead of OMAP private ones to manage and use SRAM. Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Dave Gerlach <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: AM335x: Get rid of unused sram init functionRajendra Nayak1-7/+0
Remove the empty am33xx_sram_init() function. Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Dave Gerlach <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: omap2plus_defconfig: Enable some display featuresTony Lindgren1-1/+21
Now that we have panel support for DT based booting, let's make it usable and enable most things as modules. Note that omap3 boards need also the ads7847 module for the panel that we're now changing to a loadable module. And n900 seems to require setting the brightness via sysfs for acx565akm/brightness after modprobe of panel_sony_acx565akm and omapfb. Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: omap2plus_defconfig: Enable battery and reset driversTony Lindgren1-0/+7
Since many omaps run on battery, we should have the battery drivers enabled. Let's also enable the reset driver. Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: omap2plus_defconfig: Add support for distros with systemdTony Lindgren1-2/+22
Some distros are now using systemd, so let's enable most of what's recommended at: http://cgit.freedesktop.org/systemd/systemd/tree/README Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: omap2plus_defconfig: Add cpufreq to defconfigTony Lindgren1-0/+10
Note that we can now use the CONFIG_GENERIC_CPUFREQ_CPU0, so let's only enable that. Let's use CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND as suggested by Nishant. And also let's enable thermal as explained by Nishant Menon: Many TI SoCs using Highest frequency is not really too nice of an idea for long periods of time. And not everything is upstream to support things optimially - example avs class 0, 1.5 ABB consolidation with cpufreq etc.. We definitely need thermal enabled as well for device safety needs. [[email protected]: updated per Nishant's suggestions] Acked-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: omap2plus_defconfig: Shrink with savedefconfigTony Lindgren1-16/+3
This saves few lines and makes it easier to make patches against omap2plus_defconfig. Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: OMAP3: Use manual idle for UARTs because of DMA errataTony Lindgren1-4/+4
In sprz318f.pdf "Usage Note 2.7" says that UARTs cannot acknowledge idle requests in smartidle mode when configured for DMA operations. This prevents L4 from going idle. So let's use manual idle mode instead. Otherwise systems using Sebastian's 8250 patches with DMA will never enter deeper idle states because of the errata above. Cc: Sebastian Andrzej Siewior <[email protected]> Reviewed-by: Paul Walmsley <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-18ARM: OMAP2+: Add hwmod flag for HWMOD_RECONFIG_IO_CHAINTony Lindgren3-4/+8
Commit cc824534d4fe ("ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled") fixed issues with hung UART wake-up events by calling _reconfigure_io_chain() when MUSB is connected or disconnected. As pointed out by Paul Walmsley, we may need to also call _reconfigure_io_chain() in other cases, so it should be a separate flag. Let's add HWMOD_RECONFIG_IO_CHAIN as suggested by Paul. Reviewed-by: Paul Walmsley <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-09ARM: OMAP5+: Reuse OMAP4 PM code for OMAP5 and DRA7Nishanth Menon1-4/+8
OMAP4, OMAP5 and DRA7 share a lot of common logic and data structures. These have been enabled in the previous patches, however, this also means that OMAP5 or DRA7 only builds also need to build OMAP4 logic. Update to reuse OMAP4 logic. This fixes the 'undefined reference to 'omap4_pm_init_early'' in OMAP5 or DRA7 only builds. Fixes: 6af16a1dac5465c ("ARM: DRA7: Add hook in SoC initcalls to enable pm initialization") Fixes: 628ed4717000789 ("ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization") Reported-by: Tony Lindgren <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-08ARM: dts: OMAP3+: Add PRM interruptNishanth Menon4-0/+4
Provide OMAP3, 4 and OMAP5 with interrupt number for PRM And for DRA7, provide crossbar number for prm interrupt. Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-08ARM: omap: Remove stray ARCH_HAS_OPP referencesMark Brown1-5/+0
OPP is now a normal kernel library selected by its users rather than a feature that architectures need to enable so ARCH_HAS_OPP serves no function any more - remove the selects. Signed-off-by: Mark Brown <[email protected]> Acked-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-08ARM: DRA7: Add hook in SoC initcalls to enable pm initializationRajendra Nayak2-1/+4
With consolidated code, now we can add the required hooks for DRA7 to enable power management. Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: minor modifications] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-08Merge branch 'pull/v3.18/for-omap-soc' of ↵Tony Lindgren13-64/+275
https://github.com/nmenon/linux-2.6-playground into omap-for-v3.18/soc
2014-09-08Merge branch 'pull/v3.18/powerdomain-fixes' of ↵Tony Lindgren6-16/+106
https://github.com/nmenon/linux-2.6-playground into omap-for-v3.18/fixes-not-urgent
2014-09-08ARM: OMAP5: Add hook in SoC initcalls to enable pm initializationSantosh Shilimkar2-1/+4
With consolidated code, now we can add the required hooks for OMAP5 to enable power management. Signed-off-by: Santosh Shilimkar <[email protected]> [[email protected]: minor rebase updates] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: OMAP5 / DRA7: Enable CPU RET on suspendRajendra Nayak4-3/+17
On OMAP5 / DRA7, prevent a CPU powerdomain OFF and resulting MPU OSWR and instead attempt a CPU RET and side effect, MPU RET in suspend. NOTE: the hardware was originally designed to be capable of achieving deep power states such as OFF and OSWR, however due to various issues and risks, deepest valid state was determined to be CSWR - hence we use the errata framework to handle this case. Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: updates] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplugSantosh Shilimkar1-6/+8
Dont assume that all OMAP4+ code will be able to use OMAP4 hotplug logic. On OMAP5, DRA7, we do not need this in place yet, also, currently the CPU startup pointer is located in omap4_cpu_pm_info instead of cpu_pm_ops. So, isolate the function to hotplug_restart pointer in cpu_pm_ops where it should have belonged, initalize them as per valid startup pointers for OMAP4430/60 as in current logic, however provide dummy_cpu_resume to be the startup location as well. Signed-off-by: Santosh Shilimkar <[email protected]> [[email protected]: split this out of original code and isolate it] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: OMAP5 / DRA7: PM: Avoid all SAR savesRajendra Nayak1-21/+34
Get rid of all assumptions about always having a sar base on *all* OMAP4+ platforms. We dont need one on DRA7 and it is not necessary at this point for OMAP5 either. Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: Split and optimize] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomainsSantosh Shilimkar1-0/+16
In addition to the standard power-management technique, the OMAP5 / DRA7 MPU subsystem also employs an SR3-APG (mercury) power management technology to reduce leakage. It allows for full logic and memories retention on MPU_C0 and MPU_C1 and is controlled by the PRCM_MPU. Only "Fast-mode" is supported on the OMAP5 and DRA7 family of processors. Signed-off-by: Santosh Shilimkar <[email protected]> [[email protected]: minor consolidation] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by defaultSantosh Shilimkar3-0/+19
Enables MPUSS ES2 power management mode using ES2_PM_MODE in AMBA_IF_MODE register. 0x0: OMAP5 ES1 behavior, CPU cores would enter and exit OFF mode together. Broken! Fortunately, we do not support this anymore. 0x1: OMAP5 ES2, DRA7 behavior, CPU cores are allowed to enter/exit OFF mode independently. This is one time settings thanks to always ON domain. Signed-off-by: Santosh Shilimkar <[email protected]> [[email protected]: minor conflict resolutions, consolidation for DRA7] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependencySantosh Shilimkar1-3/+33
With EMIF clock-domain put under hardware supervised control, memory corruption and untraceable crashes are observed on OMAP5. Further investigation revealed that there is a weakness in the PRCM on this specific dynamic depedency. The recommendation is to set MPUSS static dependency towards EMIF clock-domain to avoid issues. This recommendation holds good for DRA7 family of devices as well. Signed-off-by: Santosh Shilimkar <[email protected]> [[email protected]: DRA7] Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: conflict resolution, dra7] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: OMAP5 / DRA7: PM: Update CPU context register offsetSantosh Shilimkar1-4/+9
On OMAP5, RM_CPUi_CPUi_CONTEXT offset has changed. Update the code so that same code works for OMAP4+ devices. DRA7 and OMAP5 have the same context offset as well. Signed-off-by: Santosh Shilimkar <[email protected]> [[email protected]: for DRA7] Signed-off-by: Rajendra Nayak <[email protected]> [[email protected]: rebase, split/merge etc..] Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Tested-by: Kevin Hilman <[email protected]>
2014-09-08ARM: AM437x: use pdata quirks for pinctrl informationKeerthy1-0/+3
Provide pdata-quirks for Am437x processor family. Signed-off-by: Keerthy <[email protected]>
2014-09-08ARM: DRA7: use pdata quirks for pinctrl informationNishanth Menon1-0/+3
Provide pdata-quirks for DRA7 processor family. Signed-off-by: Nishanth Menon <[email protected]>
2014-09-08ARM: OMAP5: use pdata quirks for pinctrl informationNishanth Menon1-0/+4
Provide pdata-quirks for OMAP5 processor family. Signed-off-by: Nishanth Menon <[email protected]>
2014-09-08ARM: OMAP4+: PM: Use only valid low power state for CPU hotplugNishanth Menon1-0/+4
Not all SoCs support OFF mode - for example DRA74/72. So, use valid power state during CPU hotplug. Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP4+: PM: use only valid low power state for suspendNishanth Menon1-2/+4
We are using power domain state as RET and logic state as OFF. This state is OSWR. This may not always be supported on ALL power domains. In fact, on certain power domains, this might result in a hang on certain platforms. Instead, depend on powerdomain data to provide accurate information about the supported powerdomain states and use the appropriate function to query and use it as part of suspend path. Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP4+: PM: Make logic state programmableNishanth Menon1-1/+4
Move the logic state as different for each power domain. This allows us to customize the deepest power state we should target over all for each powerdomain in the follow on patches. Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP2+: powerdomain: introduce logic for finding valid power domainNishanth Menon2-0/+79
powerdomain configuration in OMAP is done using PWRSTCTRL register for each power domain. However, PRCM lets us write any value we'd like to the logic and power domain target states, however the SoC integration tends to actually function only at a few discrete states. These valid states are already in our powerdomains_xxx_data.c file. So, provide a function to easily query valid low power state that the power domain is allowed to go to. Based on work originally done by Jean Pihet <[email protected]> https://patchwork.kernel.org/patch/1325091/ . There is no attempt to create a new powerdomain solution here, except fixing issues seen attempting invalid programming attempts. Future consolidation to the generic powerdomain framework should consider this requirement as well. Similar solutions have been done in product kernels in the past such as: https://android.googlesource.com/kernel/omap.git/+blame/android-omap-panda-3.0/arch/arm/mach-omap2/pm44xx.c Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdmsNishanth Menon1-1/+2
No need to invoke callback when the clkdm pointer is NULL. Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP5: powerdomain data: fix powerdomain powerstateNishanth Menon1-6/+6
Update the power domain power states for final production chip capability. OFF mode, OSWR etc have been descoped for various domains. Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP: DRA7: powerdomain data: fix powerdomain powerstateNishanth Menon2-7/+8
DRA7 supports only CSWR for CPU, MPU power domains. Core power domain supports upto INA. Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kevin Hilman <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP3+: PRM: register interrupt information from DTNishanth Menon1-0/+18
Allow the PRM interrupt information to be picked up from device tree. OMAP3 may use legacy boot and needs to be compatible with old dtbs (without interrupt populated), for these, we use the value which is pre-populated. Signed-off-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP4+: PRM: Enable wakeup capability for OMAP5, DRA7Nishanth Menon1-1/+1
OMAP5 and DRA7 can now use pinctrl based I/O daisychain wakeup capability. So, enable the support. Signed-off-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP4+: PRM: remove "wkup" eventNishanth Menon1-1/+0
"wkup" event at bit offset 0 exists only on OMAP3. OMAP4430/60 PRM_IRQSTATUS_A9, OMAP5/DRA7 PRM_IRQSTATUS_MPU register bit 0 is DPLL_CORE_RECAL_ST not wakeup event like OMAP3. The same applies to AM437x as well. Remove the wrong definition. Signed-off-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP4+: PRM: register interrupt information from DTNishanth Menon1-0/+40
Allow the PRM interrupt information to be picked up from device tree. the only exception is for OMAP4 which uses values pre-populated and allows compatibility with older dtb. Signed-off-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP4: PRM: use the generic prm_inst to allow logic to be abstractedNishanth Menon1-9/+38
use the generic function to pick up the prm_instance for a generic logic which can be reused from OMAP4+ Signed-off-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-08ARM: OMAP4+: prminst: provide function to find prm_dev instance offsetNishanth Menon2-15/+28
PRM device instance can vary depending on SoC. We already handle the same during reset of the device, However, this is also needed for other logic instances. So, first abstract this out to a generic function. Signed-off-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]>
2014-09-03ARM: dts: am335x-bone*: Fix model name and update compatibility informationNishanth Menon3-3/+10
Beaglebone white and beaglebone black differ in tiny little aspects. This is the reason why we maintain seperate dts for these platforms. However, there is no real way to decode from dtb which platform it is since compatible and model name are the same for both platforms. Fix this so that beaglebone black and beaglebone are identifiable, while maintaining compatibility for older zImages which might use old beaglebone compatible flag for black as well. Reported-by: Tom Rini <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-09-03ARM: dts: omap4-panda: Fix model and SoC family detailsNishanth Menon3-3/+10
Currently we claim that omap4-panda and omap4-panda-es are essentially the same, but they are not since PandaBoard-ES uses OMAP4460 and PandaBoard uses OMAP4430. So, split the common definition and make the model name available. Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-08-31Linux 3.17-rc3Linus Torvalds1-1/+1
2014-08-31Merge tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linuxLinus Torvalds24-217/+497
Pull Xtensa updates from Chris Zankel: "Xtensa improvements for 3.17: - support highmem on cores with aliasing data cache. Enable highmem on kc705 by default - simplify addition of new core variants (no need to modify Kconfig / Makefiles) - improve robustness of unaligned access handler and its interaction with window overflow/underflow exception handlers - deprecate atomic and spill registers syscalls - clean up Kconfig: remove orphan MATH_EMULATION, sort 'select' statements - wire up renameat2 syscall. Various fixes: - fix address checks in dma_{alloc,free}_coherent (runtime BUG) - fix access to THREAD_RA/THREAD_SP/THREAD_DS (debug build breakage) - fix TLBTEMP_BASE_2 region handling in fast_second_level_miss (runtime unrecoverable exception) - fix a6 and a7 handling in fast_syscall_xtensa (runtime userspace register clobbering) - fix kernel/user jump out of fast_unaligned (potential runtime unrecoverabl exception) - replace termios IOCTL code definitions with constants (userspace build breakage)" * tag 'xtensa-20140830' of git://github.com/czankel/xtensa-linux: (25 commits) xtensa: deprecate fast_xtensa and fast_spill_registers syscalls xtensa: don't allow overflow/underflow on unaligned stack xtensa: fix a6 and a7 handling in fast_syscall_xtensa xtensa: allow single-stepping through unaligned load/store xtensa: move invalid unaligned instruction handler closer to its users xtensa: make fast_unaligned store restartable xtensa: add double exception fixup handler for fast_unaligned xtensa: fix kernel/user jump out of fast_unaligned xtensa: configure kc705 for highmem xtensa: support highmem in aliasing cache flushing code xtensa: support aliasing cache in kmap xtensa: support aliasing cache in k[un]map_atomic xtensa: implement clear_user_highpage and copy_user_highpage xtensa: fix TLBTEMP_BASE_2 region handling in fast_second_level_miss xtensa: allow fixmap and kmap span more than one page table xtensa: make fixmap region addressing grow with index xtensa: fix access to THREAD_RA/THREAD_SP/THREAD_DS xtensa: add renameat2 syscall xtensa: fix address checks in dma_{alloc,free}_coherent xtensa: replace IOCTL code definitions with constants ...
2014-08-31unicore32: Fix build errorGuenter Roeck1-4/+5
unicore32 builds fail with arch/unicore32/kernel/signal.c: In function ‘setup_frame’: arch/unicore32/kernel/signal.c:257: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c:279: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c: In function ‘handle_signal’: arch/unicore32/kernel/signal.c:306: warning: unused variable ‘tsk’ arch/unicore32/kernel/signal.c: In function ‘do_signal’: arch/unicore32/kernel/signal.c:376: error: implicit declaration of function ‘get_signsl’ make[1]: *** [arch/unicore32/kernel/signal.o] Error 1 make: *** [arch/unicore32/kernel/signal.o] Error 2 Bisect points to commit 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()"). This code never even compiled. Reverting the patch does not work, since previously used functions no longer exist, so try to fix it up. Compile tested only. Fixes: 649671c90eaf ("unicore32: Use get_signal() signal_setup_done()") Cc: Richard Weinberger <[email protected]> Signed-off-by: Guenter Roeck <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2014-08-31Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds10-39/+37
Pull ARM fixes from Russell King: "Various assorted fixes: - a couple of patches from Mark Rutland to resolve an errata with Cortex-A15 CPUs. - fix cpuidle for the CPU part ID changes in the last merge window - add support for a relocation which ARM binutils is generating in some circumstances" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8130/1: cpuidle/cpuidle-big_little: fix reading cpu id part number ARM: 8129/1: errata: work around Cortex-A15 erratum 830321 using dummy strex ARM: 8128/1: abort: don't clear the exclusive monitors ARM: 8127/1: module: add support for R_ARM_TARGET1 relocations
2014-08-31Merge tag 'fixes-for-linus' of ↵Linus Torvalds29-464/+133
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Here's the weekly batch of fixes from arm-soc. The delta is a largeish negative delta, due to revert of SMP support for Broadcom's STB SoC -- it was accidentally merged before some issues had been addressed, so they will make a new attempt for 3.18. I didn't see a need for a full revert of the whole platform due to this, we're keeping the rest enabled. The rest is mostly: - a handful of DT fixes for i.MX (Hummingboard/Cubox-i in particular) - some MTD/NAND fixes for OMAP - minor DT fixes for shmobile - warning fix for UP builds on vexpress/spc There's also a couple of patches that wires up hwmod on TI's DRA7 SoC so it can boot. Drivers and the rest had landed for 3.17, and it's small and isolated so it made sense to pick up now even if it's not a bugfix" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits) vexpress/spc: fix a build warning on array bounds ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants MAINTAINERS: catch special Rockchip code locations ARM: dts: microsom-ar8035: MDIO pad must be set open drain ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates ARM: brcmstb: revert SMP support ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled ARM: dts: Enable UART wake-up events for beagleboard ARM: dts: Remove twl6030 clk32g "regulator" ARM: OMAP2+: omap_device: remove warning that clk alias already exists ARM: OMAP: fix %d confusingly prefixed with 0x in format string ARM: dts: DRA7: fix interrupt-cells for GPIO mtd: nand: omap: Fix 1-bit Hamming code scheme, omap_calculate_ecc() ARM: dts: omap3430-sdp: Revert to using software ECC for NAND ARM: OMAP2+: GPMC: Support Software ECC scheme via DT mtd: nand: omap: Revert to using software ECC by default ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptive ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configuration ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR ...
2014-08-31vexpress/spc: fix a build warning on array boundsAlex Shi1-3/+11
With ARCH_VEXPRESS_SPC option, kernel build has the following warning: arch/arm/mach-vexpress/spc.c: In function ‘ve_spc_clk_init’: arch/arm/mach-vexpress/spc.c:431:38: warning: array subscript is below array bounds [-Warray-bounds] struct ve_spc_opp *opps = info->opps[cluster]; ^ since 'cluster' maybe '-1' in UP system. This patch does a active checking to fix this issue. Signed-off-by: Alex Shi <[email protected]> Acked-by: Pawel Moll <[email protected]> Acked-by: Sudeep Holla <[email protected]> Signed-off-by: Olof Johansson <[email protected]>
2014-08-31Merge tag 'for-v3.17-rc/omap-dra72x-d74x-support-a' of ↵Olof Johansson3-2/+29
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes Pull "ARM: OMAP2+: DRA72x/DRA74x basic support" from Tony Lindgren: Add basic subarchitecture support for the DRA72x and DRA74x. These are OMAP2+ derivative SoCs. This should be low-risk to existing OMAP platforms. Basic build, boot, and PM test logs are available here: http://www.pwsan.com/omap/testlogs/hwmod-a-early-v3.17-rc/20140827194314/ * tag 'for-v3.17-rc/omap-dra72x-d74x-support-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending: ARM: DRA7: hwmod: Add dra74x and dra72x specific ocp interface lists ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() variants Signed-off-by: Olof Johansson <[email protected]>
2014-08-31Merge tag 'spi-v3.17-rc3-2' of ↵Linus Torvalds11-82/+121
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi bugfixes from Mark Brown: "A smattering of bug fixes for the SPI subsystem, all in driver code which has seen active work recently and none of them with any great global impact. There's also a new ACPI ID for the pxa2xx driver which required no code changes and the addition of kerneldoc for some structure fields that were missing it and generating warnings during documentation builds as a result" * tag 'spi-v3.17-rc3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: sh-msiof: Fix transmit-only DMA transfers spi/rockchip: Avoid accidentally turning off the clock spi: dw: fix kernel crash due to NULL pointer dereference spi: dw-pci: fix bug when regs left uninitialized spi: davinci: fix SPI_NO_CS functionality spi/rockchip: fixup incorrect dma direction setting spi/pxa2xx: Add ACPI ID for Intel Braswell spi: spi-au1550: fix build failure spi: rspi: Fix leaking of unused DMA descriptors spi: sh-msiof: Fix leaking of unused DMA descriptors spi: Add missing kerneldoc bits spi/omap-mcspi: Fix the spi task hangs waiting dma_rx
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