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2022-07-07drm: rcar-du: Drop file name from comment header blocksLaurent Pinchart24-24/+24
The comment blocks at the beginning of each file have a one-line summary description of the file that includes the file name. While the description is useful, the file name only creates opportunities for mistakes (as seen in rcar_du_vsp.c) without any added value. Drop it. Reported-by: Biju Das <[email protected]> Suggested-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Kieran Bingham <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2022-07-07drm: rcar-du: Extend CMM HDSE documentationKieran Bingham1-0/+5
When the CMM is enabled, the HDSE offset is further adjusted to compensate for consumed pixels. Explain this further, with an extra comment at the point the offset is adjusted. Suggested-by: Laurent Pinchart <[email protected]> Signed-off-by: Kieran Bingham <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2022-07-01Merge tag 'drm-misc-next-2022-06-30' of ↵Dave Airlie75-565/+3245
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.20: UAPI Changes: * fourcc: Update documentation Cross-subsystem Changes: * iosys-map: Rework iosys_map_{rd,wr} for improved performance * vfio: Use aperture helpers Core Changes: * aperture: Export for use with other subsystems * connector: Remove deprecated ida_simple_get() * crtc: Add helper with general state checks, convert drivers * format-helper: Add Kunit tests for RGB32 to RGB8 Driver Changes: * ast: Fix black screen on resume * bridge: tc358767: Simplify DSI lane handling * mcde: Fix ref-count leak * mxsfb/lcdif: Support i.MX8MP LCD controller * stm/ltdc: Support dynamic Z order; Support mirroring; Fixes and cleanups * vc4: Many small fixes throughout the driver Signed-off-by: Dave Airlie <[email protected]> # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEchf7rIzpz2NEoWjlaA3BHVMLeiMFAmK9TnYACgkQaA3BHVML # eiMJcgf+JsGWlFutkxlJCEUDKTXk6BYHQL4czyskDvpBoLrdU1tyrAfKKtqP5k+0 # SMvS6h1CFa/fSUCYpbdpJ6ER1fZ9r19WdgoPTBc4b97/uQTOJDzd5zuHDiJZquwC # O6HD/rptUzPFe6HJuY2cYVtwMlWb2NhITMHfctgyeQJSMK8TwoU1bDVFftwxaWFt # ISscTz0enn38sCjEarSpyKkBCinuaWDcpe5BI2Dp3imkDWR3ktzuh4B11QWS0DKs # Q/FLGTEl1sDrV7r93WiA5BIAPVwNMm1Pl0syd1p42SNLNnv0gcap4GL6qni4h9Ev # P/3fIInor/Sht8fyhlFsOUA8k2x7MA== # =6NoJ # -----END PGP SIGNATURE----- # gpg: Signature made Thu 30 Jun 2022 17:19:18 AEST # gpg: using RSA key 7217FBAC8CE9CF6344A168E5680DC11D530B7A23 # gpg: Can't check signature: No public key From: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/Yr1On+eT1mCvIMzW@linux-uq9g
2022-06-29iosys-map: Add per-word writeLucas De Marchi1-9/+29
Like was done for read, provide the equivalent for write. Even if current users are not in the hot path, this should future-proof it. v2: - Remove default from _Generic() - callers wanting to write more than u64 should use iosys_map_memcpy_to() - Add WRITE_ONCE() cases dereferencing the pointer when using system memory v3: - Fix precedence issue when casting inside WRITE_ONCE(). By not using () around vaddr__ the offset was not part of the cast, but rather added to it, producing a wrong address - Remove compiletime_assert() as WRITE_ONCE() already contains it Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Reviewed-by: Christian König <[email protected]> # v1 Reviewed-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-29iosys-map: Add per-word readLucas De Marchi1-9/+33
Instead of always falling back to memcpy_fromio() for any size, prefer using read{b,w,l}(). When reading struct members it's common to read individual integer variables individually. Going through memcpy_fromio() for each of them poses a high penalty. Employ a similar trick as __seqprop() by using _Generic() to generate only the specific call based on a type-compatible variable. For a pariticular i915 workload producing GPU context switches, __get_engine_usage_record() is particularly hot since the engine usage is read from device local memory with dgfx, possibly multiple times since it's racy. Test execution time for this test shows a ~12.5% improvement with DG2: Before: nrepeats = 1000; min = 7.63243e+06; max = 1.01817e+07; median = 9.52548e+06; var = 526149; After: nrepeats = 1000; min = 7.03402e+06; max = 8.8832e+06; median = 8.33955e+06; var = 333113; Other things attempted that didn't prove very useful: 1) Change the _Generic() on x86 to just dereference the memory address 2) Change __get_engine_usage_record() to do just 1 read per loop, comparing with the previous value read 3) Change __get_engine_usage_record() to access the fields directly as it was before the conversion to iosys-map (3) did gave a small improvement (~3%), but doesn't seem to scale well to other similar cases in the driver. Additional test by Chris Wilson using gem_create from igt with some changes to track object creation time. This happens to accidentally stress this code path: Pre iosys_map conversion of engine busyness: lmem0: Creating 262144 4KiB objects took 59274.2ms Unpatched: lmem0: Creating 262144 4KiB objects took 108830.2ms With readl (this patch): lmem0: Creating 262144 4KiB objects took 61348.6ms s/readl/READ_ONCE/ lmem0: Creating 262144 4KiB objects took 61333.2ms So we do take a little bit more time than before the conversion, but that is due to other factors: bringing the READ_ONCE back would be as good as just doing this conversion. v2: - Remove default from _Generic() - callers wanting to read more than u64 should use iosys_map_memcpy_from() - Add READ_ONCE() cases dereferencing the pointer when using system memory v3: - Fix precedence issue when casting inside READ_ONCE(). By not using () around vaddr__ the offset was not part of the cast, but rather added to it, producing a wrong address - Remove compiletime_assert() as READ_ONCE() already contains it Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Christian König <[email protected]> # v1 Reviewed-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-29drm: lcdif: Add support for i.MX8MP LCDIF variantMarek Vasut7-1/+1144
Add support for i.MX8MP LCDIF variant. This is called LCDIFv3 and is completely different from the LCDIFv3 found in i.MX23 in that it has a completely scrambled register layout compared to all previous LCDIF variants. The new LCDIFv3 also supports 36bit address space. Add a separate driver which is really a fork of MXSFB driver with the i.MX8MP LCDIF variant handling filled in. Tested-by: Alexander Stein <[email protected]> Tested-by: Martyn Welch <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Cc: Alexander Stein <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Lucas Stach <[email protected]> Cc: Peng Fan <[email protected]> Cc: Robby Cai <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: Stefan Agner <[email protected]> Reviewed-by: Lucas Stach <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-29dt-bindings: lcdif: Add compatible for i.MX8MPMarek Vasut1-0/+1
Add compatible string for i.MX8MP LCDIF variant. This is called LCDIFv3 and is completely different from the LCDIFv3 found in i.MX23 in that it has a completely scrambled register layout compared to all previous LCDIF variants. The new LCDIFv3 also supports 36bit address space. However, except for the complete bit reshuffling, this is still LCDIF and it still works like one. Acked-by: Rob Herring <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Cc: Alexander Stein <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Lucas Stach <[email protected]> Cc: Peng Fan <[email protected]> Cc: Rob Herring <[email protected]> Cc: Robby Cai <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: Stefan Agner <[email protected]> Cc: [email protected] Reviewed-by: Lucas Stach <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-29drm/bridge: tc358767: Do not cache dsi_lanes twiceMarek Vasut1-4/+2
The DSI lane count can be accessed via the dsi device pointer, make use of that. No functional change. Signed-off-by: Marek Vasut <[email protected]> Cc: Andrzej Hajda <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Lucas Stach <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Robert Foss <[email protected]> Cc: Sam Ravnborg <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-28drm/display/selftests: drop extra word 'for' in comments for MST selftestsJiang Jian1-1/+1
there is an unexpected word 'for' in the comments that need to be dropped file - ./drivers/gpu/drm/selftests/test-drm_dp_mst_helper.c line - 3 * Test cases for for the DRM DP MST helpers changed to: * Test cases for the DRM DP MST helpers Signed-off-by: Jiang Jian <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Lyude Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-28drm/vc4: hdmi: Move pixel doubling from Pixelvalve to HDMI blockDave Stevenson2-7/+31
With the change to 2 pixels/clock, the pixel doubling in the PV results in doubling each pair of pixels, ie ABABCDCD instead of AABBCCDD. Move the pixel doubling to the HDMI block, however this means that DBLCLK modes now fall foul of requiring even values for all the horizontal timing parameters. As both 480i and 576i fail this, attempt to fix up DBLCLK modes that have odd timings values. Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Correct HDMI timing registers for interlaced modesDave Stevenson1-4/+4
For interlaced modes the timings were not being correctly programmed into the HDMI block, so correct them. Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Force modeset when bpc or format changesDom Cobley1-1/+11
Whenever the maximum BPC is changed, vc4_hdmi_encoder_compute_config() might pick up a different BPC or format depending on the display capabilities. That change will have a number of side effects, including the clock rates and whether the scrambling is enabled. However, only drm_crtc_state.connectors_changed will be set to true, since that properly only affects the connector. This means that while drm_atomic_crtc_needs_modeset() will return true, and thus drm_atomic_helper_commit_modeset_enables() will call our encoder atomic_enable() hook, mode_changed will be false. So crtc_set_mode() will not call our encoder .atomic_mode_set() hook. We use this hook in vc4 to set the vc4_hdmi_connector_state.output_bpc (and output_format), and will then reuse the value in .atomic_enable() to select whether or not scrambling should be enabled. However, since our clock rate is pre-computed during .atomic_check(), we end up with the clocks properly configured, but the scrambling disabled, leading to a blank screen. Let's set mode_changed to true in our HDMI driver to force the update of output_bpc, and thus prevent the issue entirely. Fixes: ba8c0faebbb0 ("drm/vc4: hdmi: Enable 10/12 bpc output") Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Fix timings for interlaced modesMateusz Kwiatkowski2-9/+10
Increase the number of post-sync blanking lines on odd fields instead of decreasing it on even fields. This makes the total number of lines properly match the modelines. Additionally fix the value of PV_VCONTROL_ODD_DELAY, which did not take pixels_per_clock into account, causing some displays to invert the fields when driven by bcm2711. Fixes: 682e62c45406 ("drm/vc4: Fix support for interlaced modes on HDMI.") Signed-off-by: Mateusz Kwiatkowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Report that 3d/stereo is allowedDom Cobley1-0/+1
Our HDMI controllers supports Stereo output so let's enable it. Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Add MISC_CONTROL register for vc4Dave Stevenson1-0/+1
The MISC_CONTROL register allows configuration of pixel repetition for pixel doubling in the HDMI block instead of PixelValve. It was already defined for vc5, so add it for vc4. Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Add HDMI format detection registers to register listDave Stevenson1-0/+30
The block can detect what the incoming image timings are for debug purposes. Add them to the list of registers understood by the driver to allow easy dumping of the values. Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Remove VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUTDom Cobley1-3/+0
This bit ensures data island packets are never generated when disallowed by HDCP. As no Pi boards support HDCP this is providing an unnecessary restriction Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Skip writes to disabled packet RAMDom Cobley2-1/+12
This path actually occurs when audio is started during a hdmi mode set. As the data will be written by vc4_hdmi_set_infoframes when packet RAM is enabled again, don't treat as an error Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Stop checking for enabled output in audioDom Cobley2-33/+3
The current HDMI driver, in vc4_hdmi_audio_can_stream() checks whether the display output is enabled. This has been there in one form or the other since the introduction of the audio support in the VC4 HDMI driver in commit bb7d78568814 ("drm/vc4: Add HDMI audio support"), but no justification for this check is in the commit message, or in the discussions around the patches. One can only assume this was done to prevent a user from playing audio on the ALSA soundcard when the monitor doesn't support it. However, this is causing some issues. Indeed, Kodi, for example, was hitting some errors if it was streaming audio during a modeset. With the theory above, it does make sense, but the display and audio threads are typically completely different processes with no opportunity to synchronise which makes it hard to workaround. Removing that check also doesn't seem to cause any trouble, so let's just remove it. Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Move HDMI reset to pm_resumeDave Stevenson1-19/+22
The BCM2835-37 found in the RaspberryPi 0 to 3 have a power domain attached to the HDMI block, handled in Linux through runtime_pm. That power domain is shared with the VEC block, so even if we put our runtime_pm reference in the HDMI driver it would keep being on. If the VEC is disabled though, the power domain would be disabled and we would lose any initialization done in our bind implementation. That initialization involves calling the reset function and initializing the CEC registers. Let's move the initialization to our runtime_resume implementation so that we initialize everything properly if we ever need to. Fixes: c86b41214362 ("drm/vc4: hdmi: Move the HSM clock enable to runtime_pm") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Switch to pm_runtime_status_suspendedDave Stevenson1-2/+2
If the controller isn't clocked or its domain powered up, the register accesses will either stall the CPU or return garbage, respectively. Thus, we had a warning in our register access function to complain when that kind of risky accesses were performed. In order to check the runtime_pm power state, we were using pm_runtime_active(), but it turns out that it will become active only once the runtime_resume hook has been executed. This prevents us from doing any WARN-free register access in our runtime_resume() implementation, while this is valid. Let's switch to pm_runtime_status_suspended() instead. Fixes: 14e193b95604 ("drm/vc4: hdmi: Warn if we access the controller while disabled") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Reset HDMI MISC_CONTROL registerDave Stevenson2-0/+11
The HDMI block can repeat pixels for double clocked modes, and the firmware is now configuring the block to do this as the PV is doing it incorrectly when at 2pixels/clock. If the kernel doesn't reset it then we end up with strange modes. Reset MISC_CONTROL. Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Avoid full hdmi audio fifo writesDom Cobley1-4/+4
We are getting occasional VC4_HD_MAI_CTL_ERRORF in HDMI_MAI_CTL which seem to correspond with audio dropouts. Reduce the threshold where we deassert DREQ to avoid the fifo overfilling Fixes: bb7d78568814 ("drm/vc4: Add HDMI audio support") Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Clear unused infoframe packet RAM registersDom Cobley1-1/+10
Using a hdmi analyser the bytes in packet ram registers beyond the length were visible in the infoframes and it flagged the checksum as invalid. Zeroing unused words of packet RAM avoids this Fixes: 21317b3fba54 ("drm/vc4: Set up the AVI and SPD infoframes.") Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Add all the vc5 HDMI registers into the debugfs dumpsDave Stevenson2-0/+47
The vc5 HDMI registers hadn't been added into the debugfs register sets, therefore weren't dumped on request. Add them in. Fixes: 8323989140f3 ("drm/vc4: hdmi: Support the BCM2711 HDMI controllers") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hdmi: Disable audio if dmas property is present but emptyPhil Elwell1-3/+3
The dmas property is used to hold the dmaengine channel used for audio output. Older device trees were missing that property, so if it's not there we disable the audio output entirely. However, some overlays have set an empty value to that property, mostly to workaround the fact that overlays cannot remove a property. Let's add a test for that case and if it's empty, let's disable it as well. Cc: <[email protected]> Signed-off-by: Phil Elwell <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dsi: Add correct stop condition to vc4_dsi_encoder_disable iterationDave Stevenson1-0/+3
vc4_dsi_encoder_disable is partially an open coded version of drm_bridge_chain_disable, but it missed a termination condition in the loop for ->disable which meant that no post_disable calls were made. Add in the termination clause. Fixes: 033bfe7538a1 ("drm/vc4: dsi: Fix bridge chain handling") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dsi: Fix dsi0 interrupt supportDave Stevenson1-26/+85
DSI0 seemingly had very little or no testing as a load of the register mappings were incorrect/missing, so host transfers always timed out due to enabling/checking incorrect bits in the interrupt enable and status registers. Fixes: 4078f5757144 ("drm/vc4: Add DSI driver") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dsi: Register dsi0 as the correct vc4 encoder typeDave Stevenson1-1/+2
vc4_dsi was registering both dsi0 and dsi1 as VC4_ENCODER_TYPE_DSI1 which seemed to work OK for a single DSI display, but fails if there are two DSI displays connected. Update to register the correct type. Fixes: 4078f5757144 ("drm/vc4: Add DSI driver") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dsi: Correct pixel order for DSI0Dave Stevenson1-1/+2
For slightly unknown reasons, dsi0 takes a different pixel format to dsi1, and that has to be set in the pixel valve. Amend the setup accordingly. Fixes: a86773d120d7 ("drm/vc4: Add support for feeding DSI encoders from the pixel valve.") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dsi: Correct DSI divider calculationsDave Stevenson1-4/+2
The divider calculations tried to find the divider just faster than the clock requested. However if it required a divider of 7 then the for loop aborted without handling the "error" case, and could end up with a clock lower than requested. The integer divider from parent PLL to DSI clock is also capable of going up to /255, not just /7 that the driver was trying. This allows for slower link frequencies on the DSI bus where the resolution permits. Correct the loop so that we always have a clock greater than requested, and covering the whole range of dividers. Fixes: 86c1b9eff3f2 ("drm/vc4: Adjust modes in DSI to work around the integer PLL divider.") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dsi: Release workaround buffer and DMADave Stevenson1-1/+28
On Pi0-3 the driver allocates a buffer and requests a DMA channel because the ARM can't write to DSI1's registers directly. However, we never release that buffer or channel. Let's add a device-managed action to release each. Fixes: 4078f5757144 ("drm/vc4: Add DSI driver") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dpi: Ensure a default format is selectedDave Stevenson1-3/+5
In a couple of error/incomplete configuration cases, the DPI_FORMAT bits wouldn't get set. Enforce our RGB888 default in all these cases. Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dpi: Add option for inverting pixel clock and output enableDave Stevenson1-28/+38
DRM provides flags for inverting pixel clock and output enable signals, but these were not mapped to the relevant registers. Add those mappings. Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: dpi: Add support for composite syncs to vc4_dpiDave Stevenson1-9/+16
The hardware can combine H&V syncs onto the output enable line as composite syncs, so add the relevant configuration to do that. Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: hvs: Add debugfs node that dumps the current display listsDave Stevenson1-0/+42
This allows easy analysis of display lists when debugging. Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: plane: Add alpha_blend_mode property to each plane.Dave Stevenson1-13/+49
Move from only supporting the default of pre-multiplied alpha to supporting user specified blend mode using the standardised property. Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: plane: Fix margin calculations for the right/bottom edgesDave Stevenson1-4/+4
The current plane margin calculation code clips the right and bottom edges of the range based using the left and top margins. This is obviously wrong, so let's fix it. Fixes: 666e73587f90 ("drm/vc4: Take margin setup into account when updating planes") Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: plane: Remove subpixel positioning checkDom Cobley1-13/+9
There is little harm in ignoring fractional coordinates (they just get truncated). Without this: modetest -M vc4 -F tiles,gradient -s 32:1920x1080-60 -P89@74:1920x1080*.1.1@XR24 is rejected. We have the same issue in Kodi when trying to use zoom options on video. Note: even if all coordinates are fully integer. e.g. src:[0,0,1920,1080] dest:[-10,-10,1940,1100] it will still get rejected as drm_atomic_helper_check_plane_state uses drm_rect_clip_scaled which transforms this to fractional src coords Fixes: 21af94cf1a4c ("drm/vc4: Add support for scaling of display planes.") Signed-off-by: Dom Cobley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/vc4: kms: Use maximum FIFO load for the HVS clock rateMaxime Ripard1-1/+3
The core clock computation takes into account both the load due to the input (ie, planes) and its output (ie, encoders). However, while the input load needs to consider all the planes, and thus sum all of their associated loads, the output happens mostly in parallel. Therefore, we need to consider only the maximum of all the output loads, and not the sum like we were doing. This resulted in a clock rate way too high which could be discarded for being too high by the clock framework. Since recent changes, the clock framework will even downright reject it, leading to a core clock being too low for its current needs. Fixes: 16e101051f32 ("drm/vc4: Increase the core clock based on HVS load") Signed-off-by: Maxime Ripard <[email protected]> Reviewed-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-06-28drm/vc4: kms: Warn if clk_set_min_rate failsMaxime Ripard1-2/+2
We currently ignore the clk_set_min_rate return code assuming it would succeed. However, it can fail if we ask for a rate higher than the current maximum for example. Since we can't fail in atomic_commit, at least warn on failure. Signed-off-by: Maxime Ripard <[email protected]> Reviewed-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-06-28drm/vc4: drv: Adopt the dma configuration from the HVS or V3D componentDave Stevenson1-0/+19
vc4_drv isn't necessarily under the /soc node in DT as it is a virtual device, but it is the one that does the allocations. The DMA addresses are consumed by primarily the HVS or V3D, and those require VideoCore cache alias address mapping, and so will be under /soc. During probe find the a suitable device node for HVS or V3D, and adopt the DMA configuration of that node. Cc: <[email protected]> Signed-off-by: Dave Stevenson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maxime Ripard <[email protected]>
2022-06-28drm/fourcc: Document the Intel CCS modifiers' CC plane expected pitchImre Deak1-4/+4
The driver expects the pitch of the Intel CCS CC color planes to be 64 bytes aligned, adjust the modifier descriptions accordingly. Cc: Nanley Chery <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-28drm/doc: Fix comment typoMarek Vasut1-1/+1
Replace apprpriately with appropriately. Fixes: 1e4d84c6589e9 ("drm/doc: Polish plane composition property docs") Signed-off-by: Marek Vasut <[email protected]> Cc: Benjamin Gaignard <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Dmitry Baryshkov <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Sean Paul <[email protected]> Cc: Simon Ser <[email protected]> Cc: Ville Syrjälä <[email protected]> Signed-off-by: Simon Ser <[email protected]> Reviewed-by: Simon Ser <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-27drm/stm: ltdc: update hardware error managementYannick Fertre2-19/+77
The latest hardware version (0x40100) supports a hardware threshold register (aka FUTR) to trigger a fifo underrun interrupt. A software threshold has been implemented for other hardware versions. The threshold is set to 128 by default. Signed-off-by: Yannick Fertre <[email protected]> Signed-off-by: Philippe Cornu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-27drm/stm: ltdc: add support of horizontal & vertical mirroringYannick Fertre2-56/+108
Support of vertical & horizontal mirroring features thanks to the plane rotation property. Signed-off-by: Yannick Fertre <[email protected]> Signed-off-by: Philippe Cornu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-27drm/stm: ltdc: add support of the dynamic z-orderYannick Fertre3-3/+22
Zpos property is immutable for all hardware versions except the last version (0x40100) which support the blending order feature (dynamic z-order). Signed-off-by: Yannick Fertre <[email protected]> Signed-off-by: Philippe Cornu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-27drm/stm: ltdc: fix various coding-style warningsYannick Fertre1-3/+2
Fix issues reported by checkpatch.pl: - Braces {} should be used on all arms - Blank lines Signed-off-by: Yannick Fertre <[email protected]> Acked-by: Raphael Gallais-Pou <[email protected]> Signed-off-by: Philippe Cornu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-27drm/stm: ltdc: remove error message about scalingYannick Fertre1-1/+2
Remove error message about scaling & replace it by a debug message to avoid too much error. Signed-off-by: Yannick Fertre <[email protected]> Acked-by: Raphael Gallais-Pou <[email protected]> Signed-off-by: Philippe Cornu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-06-27drm/stm: ltdc: disable all layers before crtc shutdownYannick Fertre1-0/+6
All plans must be disabled before the CRTC shutdown helping the crtc to restart from a clean situation (without unwanted planes already enable). Signed-off-by: Yannick Fertre <[email protected]> Signed-off-by: Philippe Cornu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]