Age | Commit message (Collapse) | Author | Files | Lines |
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Signed-off-by: Ben Skeggs <[email protected]>
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The token will also contain runlist ID on Turing, so instead expose it as
an opaque value from NVKM so the client doesn't need to care.
Signed-off-by: Ben Skeggs <[email protected]>
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The GPU saves off some stuff to the address specified in this part of RAMFC
when the channel faults, so we should probably point it at a valid address.
Signed-off-by: Ben Skeggs <[email protected]>
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The trick we used (and still use for older GPUs) doesn't work on Turing.
Signed-off-by: Ben Skeggs <[email protected]>
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Turing will require different code.
Signed-off-by: Ben Skeggs <[email protected]>
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We're about to be adding more of them.
Signed-off-by: Ben Skeggs <[email protected]>
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We will need to bash different registers on Turing.
Signed-off-by: Ben Skeggs <[email protected]>
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Will be used by SVM code to allow direct (without going through MMU) memcpy
using the GPU copy engines.
Signed-off-by: Ben Skeggs <[email protected]>
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Will be used to match fault buffer entries with a channel.
Signed-off-by: Ben Skeggs <[email protected]>
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This is needed for Turing, but we're supposed to wait for completion after
re-writing the value on older GPUs anyway.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Aside from being a nice cleanup, these will to allow the upcoming direct
page mapping interfaces to play nicely with normal mappings.
Signed-off-by: Ben Skeggs <[email protected]>
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The GPU will continually fire interrupts while a fault buffer GET != PUT,
and to stop the spurious interrupts while the handler does its thing, we
were disabling the fault buffer temporarily.
This is not actually a great idea to begin with, and made worse by Volta
resetting GET/PUT when it's reactivated. So, let's not do that.
Signed-off-by: Ben Skeggs <[email protected]>
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Will allow more shared fault buffer handling code between Pascal/Volta.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Various structures are accessed by the GPU through BAR2 for some reason
on newer GPUs. This commit makes it more convenient to handle.
Will be used for GP100- fault buffers, and GV100- fault method buffers.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Will be used for Turing.
Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Turing GPUs can have more than one.
Signed-off-by: Ben Skeggs <[email protected]>
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This makes debugging with DP tracing a lot harder to interpret, so name
each i2c based off the name of the encoder that it's for
Signed-off-by: Lyude Paul <[email protected]>
Reviewed-by: Karol Herbst <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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We need to actually make sure we check this on resume since otherwise we
won't know whether or not the topology is still there once we've
resumed, which will cause us to still think the topology is connected
even after it's been removed if the removal happens mid-suspend.
Signed-off-by: Lyude Paul <[email protected]>
Cc: [email protected]
Signed-off-by: Ben Skeggs <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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With this, nvbios /sys/kernel/debug/dri/*/vbios.rom now works!
Signed-off-by: Lyude Paul <[email protected]>
Reviewed-by: Karol Herbst <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Since we already expose the vbios.rom file here, why not also expose the
strap_peek?
Signed-off-by: Lyude Paul <[email protected]>
Reviewed-by: Karol Herbst <[email protected]>
Signed-off-by: Ben Skeggs <[email protected]>
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Add special avfs handling for some polaris variants.
v2: fix copy paste typo.
v3: fix asic rid check
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function 'gfx_v8_0_pre_soft_reset':
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:4950:27: warning:
variable 'srbm_soft_reset' set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function 'gfx_v8_0_post_soft_reset':
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:5054:27: warning:
variable 'srbm_soft_reset' set but not used [-Wunused-but-set-variable]
It never used since introduction in commit d31a501ead7f ("drm/amdgpu: add
pre_soft_reset ip func") and e4ae0fc33631 ("drm/amdgpu: implement
gfx8 post_soft_reset")
Reviewed-by: Chunming Zhou <[email protected]>
Signed-off-by: YueHaibing <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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driver need to reserve resource for each ctx for
some hw features. so add this limitation.
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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RLC will go wrong in soft_reset under sriov
Workaroound: only need to init RLC csb, and skip RLC stop, reset, start
this is because host-driver has already done full initialization on RLC
v2: squash in build fix
Signed-off-by: Tiecehng Zhou <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The GMC/VM subsystem is causing the faults, so move the handling here as
well.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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printk_ratelimit() is much better suited to limit the number of reported
VM faults.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This allows us to filter out VM faults in the GMC code.
v2: don't filter out all faults
v3: fix copy&paste typo, send all IV to the KFD, don't change message level
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This allows user mode to map doorbell pages into GPUVM address space.
That way GPUs can submit to user mode queues (self-dispatch).
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This is used for interoperability between ROCm compute and graphics
APIs. It allows importing graphics driver BOs into the ROCm SVM
address space for zero-copy GPU access.
The API is split into two steps (query and import) to allow user mode
to manage the virtual address space allocation for the imported buffer.
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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top_dev->gpu is NULL for CPUs. Avoid dereferencing it if NULL.
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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We don't want KFD processes evicting each other over VRAM usage.
Therefore prevent overcommitting VRAM among KFD applications with
a per-GPU limit. Also leave enough room for page tables on top
of the application memory usage.
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Reviewed-by: Eric Huang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Avoid including mmu_context.h in amdgpu_amdkfd.h since that may be
included in other header files that define traces. This leads to
conflicts due to traces defined in other headers included via
mmu_context.h.
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY] clarify dal input parameters to pplib interface, remove
un-used parameters. dal knows exactly which parameters needed
and their effects at pplib and smu sides.
current dal sequence for dcn1_update_clock to pplib:
1.smu10_display_clock_voltage_request for dcefclk
2.smu10_display_clock_voltage_request for fclk
3.phm_store_dal_configuration_data {
set_min_deep_sleep_dcfclk
set_active_display_count
store_cc6_data --- this data never be referenced
new sequence will be:
1. set_display_count --- need add new pplib interface
2. set_min_deep_sleep_dcfclk -- new pplib interface
3. set_hard_min_dcfclk_by_freq
4. set_hard_min_fclk_by_freq
after this code refactor, smu10_display_clock_voltage_request,
phm_store_dal_configuration_data will not be needed for rv.
[HOW] step 1: add new functions at pplib interface
step 2: add new functions at amdgpu dm and dc
Signed-off-by: hersen wu <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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amdgpu_ring_soft_recovery would have Call-Trace,
when s_fence->parent was NULL inside amdgpu_job_timedout.
Check fence first, as drm_sched_hw_job_reset did.
Signed-off-by: Wentao Lou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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PSP ring need to be destroy before starting reinit for vf.
This patche move it from hypervisor driver into guest.
Signed-off-by: Xiangliang Yu <[email protected]>
Signed-off-by: Frank Min <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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PSP only support VMR ring for SRIOV vf since v45 and all commands will
be send to VMR ring for executing.
VMR ring use C2PMSG 101 ~ 103 instead of C2PMSG 64 ~ 71.
Signed-off-by: Xiangliang Yu <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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If PSP FW is running already, driver will not load PSP FW again and skip
it. So psp fw version is not correct if reading it from FW binary file,
need to get right version from register.
Signed-off-by: Xiangliang Yu <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This allows us to drop the extra reserve in TTM.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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And drop the now superflous extra reservations.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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It is perfectly possible that the BO list is created before the BO is
exported. While at it clean up setting shared to one instead of true.
v2: add comment and simplify logic
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Acked-by: Junwei Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Let's support simultaneous submissions to multiple engines.
v2: rename the field to num_shared and fix up all users
v3: rebased
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
For Picasso && FP5 SOCKET board, we use picasso_rlc.bin
Judgment method:
PCO AM4: revision >= 0xC8 && revision <= 0xCF
or revision >= 0xD8 && revision <= 0xDF
otherwise is PCO FP5
Signed-off-by: Aaron Liu <[email protected]>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
Signed-off-by: Alex Deucher <[email protected]>
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Check if the MC firmware supports FFC and tell the SMC so
mclk switching is handled properly.
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Add new messages for polaris.
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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git://anongit.freedesktop.org/drm/drm-misc into drm-next
Final changes to drm-misc-next for v4.21:
UAPI Changes:
Core Changes:
- Add dma_fence_get_stub to dma-buf, and use it in drm/syncobj.
- Add and use DRM_MODESET_LOCK_BEGIN/END helpers.
- Small fixes to drm_atomic_helper_resume(), drm_mode_setcrtc() and
drm_atomic_helper_commit_duplicated_state()
- Fix drm_atomic_state_helper.[c] extraction.
Driver Changes:
- Small fixes to tinydrm, vkms, meson, rcar-du, virtio, vkms,
v3d, and pl111.
- vc4: Allow scaling and YUV formats on cursor planes.
- v3d: Enable use of the Texture Formatting Unit, and fix
prime imports of buffers from other drivers.
- Add support for the AUO G101EVN010 panel.
- sun4i: Enable support for the H6 display engine.
Signed-off-by: Dave Airlie <[email protected]>
[airlied: added drm/v3d: fix broken build to the merge commit]
From: Maarten Lankhorst <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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