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2024-05-29drm/amd: Fix shutdown (again) on some SMU v13.0.4/11 platformsMario Limonciello1-9/+11
commit cd94d1b182d2 ("dm/amd/pm: Fix problems with reboot/shutdown for some SMU 13.0.4/13.0.11 users") attempted to fix shutdown issues that were reported since commit 31729e8c21ec ("drm/amd/pm: fixes a random hang in S4 for SMU v13.0.4/11") but caused issues for some people. Adjust the workaround flow to properly only apply in the S4 case: -> For shutdown go through SMU_MSG_PrepareMp1ForUnload -> For S4 go through SMU_MSG_GfxDeviceDriverReset and SMU_MSG_PrepareMp1ForUnload Reported-and-tested-by: lectrode <[email protected]> Closes: https://github.com/void-linux/void-packages/issues/50417 Cc: [email protected] Fixes: cd94d1b182d2 ("dm/amd/pm: Fix problems with reboot/shutdown for some SMU 13.0.4/13.0.11 users") Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu/gfx11: enable gfx pipe1 hardware supportAlex Deucher1-3/+3
Enable gfx pipe1 hardware support. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu: Make CPX mode auto default in NPS4Rajneesh Bhardwaj1-1/+1
On GFXIP9.4.3, make CPX mode as the default compute mode if the node is setup in NPS4 memory partition mode. This change is only applicable for dGPU, for APU, continue to use TPX mode. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Rajneesh Bhardwaj <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu/gfx11: handle priority setup for gfx pipe1Alex Deucher1-11/+25
Set up pipe1 as a high priority queue. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu/gfx11: select HDP ref/mask according to gfx ring pipeAlex Deucher1-1/+1
Use correct ref/mask for differnent gfx ring pipe. Ported from ZhenGuo's patch for gfx10. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu: Add lock around VF RLCG interfaceVictor Skvortsov3-0/+9
flush_gpu_tlb may be called from another thread while device_gpu_recover is running. Both of these threads access registers through the VF RLCG interface during VF Full Access. Add a lock around this interface to prevent race conditions between these threads. Signed-off-by: Victor Skvortsov <[email protected]> Reviewed-by: Zhigang Luo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdkfd: simplify APU VRAM handlingAlex Deucher4-14/+11
With commit 89773b85599a ("drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs") big and small APU "VRAM" handling in KFD was unified. Since AMD_IS_APU is set for both big and small APUs, we can simplify the checks in the code. v2: clean up a few more places (Lang) Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Lang Yu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29Revert "drm/amdkfd: fix gfx_target_version for certain 11.0.3 devices"Alex Deucher1-9/+2
This reverts commit 28ebbb4981cb1fad12e0b1227dbecc88810b1ee8. Revert this commit as apparently the LLVM code to take advantage of this never landed. Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Feifei Xu <[email protected]>
2024-05-29drm/amd/display: Enable copying of bounding box data from VBIOS DMUBAurabindo Pillai7-24/+146
Allocate some memory, send the address in chunks to dmub, and finally ask it to copy the bounding box data into the newly allocated memory. Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Add new GPINT command definitionsAurabindo Pillai1-0/+31
New commands for enabling copy of DC bounding box values from VBIOS DMUB Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Move some init routines to dm_sw_init()Aurabindo Pillai1-9/+11
Move creation of CGS device node and the DAL allocation list from amdgpu_dm_init() to dm_sw_init() which runs before dmub's sw init hook. This is required for communicating with the VBIOS DMUB image from the VBIOS that was loaded for early pre-os boot. Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Add missing registers for DCN401Rodrigo Siqueira1-1/+50
Add some additional registers. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Fix null pointer dereference for dcn401Aurabindo Pillai1-3/+5
When ODM slice happens on DCN401, there is a null pointer exception caused by that. This commit address this issue by checking if the required data structures are initialized. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Remove incorrect FP context startAurabindo Pillai1-2/+0
All the DC_FP_START/END should be used before call anything from DML2, for this reason, the use of those guards inside DML it is not correct. This commit removes two unnecessary DC_FP_START/END from a dml2 function. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Use DCN 410 includes for DCN401Aurabindo Pillai1-2/+2
DCN401 is using DCN 320 headers, which does not have all the right registers for DCN401. This commit just replace DCN320 includes with the one from DCN410. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Remove unnecessary HPD entry for DCN401Aurabindo Pillai1-2/+0
Drop the extra HPD irq entry for DCN401. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Update DML2.1 generated codeRodrigo Siqueira25-1172/+2062
Most of the DML code is generated, and it is necessary to update some parts of it from time to time. This commit brings the latest generated code for DML 2.1. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Refactor HUBP into component folder.Pinninti4-3/+7
[why] cleaning up the code refactor requires hubp to be in its own component. [how] move all files under newly created hubp folder and fixing the makefiles. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Pinninti <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Remove unused codeRodrigo Siqueira4-12/+2
This commit removes some unused code with the required adjustments. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Enable ISHARP support for DCN401Samson Tam8-65/+223
[Why] Enable sharpener support for DCN401 [How] - Removed memcmp check that was preventing ISHARP from being enabled. - Add missing ISHARP register defines, masks, and writes. - Add programming of Blur and Scale coefficients. - Program FMT_MODE and NLDELTA registers based on LLS_PREF and pixel - format - Only enable ISHARP for YUV420 - Add disabling of ISHARP - Add debug flags and registry keys for debugging ISHARP. - Set default to medium level Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Samson Tam <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: Fix incorrect cursor position for dcn401Sridevi2-14/+34
[Why] Incorrect cursor position calculation in some scenarios. Also for mirror and rotation cases. [How] Fix for incorrect cursor position. Added new test scenarios for diags cursor test. Updated CRC for few of the diags cursor test scenarios. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Sridevi <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu: fix typo in amdgpu_ras_aca_sysfs_read() functionYang Wang1-1/+1
fix typo "info.ue_count" in amdgpu_ras_aca_sysfs_read() function. Fixes: 865d3397630b ("drm/amdgpu: add aca deferred error type support") Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu: fix dereference null return value for the function ↵Jesse Zhang1-1/+5
amdgpu_vm_pt_parent The pointer parent may be NULLed by the function amdgpu_vm_pt_parent. To make the code more robust, check the pointer parent. Signed-off-by: Jesse Zhang <[email protected]> Suggested-by: Christian König <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/amdgpu: add AMD_PG_SUPPORT_VCN_DPG flagDavid (Ming Qiang) Wu1-1/+2
AMD_PG_SUPPORT_VCN_DPG is needed for secure parts and should/can be enabled by now. Signed-off-by: David (Ming Qiang) Wu <[email protected]> Reviewed-by: Sonny Jiang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu: drop MES 10.1 support v3Alex Deucher8-2021/+72
It was an enablement vehicle for MES 11 and was never productized. Remove it. v2: drop additional checks in the GFX10 code. v3: drop mes_api_def.h Acked-by: Christian König <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amd/display: clean up some inconsistent indentingJiapeng Chong1-3/+1
No functional modification involved. drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:5200 dc_power_down_on_boot() warn: inconsistent indenting. Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9166 Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu: silence UBSAN warningAlex Deucher1-1/+1
Convert a variable sized array from [1] to []. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-29drm/amdgpu: Adjust logic in amdgpu_device_partner_bandwidth()Alex Deucher1-7/+12
Use current speed/width on devices which don't support dynamic PCIe switching. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3289 Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amd/display: Enable colorspace property for MST connectorsMario Limonciello1-0/+3
MST colorspace property support was disabled due to a series of warnings that came up when the device was plugged in since the properties weren't made at device creation. Create the properties in advance instead. Suggested-by: Ville Syrjälä <[email protected]> Fixes: 69a959610229 ("drm/amd/display: Temporary Disable MST DP Colorspace Property"). Reported-and-tested-by: Tyler Schneider <[email protected]> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3353 Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu/display: Fix null pointer dereference in ↵Srinivasan Shanmugam1-1/+4
dc_stream_program_cursor_position The fix involves adding a null check for 'stream' at the beginning of the function. If 'stream' is NULL, the function immediately returns false. This ensures that 'stream' is not NULL when we dereference it to access 'ctx' in 'dc = stream->ctx->dc;' the function. Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c:398 dc_stream_program_cursor_position() error: we previously assumed 'stream' could be null (see line 397) drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c 389 bool dc_stream_program_cursor_position( 390 struct dc_stream_state *stream, 391 const struct dc_cursor_position *position) 392 { 393 struct dc *dc; 394 bool reset_idle_optimizations = false; 395 const struct dc_cursor_position *old_position; 396 397 old_position = stream ? &stream->cursor_position : NULL; ^^^^^^^^ The patch adds a NULL check --> 398 dc = stream->ctx->dc; ^^^^^^^^ The old code didn't check 399 400 if (dc_stream_set_cursor_position(stream, position)) { 401 dc_z10_restore(dc); 402 403 /* disable idle optimizations if enabling cursor */ 404 if (dc->idle_optimizations_allowed && 405 (!old_position->enable || dc->debug.exit_idle_opt_for_cursor_updates) && 406 position->enable) { 407 dc_allow_idle_optimizations(dc, false); Fixes: f63f86b5affc ("drm/amd/display: Separate setting and programming of cursor") Reported-by: Dan Carpenter <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Tom Chung <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Roman Li <[email protected]> Cc: Aurabindo Pillai <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: add gfx queue support for gfx11 ipdumpSunil Khatri1-0/+92
Add support of all the CP GFX queues for gfx11 ipdump to be used by devcoredump. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: add cp queue registers for gfx11 ipdumpSunil Khatri1-2/+109
Add gfx11 support of CP queue registers for all queues to be used by devcoredump. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amd/display: Pass errors from amdgpu_dm_init() upMario Limonciello1-1/+5
Errors in amdgpu_dm_init() are silently ignored and dm_hw_init() will succeed. However often these are fatal errors and it would be better to pass them up. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: add print support for gfx11 ipdumpSunil Khatri1-1/+16
Add support of gfx11 ipdump print so devcoredump could trigger it to dump the captured registers in devcoredump. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: add gfx11 registers support in ipdumpSunil Khatri1-1/+106
Add general registers of gfx11 in ipdump for devcoredump support. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: Add missing offsets in gc_11_0_0_offset.hSunil Khatri1-0/+10
IB1 registers: regCP_IB1_CMD_BUFSZ regCP_IB1_BASE_LO regCP_IB1_BASE_HI regCP_IB1_BUFSZ regCP_MES_DEBUG_INTERRUPT_INSTR_PNTR Above registers are part of the asic but not of the offset file for gc_11_0_0_offset.h and hence adding them. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: add more device info to the devcoredumpSunil Khatri1-2/+19
Adding more device information: a. PCI info b. VRAM and GTT info c. GDC config Also correct the print layout and section information for in devcoredump. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: add prints in IP State dumpSunil Khatri1-0/+2
add prints before and after ip state is dumped. It avoids user to think of system being stuck/hung as dump could take some time after a gpu hang. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: add gfx queue support of gfx10 in ipdumpSunil Khatri2-0/+91
Add gfx queue register for all instances in devcoredump for gfx10. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: Add cp queues support fro gfx10 in ipdumpSunil Khatri2-4/+113
Add support to dump registers of all instances of cp queue registers of gfx10 to devcoredump. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: rename the ip_dump to ip_dump_coreSunil Khatri2-8/+8
Rename the memory pointer from ip_dump to ip_dump_core to make it specific to core registers and rest other registers to be dumped in their respective memories. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: Add CRC16 selection in configLijo Lazar1-0/+1
KFD uses crc16 for gpu_id generation. Fixes: 3ed181b8ff43 ("drm/amdkfd: Ensure gpu_id is unique") Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amd/pm: workaround to pass jpeg unit testKenneth Feng2-2/+31
this is a workaround to pass jpeg unit test on vcn 5.0 now. will be removed later. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Sonny Jiang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amd/amdgpu: fix the inst passed to amdgpu_virt_rlcg_reg_rwVictor Zhao2-11/+11
the inst passed to amdgpu_virt_rlcg_reg_rw should be physical instance. Fix the miss matched code. Signed-off-by: Victor Zhao <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu - optimize rlc spm cntlJane Jian3-20/+38
v1 - driver MMIO read the register to check whether write is required - if write is required, sriov full time to use rlcg, otherwise use KIQ v2 - include gfx v11 sriov runtime case Signed-off-by: Jane Jian <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amd/display: Refactor construct_phy function in dc/link/link_factory.cSrinivasan Shanmugam1-33/+34
This commit modifies the construct_phy function to handle the case where `bios->integrated_info` is NULL and to address a compiler warning about a large stack allocation. Upon examination, it was found that the local `integrated_info` structure was just used to copy values which is large and was being declared directly on the stack which could potentially lead to performance issues. This commit changes the code to use `bios->integrated_info` directly, which avoids the need for a large stack allocation. The function now checks if `bios->integrated_info` is NULL before entering a for loop that uses it. If `bios->integrated_info` is NULL, the function skips the for loop and continues executing the rest of the code. This ensures that the function behaves correctly when `bios->integrated_info` is NULL and improves compatibility with dGPUs. Fixes the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c: In function ‘construct_phy’: drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c:743:1: warning: the frame size of 1056 bytes is larger than 1024 bytes [-Wframe-larger-than=] Cc: Wenjing Liu <[email protected]> Cc: Jerry Zuo <[email protected]> Cc: Qingqing Zhuo <[email protected]> Cc: Tom Chung <[email protected]> Cc: Alvin Lee <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Roman Li <[email protected]> Cc: Hersen Wu <[email protected]> Cc: Alex Hung <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Harry Wentland <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Suggested-by: Wenjing Liu <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: correct hbm field in boot statusHawking Zhang1-1/+1
hbm filed takes bit 13 and bit 14 in boot status. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: program device_cntl2 through pci cfg spaceFrank Min1-5/+8
device_cntl2 is accessible from pci config space, so program it through pci cfg space instead of mmio. Signed-off-by: Frank Min <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu/atomfirmware: add intergrated info v2.3 tableLi Ma2-0/+58
[Why] The vram width value is 0. Because the integratedsysteminfo table in VBIOS has updated to 2.3. [How] Driver needs a new intergrated info v2.3 table too. Then the vram width value will be correct. Signed-off-by: Li Ma <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-23drm/amdgpu: Fix snprintf usage in amdgpu_gfx_kiq_init_ringSrinivasan Shanmugam1-1/+1
This commit fixes a format truncation issue arosed by the snprintf function potentially writing more characters into the ring->name buffer than it can hold, in the amdgpu_gfx_kiq_init_ring function The issue occurred because the '%d' format specifier could write between 1 and 10 bytes into a region of size between 0 and 8, depending on the values of xcc_id, ring->me, ring->pipe, and ring->queue. The snprintf function could output between 12 and 41 bytes into a destination of size 16, leading to potential truncation. To resolve this, the snprintf line was modified to use the '%hhu' format specifier for xcc_id, ring->me, ring->pipe, and ring->queue. The '%hhu' specifier is used for unsigned char variables and ensures that these values are printed as unsigned decimal integers. Fixes the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c: In function ‘amdgpu_gfx_kiq_init_ring’: drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:61: warning: ‘%d’ directive output may be truncated writing between 1 and 10 bytes into a region of size between 0 and 8 [-Wformat-truncation=] 332 | snprintf(ring->name, sizeof(ring->name), "kiq_%d.%d.%d.%d", | ^~ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:50: note: directive argument in the range [0, 2147483647] 332 | snprintf(ring->name, sizeof(ring->name), "kiq_%d.%d.%d.%d", | ^~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:9: note: ‘snprintf’ output between 12 and 41 bytes into a destination of size 16 332 | snprintf(ring->name, sizeof(ring->name), "kiq_%d.%d.%d.%d", | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 333 | xcc_id, ring->me, ring->pipe, ring->queue); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fixes: 345a36c4f1ba ("drm/amdgpu: prefer snprintf over sprintf") Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>