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2014-11-23ARM: dts: vf610-colibri: Add PWM supportBhuvanchandra DV2-0/+32
The Colibri standard defines four pins as PWM outputs, two of them (PWM A and C) are routed to FTM instance 0 and the other two (PWM B and D) are routed to FTM instance 1. Hence enable both FTM instances for the Colibri module and mux the four pins accordingly. Signed-off-by: Bhuvanchandra DV <[email protected]> Acked-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: dts: vf610: Add PWM second instanceBhuvanchandra DV1-0/+13
Signed-off-by: Bhuvanchandra DV <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: dts: vf610: Add ARM Global TimerStefan Agner1-0/+8
Add Global Timer support which is part of the private peripherals of the Cortex-A5 processor. This Global Timer is compatible with the Cortex-A9 implementation. It's a 64-bit timer and is clocked by the peripheral clock, which is typically 133 or 166MHz on Vybrid. Signed-off-by: Stefan Agner <[email protected]> Acked-by: Bill Pringlemeir <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: dts: imx51: Improve SSI clocks descriptionFabio Estevam1-3/+9
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock for generating bit clock when SSI operates in master mode. Add the extra 'baud' clock so that we can have SSI functional in master mode. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: dts: imx53: Improve SSI clocks descriptionFabio Estevam1-3/+9
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock for generating bit clock when SSI operates in master mode. Add the extra 'baud' clock so that we can have SSI functional in master mode. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23Merge tag 'imx-soc-3.19' into imx/dtShawn Guo25-75/+611
The i.MX SoC update for 3.19: - Update i.MX6 suspend code to check DDR instead of CPU type, as the difference we need to handle is between LPDDR2 and DDR3, not SoCs. - Set anatop properly for LPDDR2 in DSM mode - Add support for new SoC LS1021A which integrates dual Cortex-A7 - Add ENET initialization for i.MX6SX platform - Add cpufreq support for i.MX53 platform - Add a SNVS based poweroff driver for i.MX6 platforms - Use ARM Global Timer as clocksource on VF610 Note: the change set is built on top of tag imx-fixes-3.18-2 to resolve a conflict on file arch/arm/mach-imx/clk-vf610.c.
2014-11-23power: reset: imx-snvs-poweroff: add power off driver for i.mx6Robin Gong4-0/+99
This driver register pm_power_off with snvs power off function. If your boards NOT use PMIC_ON_REQ to turn on/off external pmic, or use other pin to do, please disable the driver in dts, otherwise, your pm_power_off maybe overwrote by this driver. Signed-off-by: Robin Gong <[email protected]> Acked-By: Sebastian Reichel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021AArnd Bergmann1-4/+0
The newly introduced LS1021A SoC selects CONFIG_SOC_FSL, which is originally symbol used for the PowerPC based platforms and guards lots of code that does not build on ARM. This breaks allmodconfig, so let's remove it for now, until either all those drivers are fixed or they use a dependency on IMX instead. Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: clk-vf610: get input clocks from assigned clocksStefan Agner1-5/+16
With the clock assignment device tree changes, the clocks get initialized properly but the search for those clocks fails with errors: [ 0.000000] i.MX clk 4: register failed with -17 [ 0.000000] i.MX clk 5: register failed with -17 This is because the module can't find those clocks anymore, and tries to initialize fixed clocks with the same name. Get the clock modules input clocks from the assigned clocks by default by using of_clk_get_by_name(). If this function returns not a valid clock, fall back to the old behaviour and search the input clock from the device tree's /clocks/$name node. Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: Add Freescale LS1021A SMP supportJingchang Lu4-1/+36
Freescale LS1021A SoCs deploy two cortex-A7 processors, this adds bring-up support for the secondary core. Signed-off-by: Jingchang Lu <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: Add initial support for Freescale LS1021AJingchang Lu3-0/+37
The LS1021A SoC is a dual-core Cortex-A7 based processor, this adds the initial support for it. Signed-off-by: Jingchang Lu <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx53: add cpufreq supportLucas Stach1-0/+2
Instanciate device for the generic cpufreq-dt driver. Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx53: clk: add ARM clockLucas Stach2-1/+7
The ARM clock is a virtual clock feeding the ARM partition of the SoC. It controls multiple other clocks to ensure the right sequencing when cpufreq changes the CPU clock rate. Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: add CPU clock typeLucas Stach3-1/+112
This implements a virtual clock used to abstract away all the steps needed in order to change the ARM clock, so we don't have to push all this clock handling into the cpufreq driver. While it will be used for i.MX53 at first it is generic enough to be used on i.MX6 later on. Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx5: add step clock, used when reprogramming PLL1Lucas Stach2-2/+11
This is the bypass clock used to feed the ARM partition while we reprogram PLL1 to another rate. Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: add enet init for i.mx6sxFugang Duan1-0/+51
Add enet init for i.mx6sx: - Add phy ar8031 fixup - Set enet clock source from internal PLL Signed-off-by: Fugang Duan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx6sx: add imx6sx iomux-gpr field defineFugang Duan1-0/+39
Add imx6sx iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header file, which is not fully define all iomux-gpr registers and fields, only align with freescale internal tree related GPR macro define. Signed-off-by: Fugang Duan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: vf610: Add ARM Global Timer clocksource optionStefan Agner1-1/+20
Add the ARM Global Timer as clocksource/scheduler clock option and use it as default scheduler clock. This leaves the PIT timer for other users e.g. the secondary Cortex-M4 core. Also, the Global Timer has double the precission (running at pheripheral clock compared to IPG clock) and a 64-bit incrementing counter register. We still keep the PIT timer as an secondary option in case the ARM Global Timer is not available. Signed-off-by: Stefan Agner <[email protected]> Acked-by: Bill Pringlemeir <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: add anatop settings for LPDDR2 when enter DSM modeAnson Huang1-2/+32
For LPDDR2 platform, no need to enable weak2P5 in DSM mode, it can be pulled down to save power(~0.65mW). And per design team's recommendation, we should disconnect VDDHIGH and SNVS in DSM mode on i.MX6SL. Signed-off-by: Anson Huang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23ARM: imx: replace cpu type check with ddr type checkAnson Huang5-14/+30
As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3, we used cpu type to decide how to do these settings in suspend before which is NOT flexible, take i.MX6SL for example, although it has LPDDR2 on EVK board, but users can also use DDR3 on other boards, so it is better to read the DDR type from MMDC then decide how to do related settings. Signed-off-by: Anson Huang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2014-11-23Merge tag 'imx-fixes-3.18-2' into imx/socShawn Guo4-50/+125
The i.MX fixes for 3.18, 2nd round: - Fix a regression on Vybrid platform which is caused by commit dc4805c2e78b (ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver), and results in a missing configuration on PLL clocks. - Fix a regression with i.MX defconfig files where CONFIG_SPI option gets lost accidentally.
2014-11-22ARM: dts: rockchip: temporarily disable smp on rk3288Heiko Stuebner1-1/+0
Stock firmware on rk3288 does not initizalize the CNTVOFF registers of the architected timer correctly. This introduces issues with the newly added SMP support for rk3288, resulting in rcu stalls due to differing timer values per core. There exist preliminary and tested patches for u-boot for this problem, but there are a minority of boards using other bootloaders like coreboot. There also is currently a second solution for miss-initialized architected timers in the works: - clocksource: arch_timer: Fix code to use physical timers when requested - clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers Therefore disable smp on rk3288 again till these are finalized, also allowing coreboot-based boards to boot again. Signed-off-by: Heiko Stuebner <[email protected]>
2014-11-22ARM: dts: add missing clock to MFC device for exynos4Marek Szyprowski1-2/+2
sclk_mfc is required for MFC device since commit 0c2272170d78f826f6e97f99fb8a67fc17feef07 ("media: s5p-mfc: rename special clock to sclk_mfc"), so add it to exynos4 dts. Signed-off-by: Marek Szyprowski <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Specify audio clock parents and rates for exynos4412-odroid-commonSylwester Nawrocki1-0/+10
This ensures the core and the audio subsystem clocks are configured properly, as expected by the sound machine driver. These bits are missing to obtain proper audio sample rates in kernel v3.17, where audio support for Odroid X2/U3 was first added. Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Add trackpad to exynos5250-springAndreas Faerber1-0/+23
The HP Chromebook 11 uses an Atmel maXTouch as trackpad. The keymap was found by trial-and-error. Signed-off-by: Andreas Faerber <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Add temperature sensor to exynos5250-springAndreas Faerber1-0/+5
Spotted in the Chrome OS 3.8 based device tree. Needs CONFIG_SENSORS_LM90. Signed-off-by: Andreas Faerber <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Add usb3503 pinctrl to exynos5250-springAndreas Faerber1-0/+2
Reported-by: Doug Anderson <[email protected]> Signed-off-by: Andreas Faerber <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Add max77693-haptic node for exynos4412-trats2Jaewon Kim1-0/+6
This patch adds max77693-haptic node to support for haptic motor driver. Signed-off-by: Jaewon Kim <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: add pwm node for exynos4412-trats2Jaewon Kim1-0/+7
This patch add PWM(Pulse Width Modulation) node and handle to use pwm property. Signed-off-by: Jaewon Kim <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Specify default clocks for Exynos4 camera devicesSylwester Nawrocki4-3/+77
Specify the default mux and divider clocks in device tree to ensure the FIMC devices on Trats, Trats2, Universal_c210 and Odroid X2/U3 boards are clocked from recommended clock source and with maximum supported frequency. For Trats2 also the MIPI-CSIS and the camera sensor clocks are configured, the 'clock-frequency' property is deprecated in favour of 'assigned-clock-rates' property. Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Enable TMU support for exynos4412-trats2Lukasz Majewski1-0/+5
This patch enables support for TMU at Exynos4412 based Trats2 board. Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22ARM: dts: Device tree node definition for TMU on exynos4x12Lukasz Majewski1-0/+10
The TMU device tree node definition for Exynos4x12 family of SoCs. Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2014-11-22arm: mvebu: add .dts file for Synology DS414Arnaud Ebalard2-1/+332
Synology DS414 is a 4-bay NAS powered by a Marvell Armada XP (mv78230 dual-core @1.33Ghz). It is very similar on many aspects to previous 4-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device: - 1GB RAM - Boot on SPI flash (64Mbit Micron N25Q064) - 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512 PHY via RGMII) - 1 front USB 2.0 ports (directly handled by the Armada 370) - 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI controller on the PCIe bus) - 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II controller on the PCIe bus) - Seiko S-35390A I2C RTC chip - UART0 providing serial console - UART1 used for poweroff (connected to a Microchip PIC16F883) Additional note: the front LEDs the and the two fans are not directly connected to the SoC and under its control. The former are presumably driven by the SATA controller, the latter by the PIC. [ jac: fixed up s/ge[01]_rgmii_pins/pmx_ge[01]_rgmii/ to match armada-xp.dtsi ] Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/5b678d6d1f2f42f4bf0d087878b9d8024d463ea7.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: add .dts file for Synology DS213jArnaud Ebalard2-1/+318
Synology DS213j is a 2-bay NAS powered by a Marvell Armada 370 (88F6710 @1.2Ghz). It is very similar on many aspects to previous 2-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device: - 512MB RAM - boot on SPI flash (64Mbit Micron N25Q064) - 1 GbE interface (Armada MAC connected to a Marvell 88E1512 PHY via SGMII) - 2 rear USB 2.0 ports (directly handled by the Armada 370) - 2 internal SATA ports handled by the Armada 370: 2 GPIO for presence, 2 for powering them - two front amber LED (disk1, disk2) controlled by the SoC - Seiko S-35390A I2C RTC chip - UART0 providing serial console - UART1 used for poweroff (connected to a TI MSP430F2111) - Fan handled via 4 GPIO (3 for speed, 1 for alarm) Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/20f1a03897df1d825b62abdd525e588a8e39b3ec.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: define and use common Armada XP SPI pinctrl settingArnaud Ebalard2-7/+11
This patch defines common Armada XP pinctrl settings in armada-xp.dtsi for the supported SPI interface (MPP36-39) and use it as default for Armada XP spi interface. That being done, it removes the now redundant definitions in armada-xp-axpwifiap.dts. Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their spi interfaces if the default above does not match their config (i.e. if they do not use CS0). Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/d404b7abd80ee5a0fd8e8d3586d33cd37740d589.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: define and use common Armada XP UART2/3 pinctrl settingsArnaud Ebalard1-0/+14
This patch defines common Armada XP pinctrl settings for uart2 and uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP): uart2: MPP42-43 as default uart3: MPP44-45 as default Suggested-by: Andrew Lunn <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/fd51c080c7139a67ec01df8d797f1e88ce557796.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: define and use common Armada 370 UART pinctrl settingsArnaud Ebalard1-0/+25
This patch defines common Armada 370 pinctrl settings for uart0 and uart1 interfaces: uart0: MPP0-1 as default uart1: MPP41-42 as default Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their uart interfaces if the default above does not match their config. Suggested-by: Andrew Lunn <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/31412e57955c98bc9cc47b70726b5072af945cc3.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: define and use common Armada 370 SPI pinctrl settingsArnaud Ebalard2-0/+34
This patch defines common Armada 370 pinctrl settings for spi0 and spi1 interfaces: spi0: MPP33-36 as default, MPP32,63-65 as available alternate config spi1: MPP49-52 as default Currently, the Armada 370 DB .dts file has no explicit pinctrl info for the spi0 interface used to access the flash on the board. The patch fixes that by also adding explicit pinctrl info (MPP32,63-65) for this SPI interface. Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their spi interfaces if the default above does not match their config. Suggested-by: Andrew Lunn <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/1e812eb63b37718e273463e22e4d7512f8f0b624.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsiArnaud Ebalard8-196/+222
What was done by Sebastian in 264a05e19bf5 ("ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address") and 01c434225ee6 ("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for Armada 370, i.e. - Rename Armada 370 pinctrl node to pin-ctrl with its address encoded - Add a node alias to access the pinctrl node easily. - use the newly available alias in existing Armada 370 .dts files We can even go a bit further by putting the pinctrl node definition in armada-370-xp.dtsi, with only its reg property defined. This allows us to then also use the newly defined node alias in armada-xp.dtsi, armada-370.dtsi. Suggested-by: Sebastian Hesselbarth <[email protected]> Suggested-by: Andrew Lunn <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: use recently introduced uart label for stdout-pathArnaud Ebalard1-1/+1
Now that labels for uartX are available in Marvell Armada .dtsi files, this patch replaces the "/soc/internal-regs/serial@12000" found in armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more concise &uart0. Reviewed-by: Thomas Petazzoni <[email protected]> Suggested-by: Andrew Lunn <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/d1a883510e01f7f212a385e826dccbef903fae42.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: add uartX labels for Armada SoC serial nodesArnaud Ebalard2-4/+6
This patch adds uartX labels for Armada SoC serial nodes. This is a preliminary work to be able to easily reference the serial lines in Device Tree files. One expected use is when providing stdout-path property for barebox. Reviewed-by: Thomas Petazzoni <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/0683d1a823fe9b75849f3dafcf1cf6ee291cdca6.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22arm: mvebu: fix vendor prefix typo in kirkwood-synology.dtsiArnaud Ebalard1-1/+1
As reported by Andrew, the vendor prefix for Seiko Instruments, Inc. S-35390A I2C RTC chip in kirkwood-synology.dtsi has a typo (ssi instead of sii). This patches fixes it. Note: i2c devices ignore the optional vendor prefix, which explains why it worked with the typo and also why there is no backward compatibility issues with the fix. Reported-by: Andrew Lunn <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Arnaud Ebalard <[email protected]> Link: https://lkml.kernel.org/r/0444140a267d982c3e5f5f2b7b5f2dc41d010e2a.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper <[email protected]>
2014-11-22ARM: mvebu: fix ordering in Armada 370 .dtsiUwe Kleine-König1-5/+5
Commit a095b1c78a35 ("ARM: mvebu: sort DT nodes by address") missed placing the system-controller in the correct order. Fixes: a095b1c78a35 ("ARM: mvebu: sort DT nodes by address") Signed-off-by: Uwe Kleine-König <[email protected]> Acked-by: Andrew Lunn <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
2014-11-22ARM: mvebu: adjust ethernet aliases according to U-Boot requirements for A38xMarcin Wojtas1-3/+3
In order to update MAC address entries in the ethernet nodes in Device Tree both mainline U-Boot and Barebox bootloaders accept the same format of aliases, which is 'ethernetX', where X stands for an interface number. Other platforms in the mainline Linux, that comprise ethernet references in '/aliases' node (like various flavours of imx or sunXi), follow the naming scheme described above. This commit ajusts ethernet aliases of Marvell Armada 38x SoC to be properly recognized by bootloaders' MAC address fixup routines. Signed-off-by: Marcin Wojtas <[email protected]> Reviewed-by: Gregory CLEMENT <[email protected]> Acked-by: Andrew Lunn <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
2014-11-22ARM: mvebu: remove clock-frequency from Armada 38x SDHCI Device Tree nodeMarcin Wojtas1-1/+0
For proper operation of Armada 38x SDHCI controller proper 'clocks' property is sufficient. Therefore it is not useful to keep an additional 'clock-frequency' property in SDHCI controller node of board-level Device Tree file for Armada 385 DB. This commit gets rid of useless 'clock-frequency' property. Signed-off-by: Marcin Wojtas <[email protected]> Reviewed-by: Gregory CLEMENT <[email protected]> Acked-by: Andrew Lunn <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
2014-11-22ARM: mvebu: enable no-1-8-v flag for Armada 385 DB SDHCI interfaceMarcin Wojtas1-0/+1
The Marvell Armada 38x SoC's SDHCI interface is capable of using 1.8v voltage, needed for driving "UHS-I" SD cards at their full speed. It is not, however, possible on the DB board. Due to physical connectivity connector supply is tied to 3v and any attempt of changing voltage in order to operate in the fastest UHS modes fails. This patch enables equivalent SDHCI quirk in order to adjust controller operation to system capabilities. Signed-off-by: Marcin Wojtas <[email protected]> Reviewed-by: Gregory CLEMENT <[email protected]> Acked-by: Thomas Petazzoni <[email protected]> Acked-by: Andrew Lunn <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
2014-11-21ARM: dts: AM43xx: add tscadc DT entries for am437x-evm and am43x-epos-evmVignesh R3-0/+36
This patch adds tscadc DT entries for am437x-gp-evm and am43x-epos-evm. Signed-off-by: Vignesh R <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-11-21ARM: dts: cm-t3x30: add keypad supportDmitry Lifshitz1-0/+17
Add twl4030 matrtix keypad support. Signed-off-by: Dmitry Lifshitz <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-11-21ARM: dts: sb-t35: add EEPROM supportDmitry Lifshitz1-0/+20
Add at24 EEPROM chip support. Signed-off-by: Dmitry Lifshitz <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
2014-11-21ARM: dts: cm-t3x: add EEPROM supportDmitry Lifshitz1-0/+7
Add at24 EEPROM chip support. Signed-off-by: Dmitry Lifshitz <[email protected]> [[email protected]: updated to remove missing i2c1_pins] Signed-off-by: Tony Lindgren <[email protected]>
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