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2018-02-19drm/amd/display: Remove delay on disconnect patchJohn Barberiz2-13/+4
HDMI HPD's generic solution makes the monitor patch code unnecessary so anything related has been removed. Signed-off-by: John Barberiz <[email protected]> Reviewed-by: John Barberiz <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Skip 2 frames when first reading CRCLeo (Sunpeng) Li2-7/+7
Skipping the first frame will prevent uncoooked values most of the time. However, in some unlikely cases, the second frame will be uncooked as well. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Expose DCE110 CRC functions for DCE8Leo (Sunpeng) Li3-4/+12
Implement CRC for DCE8. Registers remain the same, so call DCE110 code directly. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Rework DCE transform bit depth reduction programming.Leo (Sunpeng) Li1-68/+36
Clear up the logic, and enable programming truncation as a bit reduction mode. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: When enabling CRC, disable dither & enable truncationLeo (Sunpeng) Li2-5/+20
When user-mode is using 8bpc, the hardware represents it internally using a higher bit depth. This causes problems when comparing CRCs for color managment tests. We need to disable dithering as well, since it makes CRC values non-deterministic. It's easy to see why dithering needs to be disabled, The reason why truncation also needs to be enabled is better described with an example. Consider the folowing which tests the color transform matrix (CTM): Expected CRC = FB_A -> Degamma (Bypassed) -> CTM (Bypassed) | v Obtain CRC <- Regamma(Bypassed) Actual CRC = FB_B -> Degamma (Bypassed) -> CTM (0.5*Identity) | v Obtain CRC <- Regamma(Bypassed) FB_A contains a solid red color at half intensity (127 @ 8bpc) FB_B contains a solid red color at full intensity (255 @ 8bpc) We expect that Expected CRC = Actual CRC, but that's not the case. When the CTM is applied, the output is at half intensity, but also at a higher bit depth within hardware. i.e. 255/2 = 127.5: not representable in 8bpc, but can be at 10bpc. This causes the two CRC's to be different. The solution is to truncate the output bit depth to the same as input when enabling CRC capture. Since Linux only supports 8bpc, hard code that for now. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Expose dither setting functionality to LinuxLeo (Sunpeng) Li2-0/+34
We will need this to disable dither for CRC capture. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Refactor max color lut entries into a macro.Leo (Sunpeng) Li3-8/+10
Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Hookup color management functionsLeo (Sunpeng) Li3-33/+44
Hookup new color management functions into amdgpu_dm: - Notify DRM that we support CRTC color management during CRTC init - Call color management functions within atomic check to update dc states in preparation for a commit Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Implement color managementLeo (Sunpeng) Li3-1/+224
Implement color management functionalities within amdgpu_dm_color, and expose functions within amdgpu_dm.h. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Add color module's gamma helpers to Linux buildLeo (Sunpeng) Li4-1/+1148
Also guard includes that we don't need. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Use hardware max low point when sampling OTFLeo (Sunpeng) Li1-3/+3
The MAX_LOW_POINT macro should reflect the maximum low point within hardware. Otherwise, sampling for the hardware points from the output transfer function (OTF) will be incorrect. Also, fix usage of MAX_LOW_POINT accordingly. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Make couple functions in DCE80 TG staticHarry Wentland2-68/+63
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Re-use DCE100 display_power_gating for DCE80Harry Wentland3-38/+6
Both functions are the same Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove unused DCE80 compressorHarry Wentland3-913/+1
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Keep eDP stream enabled during boot.Yongqiang Sun3-24/+34
This path fixed specific eDP panel cold boot black screen due to unnecessary enable link. Change: In case of boot up with eDP, if OS is going to set mode on eDP, keep eDP light up, do not disable and reset corresponding HW. This change may affect dce asics and S3/S4 Resume with multi-monitor. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: dal 3.1.34Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: disable seamless vp adjustment for mirrored surfaceDmytro Laktyushkin1-4/+4
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: add monitor patch for delay after DP receive power upMartin Tsai2-0/+7
Signed-off-by: Martin Tsai <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Change blackout time to 0 on CZ/STHarry Wentland1-4/+4
These should only be non-0 if big hammer w/a is implemented. Currently DC doesn't implement it, so leave them 0. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: add force_trigger even to static screen controlCharlene Liu3-0/+5
Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: dal 3.1.33Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: boot up/S4 fix mainlink off before BL.Charlene Liu1-1/+1
Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: VGA black screen from s3 when attached to hookHersen Wu1-1/+1
[Description] For MST, DC already notify MST sink for MST mode, DC stll check DP SINK DPCD register to see if MST enabled. DP RX firmware may not handle this properly. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Rearchitecture HDMI HPDJohn Barberiz2-0/+36
- Disabled HPD filter and used HPD software timer instead - Allows DM to disable HPD filtering Signed-off-by: John Barberiz <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Fix potential uninitialized use of 'idle' in amdgpu_ids.cHarry Wentland1-1/+2
v2: Use NULL and reverse christmas tree ordering Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Unify the dm resume calls into oneMikita Lipski2-10/+3
amdgpu_dm_display_resume is now called from dm_resume to unify DAL resume call into a single function call There is no more need to separately call 2 resume functions for DM. Initially they were separated to resume display state after cursor is pinned. But because there is no longer any corruption with the cursor - the calls can be merged into one function hook. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Add a missing lock for drm_mm_takedownMikita Lipski1-1/+1
Inside amdgpu_gtt_mgr_fini add a missing lock to maintain locking balance Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: cleanup VCN IB generationChristian König1-69/+18
Start to use amdgpu_bo_create_reserved v2. v2: Fix missing pointer init to NULL. Remove extra new lines. Signed-off-by: Christian König <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Tested-and-Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: fix and cleanup UVD IB generationChristian König1-68/+38
We didn't synced the BO after validating it. Also sart to use amdgpu_bo_create_reserved to simplify things. Signed-off-by: Christian König <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove unused CFLAGS entry in DML MakefileHarry Wentland1-1/+0
Missed that with a previous change that removed unused files. Signed-off-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/radeon: remove extra TT unpopulated checkChristian König1-3/+0
The subsystem should check that, not the driver. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: remove extra TT unpopulated checkChristian König1-3/+0
The subsystem should check that, not the driver. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/ttm: add ttm_tt_populate wrapperChristian König4-9/+24
Stop calling the driver callback directly. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19amdgpu/dc/calcs: Support clang option for stack alignmentMatthias Kaehlcke1-1/+7
calcs uses the compiler option -mpreferred-stack-boundary=4 to configure a stack alignment of 16 bytes. Clang uses the option -mstack-alignment instead, which expects as parameter the alignment in bytes, and not a power of two like -mpreferred-stack-boundary. Probe for both compiler options and use the correct one, similar to what is done in arch/x86/Makefile. Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19amdgpu/dc/dml: Support clang option for stack alignmentMatthias Kaehlcke1-1/+7
DML uses the compiler option -mpreferred-stack-boundary=4 to configure a stack alignment of 16 bytes. Clang uses the option -mstack-alignment instead, which expects as parameter the alignment in bytes, and not a power of two like -mpreferred-stack-boundary. Probe for both compiler options and use the correct one, similar to what is done in arch/x86/Makefile. Reported-by: Guenter Roeck <[email protected]> Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19amdgpu/dc/calcs: Consolidate redundant CFLAGSMatthias Kaehlcke1-3/+5
Use a variable for common CFLAGS instead of specifying the same flags for every source file. Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19amdgpu/dc/dml: Consolidate redundant CFLAGSMatthias Kaehlcke1-7/+8
Use a variable for common CFLAGS instead of specifying the same flags for every source file. Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Add place holder for soc15 asic init on emulationShaoyun Liu4-15/+40
Add common smu_soc_asic_init function to emulate the sillicon post sequence Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Double the timeout count on emulation modeShaoyun Liu1-0/+2
Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Avoid get vram info from atom bios on emulation modeShaoyun Liu1-1/+2
Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Fix none-powerplay issue when load driver on emulation modeShaoyun Liu2-0/+11
On emulation mode , driver will be loaded with powerplay disabled Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Basic emulation supportShaoyun Liu3-3/+28
Add amdgpu_emu_mode module parameter to control the emulation mode Avoid vbios operation on emulation since there is no vbios post duirng emulation, use the common hw_init to simulate the post Signed-off-by: Shaoyun Liu <[email protected]> Acked-By: Alex Deucher <[email protected]> Acked-By: Christian Konig <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: add new device to use atpx quirkKai-Heng Feng1-0/+1
The affected system (0x0813) is pretty similar to another one (0x0812), it also needs to use ATPX power control. Signed-off-by: Kai-Heng Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-19drm/amd/pp: Restore power profile mode in auto dpm level on Vega10Rex Zhu2-3/+8
As auto power profile mode still not support on vega10, so just restore default profile mode in auto dpm level. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Get/set dgpu power cap via hwmon APIRex Zhu1-0/+75
v2: change power unit to microWatt Adust power limit through power1_cap Get min/max power limit through power1_cap_min/power1_cap_max Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/pp: Expose set/get_power_limit for DGPURex Zhu7-6/+77
User can change power limit between [0, 1] * max power limit. Set power limit to 0, restore to max power limit. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19amdgpu/dc: Fix enum mismatch in calls to program_color_matrix()Matthias Kaehlcke2-2/+2
The driver passes GRAPHICS_CSC_ADJUST_TYPE_SW of type enum graphics_csc_adjust_type to program_color_matrix(), however the function expects a parameter of type enum grph_color_adjust_option. Supposedly the intention was to pass GRPH_COLOR_MATRIX_SW, which has the same value as GRAPHICS_CSC_ADJUST_TYPE_SW, so the mismatch didn't cause any trouble. Pass GRPH_COLOR_MATRIX_SW to program_color_matrix() instead of GRAPHICS_CSC_ADJUST_TYPE_SW, this also fixes the following warning when building the kernel with clang: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.c:1129:24: error: implicit conversion from enumeration type 'enum graphics_csc_adjust_type' to different enumeration type 'enum grph_color_adjust_option' [-Werror,-Wenum-conversion] xfm_dce, tbl_entry, GRAPHICS_CSC_ADJUST_TYPE_SW); Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove extra pairs of parentheses in dce_calcs.cMatthias Kaehlcke1-11/+11
The double parentheses are not needed. Removing them fixes multiple warnings like this when building with clang: drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:617:42: error: equality comparison with extraneous parentheses [-Werror,-Wparentheses-equality] if ((data->graphics_micro_tile_mode == bw_def_rotated_micro_tiling)) { Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Guenter Roeck <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: Enable ip block bit mask print out info by defaultShaoyun Liu1-1/+1
Signed-off-by: Shaoyun Liu <[email protected]> Reviewed-by: Christian Konig <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: Remove extra pair of parenthesesMatthias Kaehlcke1-1/+1
The double parentheses are not needed. Removing them fixes the following warning when building with clang: drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c:419:29: error: equality comparison with extraneous parentheses [-Werror,-Wparentheses-equality] if ((data->vdd_gfx_control == SMU7_VOLTAGE_CONTROL_BY_SVID2)) { Reviewed-by: Guenter Roeck <[email protected]> Signed-off-by: Matthias Kaehlcke <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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