aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2020-03-12mtd: spinand: micron: Describe the SPI NAND device MT29F2G01ABAGDShivamurthy Shastri1-0/+1
Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage details as a comment. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-12mtd: spinand: micron: Generalize the OOB layout structure and function namesShivamurthy Shastri1-14/+14
In order to add new Micron SPI NAND devices, we generalized the OOB layout structure and function names. Signed-off-by: Shivamurthy Shastri <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: spi-nor: remove mtk-quadspi driverChuanhong Guo3-574/+0
This driver is superseded by the new spi-mtk-nor driver. Signed-off-by: Chuanhong Guo <[email protected]> Acked-by: Tudor Ambarus <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-03-11dt-bindings: convert mtk-quadspi binding doc for spi-mtk-norChuanhong Guo1-9/+6
spi-mtk-nor is a driver to replace mtk-quadspi and they have almost the same device-tree bindings. Reuse this binding documentation and convert it for new driver: 1. "Mediatek SoCs" -> "Mediatek ARM SoCs" because MTK MIPS SoCs use different controllers. 2. document "interrupts" as a required property because it's available on all SoCs with this controller and new driver takes advantages of it. It's implemented as optional only to maintain backward compatibility. 3. add a dummy interrupt binding in example. Signed-off-by: Chuanhong Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-03-11spi: add support for mediatek spi-nor controllerChuanhong Guo3-0/+700
This is a driver for mtk spi-nor controller using spi-mem interface. The same controller already has limited support provided by mtk-quadspi driver under spi-nor framework and this new driver is a replacement for the old one. Comparing to the old driver, this driver has following advantages: 1. It can handle any full-duplex spi transfer up to 6 bytes, and this is implemented using generic spi interface. 2. It take account into command opcode properly. The reading routine in this controller can only use 0x03 or 0x0b as opcode on 1-1-1 transfers, but old driver doesn't implement this properly. This driver checks supported opcode explicitly and use (1) to perform unmatched operations. 3. It properly handles SFDP reading. Old driver can't read SFDP due to the bug mentioned in (2). 4. It can do 1-2-2 and 1-4-4 fast reading on spi-nor. These two ops requires parsing SFDP, which isn't possible in old driver. And the old driver is only flagged to support 1-1-2 mode. 5. It takes advantage of the DMA feature in this controller for long reads and supports IRQ on DMA requests to free cpu cycles from polling status registers on long DMA reading. It achieves up to 17.5MB/s reading speed (1-4-4 mode) which is way faster than the old one. IRQ is implemented as optional to maintain backward compatibility. Signed-off-by: Chuanhong Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-03-11spi: make spi-max-frequency optionalChuanhong Guo1-7/+2
We only need a spi-max-frequency when we specifically request a spi frequency lower than the max speed of spi host. This property is already documented as optional property and current host drivers are implemented to operate at highest speed possible when spi->max_speed_hz is 0. This patch makes spi-max-frequency an optional property so that we could just omit it to use max controller speed. Signed-off-by: Chuanhong Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2020-03-11mtd: rawnand: brcmnand: Add support for flash-edu for dma transfersKamal Dasu1-6/+287
Legacy mips soc platforms that have controller v5.0 and 6.0 use flash-edu block for dma transfers. This change adds support for nand dma transfers using the EDU block. Signed-off-by: Kamal Dasu <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11arch: mips: brcm: Add 7425 flash-edu supportKamal Dasu1-2/+2
Nand controller v5.0 and v6.0 have nand edu blocks that enable dma nand flash transfers. This allows for faster read and write access. Signed-off-by: Kamal Dasu <[email protected]> Acked-by: Paul Burton <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11dt: bindings: brcmnand: Add support for flash-eduKamal Dasu1-5/+5
Adding support for EBI DMA unit (EDU). Signed-off-by: Kamal Dasu <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: reinit completion before executing a new commandPiotr Sroka1-0/+1
Reing the completion object before executing CDMA command to make sure the 'done' flag is OK. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: [email protected] Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: change bad block marker sizePiotr Sroka1-6/+3
Increase bad block marker size from one byte to two bytes. Bad block marker is handled by skip bytes feature of HPNFC. Controller expects this value to be an even number. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: [email protected] Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: fix the calculation of the avaialble OOB sizePiotr Sroka1-1/+2
The value of cdns_chip->sector_count is not known at the moment of the derivation of ecc_size, leading to a zero value. Fix this by assigning ecc_size later in the code. Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem") Cc: [email protected] Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: cadence: get meta data size from registersPiotr Sroka1-7/+14
Add checking size of BCH meta data size in capabilities registers instead of using fixed value. BCH meta data is used to keep data from NAND flash OOB area. Signed-off-by: Piotr Sroka <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: Macronix: Add support for block protectionMason Yang1-0/+72
Macronix AC/AD series support using SET_FEATURES to change block protection and unprotection. Block protection support can be checked with GET_FEATURES. Signed-off-by: Mason Yang <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: Add support for manufacturer specific lock/unlock operationMason Yang2-2/+39
Add nand_lock() & nand_unlock() for manufacturer specific lock & unlock operation while the device supports Block Portection function. Signed-off-by: Mason Yang <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: ingenic: Add dependency on MIPS || COMPILE_TESTPaul Cercueil1-0/+1
This driver has no arch-specific instructions but is only ever useful on MIPS; so disable this driver if we're not compiling for MIPS, unless the driver is compile-tested. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: stm32_fmc2: Use dma_request_chan() instead ↵Peter Ujfalusi1-7/+37
dma_request_slave_channel() dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. Use using dma_request_chan() directly and inform user of error in case the DMA request failed. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: qcom: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi1-17/+33
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. Use using dma_request_chan() directly to return the real error code. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: qcom: Release resources on failure within qcom_nandc_alloc()Peter Ujfalusi1-27/+34
In case when DMA channel request or alloc_bam_transaction() fails, dma_unmap_single() and any channels already requested should be released. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: sunxi: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi1-5/+10
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. By using dma_request_chan() directly the driver can support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <[email protected]> Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: marvell: Use dma_request_chan() instead ↵Peter Ujfalusi1-5/+8
dma_request_slave_channel() dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. Use using dma_request_chan() directly to return the real error code. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: marvell: Release DMA channel on errorPeter Ujfalusi1-6/+19
Release the DMA channel on errors after the channel has been successfully requested. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: gpmi: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi1-10/+11
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. Use using dma_request_chan() directly to return the real error code. Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: Replace zero-length array with flexible-array memberGustavo A. R. Silva6-6/+6
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <[email protected]> Acked-by: Masahiro Yamada <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/20200226222722.GA18020@embeddedor
2020-03-11mtd: rawnand: Fix a typo ("manufecturer")Jonathan Neuschäfer1-1/+1
Signed-off-by: Jonathan Neuschäfer <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: spinand: Do not erase the block before writing a bad block markerFrieder Schrempf1-3/+0
Currently when marking a block, we use spinand_erase_op() to erase the block before writing the marker to the OOB area. Doing so without waiting for the operation to finish can lead to the marking failing silently and no bad block marker being written to the flash. In fact we don't need to do an erase at all before writing the BBM. The ECC is disabled for raw accesses to the OOB data and we don't need to work around any issues with chips reporting ECC errors as it is known to be the case for raw NAND. Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs") Cc: [email protected] Signed-off-by: Frieder Schrempf <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOBFrieder Schrempf1-0/+1
When writing the bad block marker to the OOB area the access mode should be set to MTD_OPS_RAW as it is done for reading the marker. Currently this only works because req.mode is initialized to MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for req.mode != MTD_OPS_AUTO_OOB. Fix this by explicitly setting req.mode to MTD_OPS_RAW. Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs") Signed-off-by: Frieder Schrempf <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: spinand: Stop using spinand->oobbuf for buffering bad block markersFrieder Schrempf1-7/+7
For reading and writing the bad block markers, spinand->oobbuf is currently used as a buffer for the marker bytes. During the underlying read and write operations to actually get/set the content of the OOB area, the content of spinand->oobbuf is reused and changed by accessing it through spinand->oobbuf and/or spinand->databuf. This is a flaw in the original design of the SPI NAND core and at the latest from 13c15e07eedf ("mtd: spinand: Handle the case where PROGRAM LOAD does not reset the cache") on, it results in not having the bad block marker written at all, as the spinand->oobbuf is cleared to 0xff after setting the marker bytes to zero. To fix it, we now just store the two bytes for the marker on the stack and let the read/write operations copy it from/to the page buffer later. Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs") Cc: [email protected] Signed-off-by: Frieder Schrempf <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11dt-bindings: mtd: Document Macronix NAND device bindingsMason Yang1-0/+27
Document the bindings used by the Macronix NAND device. Signed-off-by: Mason Yang <[email protected]> Reviewed-by: Rob Herring <[email protected]> [<[email protected]: Fix typos] Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: Add support for Macronix NAND randomizerMason Yang1-0/+81
Macronix NANDs support randomizer operation for user data scrambled, which can be enabled with a SET_FEATURE. User data written to the NAND device without randomizer is still readable after randomizer function enabled. The penalty of randomizer are subpage accesses prohibited and more time period is needed in program operation and entering deep power-down mode. i.e., tPROG 300us to 340us(randomizer enabled) For more high-reliability concern, if subpage write not available with hardware ECC and then to enable randomizer is recommended by default. Driver checks byte 167 of Vendor Blocks in ONFI parameter page table to see if this high-reliability function is supported. By adding a new specific DT property in children nodes to enable randomizer function. Signed-off-by: Mason Yang <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: ams-delta: Rename structures and functions to gpio_nand*Janusz Krzysztofik1-44/+42
Another step in preparation for merging the driver with "gpio-nand". Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: ams-delta: Make the driver custom I/O readyJanusz Krzysztofik1-6/+26
In order to be merged with "gpio-nand", the driver must support custom (non-GPIO) I/O accessors. Allow platforms to omit data GPIO port as well as NWE pin info from device setup. For the driver to still work on such platform, custom I/O accessors as well as a custom probe function which initialises the driver private structure with those accessors must be added to the driver. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: ams-delta: Drop useless local variableJanusz Krzysztofik1-5/+3
For consistency with adjacent code patterns used in the driver probe function, store data GPIO array pointer directly in a respective field of the driver private structure instead of storing it intermediately in a local variable for error checking. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: ams-delta: Support custom driver initialisationJanusz Krzysztofik1-0/+11
In preparation for extending the driver with custom I/O support, try to obtain device specific initialisation routine from a matching device table entry and run it as an additional step of device probe. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: rawnand: ams-delta: Add module device tablesJanusz Krzysztofik1-0/+18
In preparation for merging the driver with "gpio-nand", introduce module device tables where new device models can be accommodated as soon as respective support is added. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: lpddr: Fix a double free in probe()Dan Carpenter1-1/+0
This function is only called from lpddr_probe(). We free "lpddr" both here and in the caller, so it's a double free. The best place to free "lpddr" is in lpddr_probe() so let's delete this one. Fixes: 8dc004395d5e ("[MTD] LPDDR qinfo probing.") Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11MAINTAINERS: Add staging branch for HyperBusVignesh Raghavendra1-0/+3
Update HyperBus entry with branch used to stage patches under mtd.git. Also, add mailing list and patchwork queue information. Signed-off-by: Vignesh Raghavendra <[email protected]> Acked-by: Miquel Raynal <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: fix spelling mistake "BlockMultiplerBits" -> "BlockMultiplierBits"Colin Ian King2-2/+2
There is a spelling mistake (missing i) in pr_info messages. Fix these. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-11mtd: implement proper partition handlingMiquel Raynal5-605/+478
Instead of collecting partitions in a flat list, create a hierarchy within the mtd_info structure: use a partitions list to keep track of the partitions of an MTD device (which might be itself a partition of another MTD device), a pointer to the parent device (NULL when the MTD device is the root one, not a partition). By also saving directly in mtd_info the offset of the partition, we can get rid of the mtd_part structure. While at it, be consistent in the naming of the mtd_info structures to ease the understanding of the new hierarchy: these structures are usually called 'mtd', unless there are multiple instances of the same structure. In this case, there is usually a parent/child bound so we will call them 'parent' and 'child'. Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Handle more GPIO pins as optionalJanusz Krzysztofik1-2/+4
In order to make the driver more useful on platforms other than Amstrad Delta, allow GPIO descriptor pointers of possibly non-critical NWP and NCE pins to be initialised as NULL. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Make read pulses optionalJanusz Krzysztofik1-3/+6
Allow platforms to omit NRE pin from device configuration by requesting that pin as optional. In that case, also don't apply read pulse width from chip SDR timings. There should be no need for further code adjustments as gpiolib can handle NULL GPIO descriptor pointers. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Don't hardcode read/write pulse widthsJanusz Krzysztofik1-2/+27
Instead of forcing Amstrad Delta specific read/write pulse widths, use variables initialised from respective fields of chip SDR timings. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Push inversion handling to gpiolibJanusz Krzysztofik2-15/+19
Let platforms take care of declaring correct GPIO pin polarity so we can just ask a GPIO line to be asserted or deasserted and gpiolib deals with the rest depending on how the platform is configured. Inspired by similar changes to regulator drivers by Linus Walleij <[email protected]>, thanks! Signed-off-by: Janusz Krzysztofik <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Enable OF partition info supportJanusz Krzysztofik1-0/+1
Provide MTD layer with device OF node info required by OF partition parser. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Drop board specific partition infoJanusz Krzysztofik1-27/+2
Now as we support fetching partition info from device platform data and the Amstrad Delta board file provides that info, drop it from the driver code. v2: rebase on top of gpio_nand_platdata extension Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09ARM: OMAP1: ams-delta: Provide board specific partition infoJanusz Krzysztofik1-0/+35
Now as the Amstrad Delta NAND driver supports fetching information on MTD partitions from device platform data, add partition info to the NAND device configuration. Signed-off-by: Janusz Krzysztofik <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Use struct gpio_nand_platdataJanusz Krzysztofik1-2/+10
In order to be able to move the hardcoded Amstrad Delta partition info from the driver code to the board file, reuse gpio_nand_platdata structure owned by "gpio-nand" driver and try to obtain information on device partitions from device platform data. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ams-delta: Write protect device during probeJanusz Krzysztofik1-2/+16
Initialise NWP GPIO pin as asserted to protect the device from hazard during setup of other GPIO pins. Signed-off-by: Janusz Krzysztofik <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: rawnand: ingenic: Use devm_platform_ioremap_resource()Paul Cercueil1-3/+1
Use devm_platform_ioremap_resource() instead of platform_get_resource() + devm_ioremap_resource(). Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
2020-03-09mtd: spinand: rework detect procedure for different READ_ID operationChuanhong Guo8-203/+157
Currently there are 3 different variants of read_id implementation: 1. opcode only. Found in GD5FxGQ4xF. 2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E 3. opcode + 1 dummy byte. Found in other currently supported chips. Original implementation was for variant 1 and let detect function of chips with variant 2 and 3 to ignore the first byte. This isn't robust: 1. For chips of variant 2, if SPI master doesn't keep MOSI low during read, chip will get a random id offset, and the entire id buffer will shift by that offset, causing detect failure. 2. For chips of variant 1, if it happens to get a devid that equals to manufacture id of variant 2 or 3 chips, it'll get incorrectly detected. This patch reworks detect procedure to address problems above. New logic do detection for all variants separatedly, in 1-2-3 order. Since all current detect methods do exactly the same id matching procedure, unify them into core.c and remove detect method from manufacture_ops. Tested on GD5F1GQ4UAYIG and W25N01GVZEIG. Signed-off-by: Chuanhong Guo <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
Powered by cgit, Gruvboxed by Blaster4385.