diff options
Diffstat (limited to 'sound/soc/sof/amd')
| -rw-r--r-- | sound/soc/sof/amd/acp-common.c | 1 | ||||
| -rw-r--r-- | sound/soc/sof/amd/acp-ipc.c | 4 | ||||
| -rw-r--r-- | sound/soc/sof/amd/acp.c | 14 | ||||
| -rw-r--r-- | sound/soc/sof/amd/acp.h | 5 |
4 files changed, 20 insertions, 4 deletions
diff --git a/sound/soc/sof/amd/acp-common.c b/sound/soc/sof/amd/acp-common.c index 3a0c7688dcfe..2d72c6d55dc8 100644 --- a/sound/soc/sof/amd/acp-common.c +++ b/sound/soc/sof/amd/acp-common.c @@ -13,7 +13,6 @@ #include "../sof-priv.h" #include "../sof-audio.h" #include "../ops.h" -#include "../sof-audio.h" #include "acp.h" #include "acp-dsp-offset.h" #include <sound/sof/xtensa.h> diff --git a/sound/soc/sof/amd/acp-ipc.c b/sound/soc/sof/amd/acp-ipc.c index fcb54f545fea..2743f07a5e08 100644 --- a/sound/soc/sof/amd/acp-ipc.c +++ b/sound/soc/sof/amd/acp-ipc.c @@ -3,7 +3,7 @@ // This file is provided under a dual BSD/GPLv2 license. When using or // redistributing this file, you may do so under either license. // -// Copyright(c) 2021 Advanced Micro Devices, Inc. +// Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. // // Authors: Balakishore Pati <Balakishore.pati@amd.com> // Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> @@ -188,13 +188,11 @@ irqreturn_t acp_sof_ipc_irq_thread(int irq, void *context) dsp_ack = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_ack_write); if (dsp_ack) { - spin_lock_irq(&sdev->ipc_lock); /* handle immediate reply from DSP core */ acp_dsp_ipc_get_reply(sdev); snd_sof_ipc_reply(sdev, 0); /* set the done bit */ acp_dsp_ipc_dsp_done(sdev); - spin_unlock_irq(&sdev->ipc_lock); ipc_irq = true; } diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index 603ea5fc0d0d..32a741fcb84f 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -278,6 +278,17 @@ int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr, return ret; } + /* psp_send_cmd only required for vangogh platform (rev - 5) */ + if (desc->rev == 5) { + /* Modify IRAM and DRAM size */ + ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | IRAM_DRAM_FENCE_2); + if (ret) + return ret; + ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | MBOX_ISREADY_FLAG); + if (ret) + return ret; + } + ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER, fw_qualifier, fw_qualifier & DSP_FW_RUN_ENABLE, ACP_REG_POLL_INTERVAL, ACP_DMA_COMPLETE_TIMEOUT_US); @@ -343,11 +354,13 @@ static irqreturn_t acp_irq_thread(int irq, void *context) const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); unsigned int count = ACP_HW_SEM_RETRY_COUNT; + spin_lock_irq(&sdev->ipc_lock); while (snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->hw_semaphore_offset)) { /* Wait until acquired HW Semaphore lock or timeout */ count--; if (!count) { dev_err(sdev->dev, "%s: Failed to acquire HW lock\n", __func__); + spin_unlock_irq(&sdev->ipc_lock); return IRQ_NONE; } } @@ -356,6 +369,7 @@ static irqreturn_t acp_irq_thread(int irq, void *context) /* Unlock or Release HW Semaphore */ snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->hw_semaphore_offset, 0x0); + spin_unlock_irq(&sdev->ipc_lock); return IRQ_HANDLED; }; diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index c536cfde0e44..c645aee216fd 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -74,9 +74,14 @@ #define MP0_C2PMSG_114_REG 0x3810AC8 #define MP0_C2PMSG_73_REG 0x3810A24 #define MBOX_ACP_SHA_DMA_COMMAND 0x70000 +#define MBOX_ACP_IRAM_DRAM_FENCE_COMMAND 0x80000 #define MBOX_DELAY_US 1000 #define MBOX_READY_MASK 0x80000000 #define MBOX_STATUS_MASK 0xFFFF +#define MBOX_ISREADY_FLAG 0x40000000 +#define IRAM_DRAM_FENCE_0 0X0 +#define IRAM_DRAM_FENCE_1 0X01 +#define IRAM_DRAM_FENCE_2 0X02 #define BOX_SIZE_512 0x200 #define BOX_SIZE_1024 0x400 |