diff options
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/twl6040.h | 46 | ||||
| -rw-r--r-- | include/linux/mfd/wm831x/core.h | 12 | ||||
| -rw-r--r-- | include/linux/mfd/wm831x/pdata.h | 3 | ||||
| -rw-r--r-- | include/linux/mfd/wm8400-private.h | 7 | ||||
| -rw-r--r-- | include/linux/mfd/wm8994/core.h | 10 | ||||
| -rw-r--r-- | include/linux/mfd/wm8994/registers.h | 88 |
6 files changed, 124 insertions, 42 deletions
diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h index 4c806f6d663e..2463c2619596 100644 --- a/include/linux/mfd/twl6040.h +++ b/include/linux/mfd/twl6040.h @@ -68,11 +68,6 @@ #define TWL6040_REG_ACCCTL 0x2D #define TWL6040_REG_STATUS 0x2E -#define TWL6040_CACHEREGNUM (TWL6040_REG_STATUS + 1) - -#define TWL6040_VIOREGNUM 18 -#define TWL6040_VDDREGNUM 21 - /* INTID (0x03) fields */ #define TWL6040_THINT 0x01 @@ -125,34 +120,24 @@ #define TWL6040_LPLLFIN 0x08 #define TWL6040_HPLLSEL 0x10 -/* HSLCTL (0x10) fields */ - -#define TWL6040_HSDACMODEL 0x02 -#define TWL6040_HSDRVMODEL 0x08 - -/* HSRCTL (0x11) fields */ +/* HSLCTL/R (0x10/0x11) fields */ -#define TWL6040_HSDACMODER 0x02 -#define TWL6040_HSDRVMODER 0x08 +#define TWL6040_HSDACENA (1 << 0) +#define TWL6040_HSDACMODE (1 << 1) +#define TWL6040_HSDRVMODE (1 << 3) -/* VIBCTLL (0x18) fields */ +/* VIBCTLL/R (0x18/0x1A) fields */ -#define TWL6040_VIBENAL 0x01 -#define TWL6040_VIBCTRLL 0x04 -#define TWL6040_VIBCTRLLP 0x08 -#define TWL6040_VIBCTRLLN 0x10 +#define TWL6040_VIBENA (1 << 0) +#define TWL6040_VIBSEL (1 << 1) +#define TWL6040_VIBCTRL (1 << 2) +#define TWL6040_VIBCTRL_P (1 << 3) +#define TWL6040_VIBCTRL_N (1 << 4) -/* VIBDATL (0x19) fields */ +/* VIBDATL/R (0x19/0x1B) fields */ #define TWL6040_VIBDAT_MAX 0x64 -/* VIBCTLR (0x1A) fields */ - -#define TWL6040_VIBENAR 0x01 -#define TWL6040_VIBCTRLR 0x04 -#define TWL6040_VIBCTRLRP 0x08 -#define TWL6040_VIBCTRLRN 0x10 - /* GPOCTL (0x1E) fields */ #define TWL6040_GPO1 0x01 @@ -200,6 +185,7 @@ struct twl6040 { int audpwron; int power_count; int rev; + u8 vibra_ctrl_cache[2]; int pll; unsigned int sysclk; @@ -224,5 +210,13 @@ int twl6040_get_pll(struct twl6040 *twl6040); unsigned int twl6040_get_sysclk(struct twl6040 *twl6040); int twl6040_irq_init(struct twl6040 *twl6040); void twl6040_irq_exit(struct twl6040 *twl6040); +/* Get the combined status of the vibra control register */ +int twl6040_get_vibralr_status(struct twl6040 *twl6040); + +static inline int twl6040_get_revid(struct twl6040 *twl6040) +{ + return twl6040->rev; +} + #endif /* End of __TWL6040_CODEC_H__ */ diff --git a/include/linux/mfd/wm831x/core.h b/include/linux/mfd/wm831x/core.h index 8dda8ded5cda..ed8fe0d04097 100644 --- a/include/linux/mfd/wm831x/core.h +++ b/include/linux/mfd/wm831x/core.h @@ -18,6 +18,7 @@ #include <linux/completion.h> #include <linux/interrupt.h> #include <linux/list.h> +#include <linux/regmap.h> /* * Register values. @@ -361,12 +362,8 @@ struct wm831x { struct mutex io_lock; struct device *dev; - int (*read_dev)(struct wm831x *wm831x, unsigned short reg, - int bytes, void *dest); - int (*write_dev)(struct wm831x *wm831x, unsigned short reg, - int bytes, void *src); - void *control_data; + struct regmap *regmap; int irq; /* Our chip IRQ */ struct mutex irq_lock; @@ -374,6 +371,8 @@ struct wm831x { int irq_masks_cur[WM831X_NUM_IRQ_REGS]; /* Currently active value */ int irq_masks_cache[WM831X_NUM_IRQ_REGS]; /* Cached hardware value */ + bool soft_shutdown; + /* Chip revision based flags */ unsigned has_gpio_ena:1; /* Has GPIO enable bit */ unsigned has_cs_sts:1; /* Has current sink status bit */ @@ -412,8 +411,11 @@ int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg, int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq); void wm831x_device_exit(struct wm831x *wm831x); int wm831x_device_suspend(struct wm831x *wm831x); +void wm831x_device_shutdown(struct wm831x *wm831x); int wm831x_irq_init(struct wm831x *wm831x, int irq); void wm831x_irq_exit(struct wm831x *wm831x); void wm831x_auxadc_init(struct wm831x *wm831x); +extern struct regmap_config wm831x_regmap_config; + #endif diff --git a/include/linux/mfd/wm831x/pdata.h b/include/linux/mfd/wm831x/pdata.h index 0ba24599fe51..1d7a3f7b3b5d 100644 --- a/include/linux/mfd/wm831x/pdata.h +++ b/include/linux/mfd/wm831x/pdata.h @@ -123,6 +123,9 @@ struct wm831x_pdata { /** Disable the touchscreen */ bool disable_touch; + /** The driver should initiate a power off sequence during shutdown */ + bool soft_shutdown; + int irq_base; int gpio_base; int gpio_defaults[WM831X_GPIO_NUM]; diff --git a/include/linux/mfd/wm8400-private.h b/include/linux/mfd/wm8400-private.h index 2aab4e93a5c9..0147b6968510 100644 --- a/include/linux/mfd/wm8400-private.h +++ b/include/linux/mfd/wm8400-private.h @@ -25,16 +25,15 @@ #include <linux/mutex.h> #include <linux/platform_device.h> +struct regmap; + #define WM8400_REGISTER_COUNT 0x55 struct wm8400 { struct device *dev; - int (*read_dev)(void *data, char reg, int count, u16 *dst); - int (*write_dev)(void *data, char reg, int count, const u16 *src); - struct mutex io_lock; - void *io_data; + struct regmap *regmap; u16 reg_cache[WM8400_REGISTER_COUNT]; diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h index f0b69cdae41c..626809147624 100644 --- a/include/linux/mfd/wm8994/core.h +++ b/include/linux/mfd/wm8994/core.h @@ -20,10 +20,12 @@ enum wm8994_type { WM8994 = 0, WM8958 = 1, + WM1811 = 2, }; struct regulator_dev; struct regulator_bulk_data; +struct regmap; #define WM8994_NUM_GPIO_REGS 11 #define WM8994_NUM_LDO_REGS 2 @@ -50,18 +52,12 @@ struct regulator_bulk_data; #define WM8994_IRQ_GPIO(x) (x + WM8994_IRQ_TEMP_WARN) struct wm8994 { - struct mutex io_lock; struct mutex irq_lock; enum wm8994_type type; struct device *dev; - int (*read_dev)(struct wm8994 *wm8994, unsigned short reg, - int bytes, void *dest); - int (*write_dev)(struct wm8994 *wm8994, unsigned short reg, - int bytes, const void *src); - - void *control_data; + struct regmap *regmap; int gpio_base; int irq_base; diff --git a/include/linux/mfd/wm8994/registers.h b/include/linux/mfd/wm8994/registers.h index f3ee84284670..fae295048a8b 100644 --- a/include/linux/mfd/wm8994/registers.h +++ b/include/linux/mfd/wm8994/registers.h @@ -72,6 +72,7 @@ #define WM8994_DC_SERVO_2 0x55 #define WM8994_DC_SERVO_4 0x57 #define WM8994_DC_SERVO_READBACK 0x58 +#define WM8994_DC_SERVO_4E 0x59 #define WM8994_ANALOGUE_HP_1 0x60 #define WM8958_MIC_DETECT_1 0xD0 #define WM8958_MIC_DETECT_2 0xD1 @@ -133,6 +134,8 @@ #define WM8994_AIF1_DAC1_FILTERS_2 0x421 #define WM8994_AIF1_DAC2_FILTERS_1 0x422 #define WM8994_AIF1_DAC2_FILTERS_2 0x423 +#define WM8958_AIF1_DAC1_NOISE_GATE 0x430 +#define WM8958_AIF1_DAC2_NOISE_GATE 0x431 #define WM8994_AIF1_DRC1_1 0x440 #define WM8994_AIF1_DRC1_2 0x441 #define WM8994_AIF1_DRC1_3 0x442 @@ -190,6 +193,7 @@ #define WM8994_AIF2_ADC_FILTERS 0x510 #define WM8994_AIF2_DAC_FILTERS_1 0x520 #define WM8994_AIF2_DAC_FILTERS_2 0x521 +#define WM8958_AIF2_DAC_NOISE_GATE 0x530 #define WM8994_AIF2_DRC_1 0x540 #define WM8994_AIF2_DRC_2 0x541 #define WM8994_AIF2_DRC_3 0x542 @@ -1921,6 +1925,44 @@ #define WM8994_LDO2_DISCH_WIDTH 1 /* LDO2_DISCH */ /* + * R61 (0x3D) - MICBIAS1 + */ +#define WM8958_MICB1_RATE 0x0020 /* MICB1_RATE */ +#define WM8958_MICB1_RATE_MASK 0x0020 /* MICB1_RATE */ +#define WM8958_MICB1_RATE_SHIFT 5 /* MICB1_RATE */ +#define WM8958_MICB1_RATE_WIDTH 1 /* MICB1_RATE */ +#define WM8958_MICB1_MODE 0x0010 /* MICB1_MODE */ +#define WM8958_MICB1_MODE_MASK 0x0010 /* MICB1_MODE */ +#define WM8958_MICB1_MODE_SHIFT 4 /* MICB1_MODE */ +#define WM8958_MICB1_MODE_WIDTH 1 /* MICB1_MODE */ +#define WM8958_MICB1_LVL_MASK 0x000E /* MICB1_LVL - [3:1] */ +#define WM8958_MICB1_LVL_SHIFT 1 /* MICB1_LVL - [3:1] */ +#define WM8958_MICB1_LVL_WIDTH 3 /* MICB1_LVL - [3:1] */ +#define WM8958_MICB1_DISCH 0x0001 /* MICB1_DISCH */ +#define WM8958_MICB1_DISCH_MASK 0x0001 /* MICB1_DISCH */ +#define WM8958_MICB1_DISCH_SHIFT 0 /* MICB1_DISCH */ +#define WM8958_MICB1_DISCH_WIDTH 1 /* MICB1_DISCH */ + +/* + * R62 (0x3E) - MICBIAS2 + */ +#define WM8958_MICB2_RATE 0x0020 /* MICB2_RATE */ +#define WM8958_MICB2_RATE_MASK 0x0020 /* MICB2_RATE */ +#define WM8958_MICB2_RATE_SHIFT 5 /* MICB2_RATE */ +#define WM8958_MICB2_RATE_WIDTH 1 /* MICB2_RATE */ +#define WM8958_MICB2_MODE 0x0010 /* MICB2_MODE */ +#define WM8958_MICB2_MODE_MASK 0x0010 /* MICB2_MODE */ +#define WM8958_MICB2_MODE_SHIFT 4 /* MICB2_MODE */ +#define WM8958_MICB2_MODE_WIDTH 1 /* MICB2_MODE */ +#define WM8958_MICB2_LVL_MASK 0x000E /* MICB2_LVL - [3:1] */ +#define WM8958_MICB2_LVL_SHIFT 1 /* MICB2_LVL - [3:1] */ +#define WM8958_MICB2_LVL_WIDTH 3 /* MICB2_LVL - [3:1] */ +#define WM8958_MICB2_DISCH 0x0001 /* MICB2_DISCH */ +#define WM8958_MICB2_DISCH_MASK 0x0001 /* MICB2_DISCH */ +#define WM8958_MICB2_DISCH_SHIFT 0 /* MICB2_DISCH */ +#define WM8958_MICB2_DISCH_WIDTH 1 /* MICB2_DISCH */ + +/* * R76 (0x4C) - Charge Pump (1) */ #define WM8994_CP_ENA 0x8000 /* CP_ENA */ @@ -2027,6 +2069,10 @@ /* * R96 (0x60) - Analogue HP (1) */ +#define WM1811_HPOUT1_ATTN 0x0100 /* HPOUT1_ATTN */ +#define WM1811_HPOUT1_ATTN_MASK 0x0100 /* HPOUT1_ATTN */ +#define WM1811_HPOUT1_ATTN_SHIFT 8 /* HPOUT1_ATTN */ +#define WM1811_HPOUT1_ATTN_WIDTH 1 /* HPOUT1_ATTN */ #define WM8994_HPOUT1L_RMV_SHORT 0x0080 /* HPOUT1L_RMV_SHORT */ #define WM8994_HPOUT1L_RMV_SHORT_MASK 0x0080 /* HPOUT1L_RMV_SHORT */ #define WM8994_HPOUT1L_RMV_SHORT_SHIFT 7 /* HPOUT1L_RMV_SHORT */ @@ -2949,6 +2995,34 @@ #define WM8994_AIF1DAC2_3D_ENA_WIDTH 1 /* AIF1DAC2_3D_ENA */ /* + * R1072 (0x430) - AIF1 DAC1 Noise Gate + */ +#define WM8958_AIF1DAC1_NG_HLD_MASK 0x0060 /* AIF1DAC1_NG_HLD - [6:5] */ +#define WM8958_AIF1DAC1_NG_HLD_SHIFT 5 /* AIF1DAC1_NG_HLD - [6:5] */ +#define WM8958_AIF1DAC1_NG_HLD_WIDTH 2 /* AIF1DAC1_NG_HLD - [6:5] */ +#define WM8958_AIF1DAC1_NG_THR_MASK 0x000E /* AIF1DAC1_NG_THR - [3:1] */ +#define WM8958_AIF1DAC1_NG_THR_SHIFT 1 /* AIF1DAC1_NG_THR - [3:1] */ +#define WM8958_AIF1DAC1_NG_THR_WIDTH 3 /* AIF1DAC1_NG_THR - [3:1] */ +#define WM8958_AIF1DAC1_NG_ENA 0x0001 /* AIF1DAC1_NG_ENA */ +#define WM8958_AIF1DAC1_NG_ENA_MASK 0x0001 /* AIF1DAC1_NG_ENA */ +#define WM8958_AIF1DAC1_NG_ENA_SHIFT 0 /* AIF1DAC1_NG_ENA */ +#define WM8958_AIF1DAC1_NG_ENA_WIDTH 1 /* AIF1DAC1_NG_ENA */ + +/* + * R1073 (0x431) - AIF1 DAC2 Noise Gate + */ +#define WM8958_AIF1DAC2_NG_HLD_MASK 0x0060 /* AIF1DAC2_NG_HLD - [6:5] */ +#define WM8958_AIF1DAC2_NG_HLD_SHIFT 5 /* AIF1DAC2_NG_HLD - [6:5] */ +#define WM8958_AIF1DAC2_NG_HLD_WIDTH 2 /* AIF1DAC2_NG_HLD - [6:5] */ +#define WM8958_AIF1DAC2_NG_THR_MASK 0x000E /* AIF1DAC2_NG_THR - [3:1] */ +#define WM8958_AIF1DAC2_NG_THR_SHIFT 1 /* AIF1DAC2_NG_THR - [3:1] */ +#define WM8958_AIF1DAC2_NG_THR_WIDTH 3 /* AIF1DAC2_NG_THR - [3:1] */ +#define WM8958_AIF1DAC2_NG_ENA 0x0001 /* AIF1DAC2_NG_ENA */ +#define WM8958_AIF1DAC2_NG_ENA_MASK 0x0001 /* AIF1DAC2_NG_ENA */ +#define WM8958_AIF1DAC2_NG_ENA_SHIFT 0 /* AIF1DAC2_NG_ENA */ +#define WM8958_AIF1DAC2_NG_ENA_WIDTH 1 /* AIF1DAC2_NG_ENA */ + +/* * R1088 (0x440) - AIF1 DRC1 (1) */ #define WM8994_AIF1DRC1_SIG_DET_RMS_MASK 0xF800 /* AIF1DRC1_SIG_DET_RMS - [15:11] */ @@ -3560,6 +3634,20 @@ #define WM8994_AIF2DAC_3D_ENA_WIDTH 1 /* AIF2DAC_3D_ENA */ /* + * R1328 (0x530) - AIF2 DAC Noise Gate + */ +#define WM8958_AIF2DAC_NG_HLD_MASK 0x0060 /* AIF2DAC_NG_HLD - [6:5] */ +#define WM8958_AIF2DAC_NG_HLD_SHIFT 5 /* AIF2DAC_NG_HLD - [6:5] */ +#define WM8958_AIF2DAC_NG_HLD_WIDTH 2 /* AIF2DAC_NG_HLD - [6:5] */ +#define WM8958_AIF2DAC_NG_THR_MASK 0x000E /* AIF2DAC_NG_THR - [3:1] */ +#define WM8958_AIF2DAC_NG_THR_SHIFT 1 /* AIF2DAC_NG_THR - [3:1] */ +#define WM8958_AIF2DAC_NG_THR_WIDTH 3 /* AIF2DAC_NG_THR - [3:1] */ +#define WM8958_AIF2DAC_NG_ENA 0x0001 /* AIF2DAC_NG_ENA */ +#define WM8958_AIF2DAC_NG_ENA_MASK 0x0001 /* AIF2DAC_NG_ENA */ +#define WM8958_AIF2DAC_NG_ENA_SHIFT 0 /* AIF2DAC_NG_ENA */ +#define WM8958_AIF2DAC_NG_ENA_WIDTH 1 /* AIF2DAC_NG_ENA */ + +/* * R1344 (0x540) - AIF2 DRC (1) */ #define WM8994_AIF2DRC_SIG_DET_RMS_MASK 0xF800 /* AIF2DRC_SIG_DET_RMS - [15:11] */ |