diff options
Diffstat (limited to 'drivers/pci/pci.c')
| -rw-r--r-- | drivers/pci/pci.c | 261 | 
1 files changed, 137 insertions, 124 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 7325d43bf030..63a54a340863 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -106,7 +106,7 @@ static bool pcie_ari_disabled;   * Given a PCI bus, returns the highest PCI bus number present in the set   * including the given PCI bus and its list of child PCI buses.   */ -unsigned char pci_bus_max_busnr(struct pci_bus* bus) +unsigned char pci_bus_max_busnr(struct pci_bus *bus)  {  	struct pci_bus *tmp;  	unsigned char max, n; @@ -114,7 +114,7 @@ unsigned char pci_bus_max_busnr(struct pci_bus* bus)  	max = bus->busn_res.end;  	list_for_each_entry(tmp, &bus->children, node) {  		n = pci_bus_max_busnr(tmp); -		if(n > max) +		if (n > max)  			max = n;  	}  	return max; @@ -226,6 +226,7 @@ int pci_find_capability(struct pci_dev *dev, int cap)  	return pos;  } +EXPORT_SYMBOL(pci_find_capability);  /**   * pci_bus_find_capability - query for devices' capabilities @@ -253,6 +254,7 @@ int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)  	return pos;  } +EXPORT_SYMBOL(pci_bus_find_capability);  /**   * pci_find_next_ext_capability - Find an extended capability @@ -403,8 +405,8 @@ EXPORT_SYMBOL_GPL(pci_find_ht_capability);   *  For given resource region of given device, return the resource   *  region of parent bus the given region is contained in.   */ -struct resource * -pci_find_parent_resource(const struct pci_dev *dev, struct resource *res) +struct resource *pci_find_parent_resource(const struct pci_dev *dev, +					  struct resource *res)  {  	const struct pci_bus *bus = dev->bus;  	struct resource *r; @@ -436,6 +438,7 @@ pci_find_parent_resource(const struct pci_dev *dev, struct resource *res)  	}  	return NULL;  } +EXPORT_SYMBOL(pci_find_parent_resource);  /**   * pci_wait_for_pending - wait for @mask bit(s) to clear in status word @pos @@ -470,8 +473,7 @@ int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask)   * Restore the BAR values for a given device, so as to make it   * accessible by its driver.   */ -static void -pci_restore_bars(struct pci_dev *dev) +static void pci_restore_bars(struct pci_dev *dev)  {  	int i; @@ -496,7 +498,7 @@ static inline bool platform_pci_power_manageable(struct pci_dev *dev)  }  static inline int platform_pci_set_power_state(struct pci_dev *dev, -                                                pci_power_t t) +					       pci_power_t t)  {  	return pci_platform_pm ? pci_platform_pm->set_state(dev, t) : -ENOSYS;  } @@ -553,8 +555,8 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)  	 */  	if (state != PCI_D0 && dev->current_state <= PCI_D3cold  	    && dev->current_state > state) { -		dev_err(&dev->dev, "invalid power transition " -			"(from state %d to %d)\n", dev->current_state, state); +		dev_err(&dev->dev, "invalid power transition (from state %d to %d)\n", +			dev->current_state, state);  		return -EINVAL;  	} @@ -601,8 +603,8 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)  	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  	dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);  	if (dev->current_state != state && printk_ratelimit()) -		dev_info(&dev->dev, "Refused to change power state, " -			"currently in D%d\n", dev->current_state); +		dev_info(&dev->dev, "Refused to change power state, currently in D%d\n", +			 dev->current_state);  	/*  	 * According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT @@ -846,6 +848,7 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)  	return error;  } +EXPORT_SYMBOL(pci_set_power_state);  /**   * pci_choose_state - Choose the power state of a PCI device @@ -884,12 +887,10 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)  	}  	return PCI_D0;  } -  EXPORT_SYMBOL(pci_choose_state);  #define PCI_EXP_SAVE_REGS	7 -  static struct pci_cap_saved_state *_pci_find_saved_cap(struct pci_dev *pci_dev,  						       u16 cap, bool extended)  { @@ -1001,8 +1002,7 @@ static void pci_restore_pcix_state(struct pci_dev *dev)   * pci_save_state - save the PCI configuration space of a device before suspending   * @dev: - PCI device that we're dealing with   */ -int -pci_save_state(struct pci_dev *dev) +int pci_save_state(struct pci_dev *dev)  {  	int i;  	/* XXX: 100% dword access ok here? */ @@ -1017,6 +1017,7 @@ pci_save_state(struct pci_dev *dev)  		return i;  	return 0;  } +EXPORT_SYMBOL(pci_save_state);  static void pci_restore_config_dword(struct pci_dev *pdev, int offset,  				     u32 saved_val, int retry) @@ -1028,8 +1029,8 @@ static void pci_restore_config_dword(struct pci_dev *pdev, int offset,  		return;  	for (;;) { -		dev_dbg(&pdev->dev, "restoring config space at offset " -			"%#x (was %#x, writing %#x)\n", offset, val, saved_val); +		dev_dbg(&pdev->dev, "restoring config space at offset %#x (was %#x, writing %#x)\n", +			offset, val, saved_val);  		pci_write_config_dword(pdev, offset, saved_val);  		if (retry-- <= 0)  			return; @@ -1087,6 +1088,7 @@ void pci_restore_state(struct pci_dev *dev)  	dev->state_saved = false;  } +EXPORT_SYMBOL(pci_restore_state);  struct pci_saved_state {  	u32 config_space[16]; @@ -1231,6 +1233,7 @@ int pci_reenable_device(struct pci_dev *dev)  		return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1);  	return 0;  } +EXPORT_SYMBOL(pci_reenable_device);  static void pci_enable_bridge(struct pci_dev *dev)  { @@ -1305,6 +1308,7 @@ int pci_enable_device_io(struct pci_dev *dev)  {  	return pci_enable_device_flags(dev, IORESOURCE_IO);  } +EXPORT_SYMBOL(pci_enable_device_io);  /**   * pci_enable_device_mem - Initialize a device for use with Memory space @@ -1318,6 +1322,7 @@ int pci_enable_device_mem(struct pci_dev *dev)  {  	return pci_enable_device_flags(dev, IORESOURCE_MEM);  } +EXPORT_SYMBOL(pci_enable_device_mem);  /**   * pci_enable_device - Initialize device before it's used by a driver. @@ -1334,6 +1339,7 @@ int pci_enable_device(struct pci_dev *dev)  {  	return pci_enable_device_flags(dev, IORESOURCE_MEM | IORESOURCE_IO);  } +EXPORT_SYMBOL(pci_enable_device);  /*   * Managed PCI resources.  This manages device on/off, intx/msi/msix @@ -1371,7 +1377,7 @@ static void pcim_release(struct device *gendev, void *res)  		pci_disable_device(dev);  } -static struct pci_devres * get_pci_dr(struct pci_dev *pdev) +static struct pci_devres *get_pci_dr(struct pci_dev *pdev)  {  	struct pci_devres *dr, *new_dr; @@ -1385,7 +1391,7 @@ static struct pci_devres * get_pci_dr(struct pci_dev *pdev)  	return devres_get(&pdev->dev, new_dr, NULL, NULL);  } -static struct pci_devres * find_pci_dr(struct pci_dev *pdev) +static struct pci_devres *find_pci_dr(struct pci_dev *pdev)  {  	if (pci_is_managed(pdev))  		return devres_find(&pdev->dev, pcim_release, NULL, NULL); @@ -1416,6 +1422,7 @@ int pcim_enable_device(struct pci_dev *pdev)  	}  	return rc;  } +EXPORT_SYMBOL(pcim_enable_device);  /**   * pcim_pin_device - Pin managed PCI device @@ -1434,6 +1441,7 @@ void pcim_pin_device(struct pci_dev *pdev)  	if (dr)  		dr->pinned = 1;  } +EXPORT_SYMBOL(pcim_pin_device);  /*   * pcibios_add_device - provide arch specific hooks when adding device dev @@ -1443,7 +1451,7 @@ void pcim_pin_device(struct pci_dev *pdev)   * devices are added. This is the default implementation. Architecture   * implementations can override this.   */ -int __weak pcibios_add_device (struct pci_dev *dev) +int __weak pcibios_add_device(struct pci_dev *dev)  {  	return 0;  } @@ -1468,6 +1476,17 @@ void __weak pcibios_release_device(struct pci_dev *dev) {}   */  void __weak pcibios_disable_device (struct pci_dev *dev) {} +/** + * pcibios_penalize_isa_irq - penalize an ISA IRQ + * @irq: ISA IRQ to penalize + * @active: IRQ active or not + * + * Permits the platform to provide architecture-specific functionality when + * penalizing ISA IRQs. This is the default implementation. Architecture + * implementations can override this. + */ +void __weak pcibios_penalize_isa_irq(int irq, int active) {} +  static void do_pci_disable_device(struct pci_dev *dev)  {  	u16 pci_command; @@ -1504,8 +1523,7 @@ void pci_disable_enabled_device(struct pci_dev *dev)   * Note we don't actually disable the device until all callers of   * pci_enable_device() have called pci_disable_device().   */ -void -pci_disable_device(struct pci_dev *dev) +void pci_disable_device(struct pci_dev *dev)  {  	struct pci_devres *dr; @@ -1523,6 +1541,7 @@ pci_disable_device(struct pci_dev *dev)  	dev->is_busmaster = 0;  } +EXPORT_SYMBOL(pci_disable_device);  /**   * pcibios_set_pcie_reset_state - set reset state for device dev @@ -1551,6 +1570,7 @@ int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)  {  	return pcibios_set_pcie_reset_state(dev, state);  } +EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);  /**   * pci_check_pme_status - Check if given device has generated PME. @@ -1630,6 +1650,7 @@ bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)  	return !!(dev->pme_support & (1 << state));  } +EXPORT_SYMBOL(pci_pme_capable);  static void pci_pme_list_scan(struct work_struct *work)  { @@ -1734,6 +1755,7 @@ void pci_pme_active(struct pci_dev *dev, bool enable)  	dev_dbg(&dev->dev, "PME# %s\n", enable ? "enabled" : "disabled");  } +EXPORT_SYMBOL(pci_pme_active);  /**   * __pci_enable_wake - enable PCI device as wakeup event source @@ -1819,6 +1841,7 @@ int pci_wake_from_d3(struct pci_dev *dev, bool enable)  			pci_enable_wake(dev, PCI_D3cold, enable) :  			pci_enable_wake(dev, PCI_D3hot, enable);  } +EXPORT_SYMBOL(pci_wake_from_d3);  /**   * pci_target_state - find an appropriate low power state for a given PCI dev @@ -1897,6 +1920,7 @@ int pci_prepare_to_sleep(struct pci_dev *dev)  	return error;  } +EXPORT_SYMBOL(pci_prepare_to_sleep);  /**   * pci_back_from_sleep - turn PCI device on during system-wide transition into working state @@ -1909,6 +1933,7 @@ int pci_back_from_sleep(struct pci_dev *dev)  	pci_enable_wake(dev, PCI_D0, false);  	return pci_set_power_state(dev, PCI_D0);  } +EXPORT_SYMBOL(pci_back_from_sleep);  /**   * pci_finish_runtime_suspend - Carry out PCI-specific part of runtime suspend. @@ -2404,8 +2429,7 @@ u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin)  	return (((pin - 1) + slot) % 4) + 1;  } -int -pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge) +int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge)  {  	u8 pin; @@ -2467,6 +2491,7 @@ void pci_release_region(struct pci_dev *pdev, int bar)  	if (dr)  		dr->region_mask &= ~(1 << bar);  } +EXPORT_SYMBOL(pci_release_region);  /**   *	__pci_request_region - Reserved PCI I/O and memory resource @@ -2487,8 +2512,8 @@ void pci_release_region(struct pci_dev *pdev, int bar)   *	Returns 0 on success, or %EBUSY on error.  A warning   *	message is also printed on failure.   */ -static int __pci_request_region(struct pci_dev *pdev, int bar, const char *res_name, -									int exclusive) +static int __pci_request_region(struct pci_dev *pdev, int bar, +				const char *res_name, int exclusive)  {  	struct pci_devres *dr; @@ -2499,8 +2524,7 @@ static int __pci_request_region(struct pci_dev *pdev, int bar, const char *res_n  		if (!request_region(pci_resource_start(pdev, bar),  			    pci_resource_len(pdev, bar), res_name))  			goto err_out; -	} -	else if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) { +	} else if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {  		if (!__request_mem_region(pci_resource_start(pdev, bar),  					pci_resource_len(pdev, bar), res_name,  					exclusive)) @@ -2537,6 +2561,7 @@ int pci_request_region(struct pci_dev *pdev, int bar, const char *res_name)  {  	return __pci_request_region(pdev, bar, res_name, 0);  } +EXPORT_SYMBOL(pci_request_region);  /**   *	pci_request_region_exclusive - Reserved PCI I/O and memory resource @@ -2556,10 +2581,13 @@ int pci_request_region(struct pci_dev *pdev, int bar, const char *res_name)   *	explicitly not allowed to map the resource via /dev/mem or   *	sysfs.   */ -int pci_request_region_exclusive(struct pci_dev *pdev, int bar, const char *res_name) +int pci_request_region_exclusive(struct pci_dev *pdev, int bar, +				 const char *res_name)  {  	return __pci_request_region(pdev, bar, res_name, IORESOURCE_EXCLUSIVE);  } +EXPORT_SYMBOL(pci_request_region_exclusive); +  /**   * pci_release_selected_regions - Release selected PCI I/O and memory resources   * @pdev: PCI device whose resources were previously reserved @@ -2576,9 +2604,10 @@ void pci_release_selected_regions(struct pci_dev *pdev, int bars)  		if (bars & (1 << i))  			pci_release_region(pdev, i);  } +EXPORT_SYMBOL(pci_release_selected_regions);  static int __pci_request_selected_regions(struct pci_dev *pdev, int bars, -				 const char *res_name, int excl) +					  const char *res_name, int excl)  {  	int i; @@ -2589,7 +2618,7 @@ static int __pci_request_selected_regions(struct pci_dev *pdev, int bars,  	return 0;  err_out: -	while(--i >= 0) +	while (--i >= 0)  		if (bars & (1 << i))  			pci_release_region(pdev, i); @@ -2608,13 +2637,15 @@ int pci_request_selected_regions(struct pci_dev *pdev, int bars,  {  	return __pci_request_selected_regions(pdev, bars, res_name, 0);  } +EXPORT_SYMBOL(pci_request_selected_regions); -int pci_request_selected_regions_exclusive(struct pci_dev *pdev, -				 int bars, const char *res_name) +int pci_request_selected_regions_exclusive(struct pci_dev *pdev, int bars, +					   const char *res_name)  {  	return __pci_request_selected_regions(pdev, bars, res_name,  			IORESOURCE_EXCLUSIVE);  } +EXPORT_SYMBOL(pci_request_selected_regions_exclusive);  /**   *	pci_release_regions - Release reserved PCI I/O and memory resources @@ -2629,6 +2660,7 @@ void pci_release_regions(struct pci_dev *pdev)  {  	pci_release_selected_regions(pdev, (1 << 6) - 1);  } +EXPORT_SYMBOL(pci_release_regions);  /**   *	pci_request_regions - Reserved PCI I/O and memory resources @@ -2647,6 +2679,7 @@ int pci_request_regions(struct pci_dev *pdev, const char *res_name)  {  	return pci_request_selected_regions(pdev, ((1 << 6) - 1), res_name);  } +EXPORT_SYMBOL(pci_request_regions);  /**   *	pci_request_regions_exclusive - Reserved PCI I/O and memory resources @@ -2669,6 +2702,7 @@ int pci_request_regions_exclusive(struct pci_dev *pdev, const char *res_name)  	return pci_request_selected_regions_exclusive(pdev,  					((1 << 6) - 1), res_name);  } +EXPORT_SYMBOL(pci_request_regions_exclusive);  static void __pci_set_master(struct pci_dev *dev, bool enable)  { @@ -2738,6 +2772,7 @@ void pci_set_master(struct pci_dev *dev)  	__pci_set_master(dev, true);  	pcibios_set_master(dev);  } +EXPORT_SYMBOL(pci_set_master);  /**   * pci_clear_master - disables bus-mastering for device dev @@ -2747,6 +2782,7 @@ void pci_clear_master(struct pci_dev *dev)  {  	__pci_set_master(dev, false);  } +EXPORT_SYMBOL(pci_clear_master);  /**   * pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is programmed @@ -2779,30 +2815,13 @@ int pci_set_cacheline_size(struct pci_dev *dev)  	if (cacheline_size == pci_cache_line_size)  		return 0; -	dev_printk(KERN_DEBUG, &dev->dev, "cache line size of %d is not " -		   "supported\n", pci_cache_line_size << 2); +	dev_printk(KERN_DEBUG, &dev->dev, "cache line size of %d is not supported\n", +		   pci_cache_line_size << 2);  	return -EINVAL;  }  EXPORT_SYMBOL_GPL(pci_set_cacheline_size); -#ifdef PCI_DISABLE_MWI -int pci_set_mwi(struct pci_dev *dev) -{ -	return 0; -} - -int pci_try_set_mwi(struct pci_dev *dev) -{ -	return 0; -} - -void pci_clear_mwi(struct pci_dev *dev) -{ -} - -#else -  /**   * pci_set_mwi - enables memory-write-invalidate PCI transaction   * @dev: the PCI device for which MWI is enabled @@ -2811,9 +2830,11 @@ void pci_clear_mwi(struct pci_dev *dev)   *   * RETURNS: An appropriate -ERRNO error value on error, or zero for success.   */ -int -pci_set_mwi(struct pci_dev *dev) +int pci_set_mwi(struct pci_dev *dev)  { +#ifdef PCI_DISABLE_MWI +	return 0; +#else  	int rc;  	u16 cmd; @@ -2822,14 +2843,15 @@ pci_set_mwi(struct pci_dev *dev)  		return rc;  	pci_read_config_word(dev, PCI_COMMAND, &cmd); -	if (! (cmd & PCI_COMMAND_INVALIDATE)) { +	if (!(cmd & PCI_COMMAND_INVALIDATE)) {  		dev_dbg(&dev->dev, "enabling Mem-Wr-Inval\n");  		cmd |= PCI_COMMAND_INVALIDATE;  		pci_write_config_word(dev, PCI_COMMAND, cmd);  	} -  	return 0; +#endif  } +EXPORT_SYMBOL(pci_set_mwi);  /**   * pci_try_set_mwi - enables memory-write-invalidate PCI transaction @@ -2842,9 +2864,13 @@ pci_set_mwi(struct pci_dev *dev)   */  int pci_try_set_mwi(struct pci_dev *dev)  { -	int rc = pci_set_mwi(dev); -	return rc; +#ifdef PCI_DISABLE_MWI +	return 0; +#else +	return pci_set_mwi(dev); +#endif  } +EXPORT_SYMBOL(pci_try_set_mwi);  /**   * pci_clear_mwi - disables Memory-Write-Invalidate for device dev @@ -2852,9 +2878,9 @@ int pci_try_set_mwi(struct pci_dev *dev)   *   * Disables PCI Memory-Write-Invalidate transaction on the device   */ -void -pci_clear_mwi(struct pci_dev *dev) +void pci_clear_mwi(struct pci_dev *dev)  { +#ifndef PCI_DISABLE_MWI  	u16 cmd;  	pci_read_config_word(dev, PCI_COMMAND, &cmd); @@ -2862,8 +2888,9 @@ pci_clear_mwi(struct pci_dev *dev)  		cmd &= ~PCI_COMMAND_INVALIDATE;  		pci_write_config_word(dev, PCI_COMMAND, cmd);  	} +#endif  } -#endif /* ! PCI_DISABLE_MWI */ +EXPORT_SYMBOL(pci_clear_mwi);  /**   * pci_intx - enables/disables PCI INTx for device dev @@ -2872,18 +2899,16 @@ pci_clear_mwi(struct pci_dev *dev)   *   * Enables/disables PCI INTx for device dev   */ -void -pci_intx(struct pci_dev *pdev, int enable) +void pci_intx(struct pci_dev *pdev, int enable)  {  	u16 pci_command, new;  	pci_read_config_word(pdev, PCI_COMMAND, &pci_command); -	if (enable) { +	if (enable)  		new = pci_command & ~PCI_COMMAND_INTX_DISABLE; -	} else { +	else  		new = pci_command | PCI_COMMAND_INTX_DISABLE; -	}  	if (new != pci_command) {  		struct pci_devres *dr; @@ -2897,6 +2922,7 @@ pci_intx(struct pci_dev *pdev, int enable)  		}  	}  } +EXPORT_SYMBOL_GPL(pci_intx);  /**   * pci_intx_mask_supported - probe for INTx masking support @@ -2926,8 +2952,8 @@ bool pci_intx_mask_supported(struct pci_dev *dev)  	 * go ahead and check it.  	 */  	if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) { -		dev_err(&dev->dev, "Command register changed from " -			"0x%x to 0x%x: driver or hardware bug?\n", orig, new); +		dev_err(&dev->dev, "Command register changed from 0x%x to 0x%x: driver or hardware bug?\n", +			orig, new);  	} else if ((new ^ orig) & PCI_COMMAND_INTX_DISABLE) {  		mask_supported = true;  		pci_write_config_word(dev, PCI_COMMAND, orig); @@ -3067,7 +3093,8 @@ int pci_wait_for_pending_transaction(struct pci_dev *dev)  	if (!pci_is_pcie(dev))  		return 1; -	return pci_wait_for_pending(dev, PCI_EXP_DEVSTA, PCI_EXP_DEVSTA_TRPND); +	return pci_wait_for_pending(dev, pci_pcie_cap(dev) + PCI_EXP_DEVSTA, +				    PCI_EXP_DEVSTA_TRPND);  }  EXPORT_SYMBOL(pci_wait_for_pending_transaction); @@ -3109,11 +3136,10 @@ static int pci_af_flr(struct pci_dev *dev, int probe)  		return 0;  	/* Wait for Transaction Pending bit clean */ -	if (pci_wait_for_pending(dev, PCI_AF_STATUS, PCI_AF_STATUS_TP)) +	if (pci_wait_for_pending(dev, pos + PCI_AF_STATUS, PCI_AF_STATUS_TP))  		goto clear; -	dev_err(&dev->dev, "transaction is not cleared; " -			"proceeding with reset anyway\n"); +	dev_err(&dev->dev, "transaction is not cleared; proceeding with reset anyway\n");  clear:  	pci_write_config_byte(dev, pos + PCI_AF_CTRL, PCI_AF_CTRL_FLR); @@ -3167,14 +3193,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)  	return 0;  } -/** - * pci_reset_bridge_secondary_bus - Reset the secondary bus on a PCI bridge. - * @dev: Bridge device - * - * Use the bridge control register to assert reset on the secondary bus. - * Devices on the secondary bus are left in power-on state. - */ -void pci_reset_bridge_secondary_bus(struct pci_dev *dev) +void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)  {  	u16 ctrl; @@ -3199,6 +3218,18 @@ void pci_reset_bridge_secondary_bus(struct pci_dev *dev)  	 */  	ssleep(1);  } + +/** + * pci_reset_bridge_secondary_bus - Reset the secondary bus on a PCI bridge. + * @dev: Bridge device + * + * Use the bridge control register to assert reset on the secondary bus. + * Devices on the secondary bus are left in power-on state. + */ +void pci_reset_bridge_secondary_bus(struct pci_dev *dev) +{ +	pcibios_reset_secondary_bus(dev); +}  EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus);  static int pci_parent_bus_reset(struct pci_dev *dev, int probe) @@ -3305,8 +3336,27 @@ static void pci_dev_unlock(struct pci_dev *dev)  	pci_cfg_access_unlock(dev);  } +/** + * pci_reset_notify - notify device driver of reset + * @dev: device to be notified of reset + * @prepare: 'true' if device is about to be reset; 'false' if reset attempt + *           completed + * + * Must be called prior to device access being disabled and after device + * access is restored. + */ +static void pci_reset_notify(struct pci_dev *dev, bool prepare) +{ +	const struct pci_error_handlers *err_handler = +			dev->driver ? dev->driver->err_handler : NULL; +	if (err_handler && err_handler->reset_notify) +		err_handler->reset_notify(dev, prepare); +} +  static void pci_dev_save_and_disable(struct pci_dev *dev)  { +	pci_reset_notify(dev, true); +  	/*  	 * Wake-up device prior to save.  PM registers default to D0 after  	 * reset and a simple register restore doesn't reliably return @@ -3328,6 +3378,7 @@ static void pci_dev_save_and_disable(struct pci_dev *dev)  static void pci_dev_restore(struct pci_dev *dev)  {  	pci_restore_state(dev); +	pci_reset_notify(dev, false);  }  static int pci_dev_reset(struct pci_dev *dev, int probe) @@ -3344,6 +3395,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)  	return rc;  } +  /**   * __pci_reset_function - reset a PCI device function   * @dev: PCI device to reset @@ -4062,6 +4114,7 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags)  			bars |= (1 << i);  	return bars;  } +EXPORT_SYMBOL(pci_select_bars);  /**   * pci_resource_bar - get position of the BAR associated with a resource @@ -4101,7 +4154,7 @@ void __init pci_register_set_vga_state(arch_set_vga_state_t func)  }  static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode, -		      unsigned int command_bits, u32 flags) +				  unsigned int command_bits, u32 flags)  {  	if (arch_set_vga_state)  		return arch_set_vga_state(dev, decode, command_bits, @@ -4125,7 +4178,7 @@ int pci_set_vga_state(struct pci_dev *dev, bool decode,  	u16 cmd;  	int rc; -	WARN_ON((flags & PCI_VGA_STATE_CHANGE_DECODES) & (command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY))); +	WARN_ON((flags & PCI_VGA_STATE_CHANGE_DECODES) && (command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)));  	/* ARCH specific VGA enables */  	rc = pci_set_vga_state_arch(dev, decode, command_bits, flags); @@ -4213,11 +4266,10 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev)  			bus == dev->bus->number &&  			slot == PCI_SLOT(dev->devfn) &&  			func == PCI_FUNC(dev->devfn)) { -			if (align_order == -1) { +			if (align_order == -1)  				align = PAGE_SIZE; -			} else { +			else  				align = 1 << align_order; -			}  			/* Found */  			break;  		} @@ -4335,7 +4387,6 @@ static int __init pci_resource_alignment_sysfs_init(void)  	return bus_create_file(&pci_bus_type,  					&bus_attr_resource_alignment);  } -  late_initcall(pci_resource_alignment_sysfs_init);  static void pci_no_domains(void) @@ -4414,41 +4465,3 @@ static int __init pci_setup(char *str)  	return 0;  }  early_param("pci", pci_setup); - -EXPORT_SYMBOL(pci_reenable_device); -EXPORT_SYMBOL(pci_enable_device_io); -EXPORT_SYMBOL(pci_enable_device_mem); -EXPORT_SYMBOL(pci_enable_device); -EXPORT_SYMBOL(pcim_enable_device); -EXPORT_SYMBOL(pcim_pin_device); -EXPORT_SYMBOL(pci_disable_device); -EXPORT_SYMBOL(pci_find_capability); -EXPORT_SYMBOL(pci_bus_find_capability); -EXPORT_SYMBOL(pci_release_regions); -EXPORT_SYMBOL(pci_request_regions); -EXPORT_SYMBOL(pci_request_regions_exclusive); -EXPORT_SYMBOL(pci_release_region); -EXPORT_SYMBOL(pci_request_region); -EXPORT_SYMBOL(pci_request_region_exclusive); -EXPORT_SYMBOL(pci_release_selected_regions); -EXPORT_SYMBOL(pci_request_selected_regions); -EXPORT_SYMBOL(pci_request_selected_regions_exclusive); -EXPORT_SYMBOL(pci_set_master); -EXPORT_SYMBOL(pci_clear_master); -EXPORT_SYMBOL(pci_set_mwi); -EXPORT_SYMBOL(pci_try_set_mwi); -EXPORT_SYMBOL(pci_clear_mwi); -EXPORT_SYMBOL_GPL(pci_intx); -EXPORT_SYMBOL(pci_assign_resource); -EXPORT_SYMBOL(pci_find_parent_resource); -EXPORT_SYMBOL(pci_select_bars); - -EXPORT_SYMBOL(pci_set_power_state); -EXPORT_SYMBOL(pci_save_state); -EXPORT_SYMBOL(pci_restore_state); -EXPORT_SYMBOL(pci_pme_capable); -EXPORT_SYMBOL(pci_pme_active); -EXPORT_SYMBOL(pci_wake_from_d3); -EXPORT_SYMBOL(pci_prepare_to_sleep); -EXPORT_SYMBOL(pci_back_from_sleep); -EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);  |