diff options
Diffstat (limited to 'drivers/gpu/drm/sun4i')
| -rw-r--r-- | drivers/gpu/drm/sun4i/Kconfig | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_backend.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_crtc.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 83 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_mixer.c | 70 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_mixer.h | 20 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 85 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_ui_layer.h | 20 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 86 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_vi_layer.h | 20 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sunxi_engine.h | 13 |
11 files changed, 181 insertions, 225 deletions
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig index 4741d9f6544c..4037e085430e 100644 --- a/drivers/gpu/drm/sun4i/Kconfig +++ b/drivers/gpu/drm/sun4i/Kconfig @@ -18,6 +18,9 @@ if DRM_SUN4I config DRM_SUN4I_HDMI tristate "Allwinner A10/A10s/A20/A31 HDMI Controller Support" depends on ARM || COMPILE_TEST + select DRM_DISPLAY_HDMI_HELPER + select DRM_DISPLAY_HDMI_STATE_HELPER + select DRM_DISPLAY_HELPER default DRM_SUN4I help Choose this option if you have an Allwinner A10/A10s/A20/A31 diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c index 335fd0edb904..e89eb96d3131 100644 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c @@ -69,7 +69,9 @@ static void sun4i_backend_disable_color_correction(struct sunxi_engine *engine) SUN4I_BACKEND_OCCTL_ENABLE, 0); } -static void sun4i_backend_commit(struct sunxi_engine *engine) +static void sun4i_backend_commit(struct sunxi_engine *engine, + struct drm_crtc *crtc, + struct drm_atomic_state *state) { DRM_DEBUG_DRIVER("Committing changes\n"); diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c index c06d7cd45388..18e74047b0f5 100644 --- a/drivers/gpu/drm/sun4i/sun4i_crtc.c +++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c @@ -91,7 +91,7 @@ static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc, DRM_DEBUG_DRIVER("Committing plane changes\n"); - sunxi_engine_commit(scrtc->engine); + sunxi_engine_commit(scrtc->engine, crtc, state); if (event) { crtc->state->event = NULL; diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c index 245b34adca5a..b3649449de30 100644 --- a/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c +++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c @@ -26,6 +26,9 @@ #include <drm/drm_probe_helper.h> #include <drm/drm_simple_kms_helper.h> +#include <drm/display/drm_hdmi_helper.h> +#include <drm/display/drm_hdmi_state_helper.h> + #include "sun4i_backend.h" #include "sun4i_crtc.h" #include "sun4i_drv.h" @@ -37,30 +40,24 @@ #define drm_connector_to_sun4i_hdmi(c) \ container_of_const(c, struct sun4i_hdmi, connector) -static int sun4i_hdmi_setup_avi_infoframes(struct sun4i_hdmi *hdmi, - struct drm_display_mode *mode) +static int sun4i_hdmi_write_infoframe(struct drm_connector *connector, + enum hdmi_infoframe_type type, + const u8 *buffer, size_t len) { - struct hdmi_avi_infoframe frame; - u8 buffer[17]; - int i, ret; - - ret = drm_hdmi_avi_infoframe_from_display_mode(&frame, - &hdmi->connector, mode); - if (ret < 0) { - DRM_ERROR("Failed to get infoframes from mode\n"); - return ret; - } + struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); + int i; - ret = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); - if (ret < 0) { - DRM_ERROR("Failed to pack infoframes\n"); - return ret; + if (type != HDMI_INFOFRAME_TYPE_AVI) { + drm_err(connector->dev, + "Unsupported infoframe type: %u\n", type); + return 0; } - for (i = 0; i < sizeof(buffer); i++) + for (i = 0; i < len; i++) writeb(buffer[i], hdmi->base + SUN4I_HDMI_AVI_INFOFRAME_REG(i)); return 0; + } static void sun4i_hdmi_disable(struct drm_encoder *encoder, @@ -83,14 +80,18 @@ static void sun4i_hdmi_enable(struct drm_encoder *encoder, { struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); - struct drm_display_info *display = &hdmi->connector.display_info; + struct drm_connector *connector = &hdmi->connector; + struct drm_display_info *display = &connector->display_info; + struct drm_connector_state *conn_state = + drm_atomic_get_new_connector_state(state, connector); + unsigned long long tmds_rate = conn_state->hdmi.tmds_char_rate; unsigned int x, y; u32 val = 0; DRM_DEBUG_DRIVER("Enabling the HDMI Output\n"); - clk_set_rate(hdmi->mod_clk, mode->crtc_clock * 1000); - clk_set_rate(hdmi->tmds_clk, mode->crtc_clock * 1000); + clk_set_rate(hdmi->mod_clk, tmds_rate); + clk_set_rate(hdmi->tmds_clk, tmds_rate); /* Set input sync enable */ writel(SUN4I_HDMI_UNKNOWN_INPUT_SYNC, @@ -143,7 +144,8 @@ static void sun4i_hdmi_enable(struct drm_encoder *encoder, clk_prepare_enable(hdmi->tmds_clk); - sun4i_hdmi_setup_avi_infoframes(hdmi, mode); + drm_atomic_helper_connector_hdmi_update_infoframes(connector, state); + val |= SUN4I_HDMI_PKT_CTRL_TYPE(0, SUN4I_HDMI_PKT_AVI); val |= SUN4I_HDMI_PKT_CTRL_TYPE(1, SUN4I_HDMI_PKT_END); writel(val, hdmi->base + SUN4I_HDMI_PKT_CTRL_REG(0)); @@ -196,7 +198,7 @@ static int sun4i_hdmi_connector_atomic_check(struct drm_connector *connector, enum drm_mode_status status; status = sun4i_hdmi_connector_clock_valid(connector, mode, - mode->clock * 1000); + conn_state->hdmi.tmds_char_rate); if (status != MODE_OK) return -EINVAL; @@ -207,8 +209,10 @@ static enum drm_mode_status sun4i_hdmi_connector_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { - return sun4i_hdmi_connector_clock_valid(connector, mode, - mode->clock * 1000); + unsigned long long rate = drm_hdmi_compute_mode_clock(mode, 8, + HDMI_COLORSPACE_RGB); + + return sun4i_hdmi_connector_clock_valid(connector, mode, rate); } static int sun4i_hdmi_get_modes(struct drm_connector *connector) @@ -258,6 +262,11 @@ static struct i2c_adapter *sun4i_hdmi_get_ddc(struct device *dev) return ddc; } +static const struct drm_connector_hdmi_funcs sun4i_hdmi_hdmi_connector_funcs = { + .tmds_char_rate_valid = sun4i_hdmi_connector_clock_valid, + .write_infoframe = sun4i_hdmi_write_infoframe, +}; + static const struct drm_connector_helper_funcs sun4i_hdmi_connector_helper_funcs = { .atomic_check = sun4i_hdmi_connector_atomic_check, .mode_valid = sun4i_hdmi_connector_mode_valid, @@ -279,11 +288,16 @@ sun4i_hdmi_connector_detect(struct drm_connector *connector, bool force) return connector_status_connected; } +static void sun4i_hdmi_connector_reset(struct drm_connector *connector) +{ + drm_atomic_helper_connector_reset(connector); + __drm_atomic_helper_connector_hdmi_reset(connector, connector->state); +} + static const struct drm_connector_funcs sun4i_hdmi_connector_funcs = { .detect = sun4i_hdmi_connector_detect, .fill_modes = drm_helper_probe_single_connector_modes, - .destroy = drm_connector_cleanup, - .reset = drm_atomic_helper_connector_reset, + .reset = sun4i_hdmi_connector_reset, .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; @@ -642,10 +656,19 @@ static int sun4i_hdmi_bind(struct device *dev, struct device *master, drm_connector_helper_add(&hdmi->connector, &sun4i_hdmi_connector_helper_funcs); - ret = drm_connector_init_with_ddc(drm, &hdmi->connector, - &sun4i_hdmi_connector_funcs, - DRM_MODE_CONNECTOR_HDMIA, - hdmi->ddc_i2c); + ret = drmm_connector_hdmi_init(drm, &hdmi->connector, + /* + * NOTE: Those are likely to be + * wrong, but I couldn't find the + * actual ones in the BSP. + */ + "AW", "HDMI", + &sun4i_hdmi_connector_funcs, + &sun4i_hdmi_hdmi_connector_funcs, + DRM_MODE_CONNECTOR_HDMIA, + hdmi->ddc_i2c, + BIT(HDMI_COLORSPACE_RGB), + 8); if (ret) { dev_err(dev, "Couldn't initialise the HDMI connector\n"); diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 01382860aaee..bd0fe2c6624e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -16,6 +16,7 @@ #include <linux/platform_device.h> #include <linux/reset.h> +#include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_framebuffer.h> @@ -249,10 +250,73 @@ int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format) return -EINVAL; } -static void sun8i_mixer_commit(struct sunxi_engine *engine) +static void sun8i_layer_enable(struct sun8i_layer *layer, bool enable) { + u32 ch_base = sun8i_channel_base(layer->mixer, layer->channel); + u32 val, reg, mask; + + if (layer->type == SUN8I_LAYER_TYPE_UI) { + val = enable ? SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN : 0; + mask = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN; + reg = SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay); + } else { + val = enable ? SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN : 0; + mask = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN; + reg = SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay); + } + + regmap_update_bits(layer->mixer->engine.regs, reg, mask, val); +} + +static void sun8i_mixer_commit(struct sunxi_engine *engine, + struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + u32 bld_base = sun8i_blender_base(mixer); + struct drm_plane_state *plane_state; + struct drm_plane *plane; + u32 route = 0, pipe_en = 0; + DRM_DEBUG_DRIVER("Committing changes\n"); + drm_for_each_plane(plane, state->dev) { + struct sun8i_layer *layer = plane_to_sun8i_layer(plane); + bool enable; + int zpos; + + if (!(plane->possible_crtcs & drm_crtc_mask(crtc)) || layer->mixer != mixer) + continue; + + plane_state = drm_atomic_get_new_plane_state(state, plane); + if (!plane_state) + plane_state = plane->state; + + enable = plane_state->crtc && plane_state->visible; + zpos = plane_state->normalized_zpos; + + DRM_DEBUG_DRIVER(" plane %d: chan=%d ovl=%d en=%d zpos=%d\n", + plane->base.id, layer->channel, layer->overlay, + enable, zpos); + + /* + * We always update the layer enable bit, because it can clear + * spontaneously for unknown reasons. + */ + sun8i_layer_enable(layer, enable); + + if (!enable) + continue; + + /* Route layer to pipe based on zpos */ + route |= layer->channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); + pipe_en |= SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); + } + + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), route); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), + pipe_en | SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); + regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); } @@ -271,7 +335,7 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, return ERR_PTR(-ENOMEM); for (i = 0; i < mixer->cfg->vi_num; i++) { - struct sun8i_vi_layer *layer; + struct sun8i_layer *layer; layer = sun8i_vi_layer_init_one(drm, mixer, i); if (IS_ERR(layer)) { @@ -284,7 +348,7 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, } for (i = 0; i < mixer->cfg->ui_num; i++) { - struct sun8i_ui_layer *layer; + struct sun8i_layer *layer; layer = sun8i_ui_layer_init_one(drm, mixer, i); if (IS_ERR(layer)) { diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 85c94884fb9a..d7898c9c9cc0 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -9,6 +9,7 @@ #include <linux/clk.h> #include <linux/regmap.h> #include <linux/reset.h> +#include <drm/drm_plane.h> #include "sunxi_engine.h" @@ -185,6 +186,25 @@ struct sun8i_mixer { struct clk *mod_clk; }; +enum { + SUN8I_LAYER_TYPE_UI, + SUN8I_LAYER_TYPE_VI, +}; + +struct sun8i_layer { + struct drm_plane plane; + struct sun8i_mixer *mixer; + int type; + int channel; + int overlay; +}; + +static inline struct sun8i_layer * +plane_to_sun8i_layer(struct drm_plane *plane) +{ + return container_of(plane, struct sun8i_layer, plane); +} + static inline struct sun8i_mixer * engine_to_sun8i_mixer(struct sunxi_engine *engine) { diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index ca75ca0835a6..b90e5edef4e8 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -24,55 +24,6 @@ #include "sun8i_ui_layer.h" #include "sun8i_ui_scaler.h" -static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, - int overlay, bool enable, unsigned int zpos, - unsigned int old_zpos) -{ - u32 val, bld_base, ch_base; - - bld_base = sun8i_blender_base(mixer); - ch_base = sun8i_channel_base(mixer, channel); - - DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n", - enable ? "En" : "Dis", channel, overlay); - - if (enable) - val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN; - else - val = 0; - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); - - if (!enable || zpos != old_zpos) { - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), - 0); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), - 0); - } - - if (enable) { - val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - val, val); - - val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), - val); - } -} - static void sun8i_ui_layer_update_alpha(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) { @@ -232,7 +183,7 @@ static int sun8i_ui_layer_atomic_check(struct drm_plane *plane, { struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); - struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); + struct sun8i_layer *layer = plane_to_sun8i_layer(plane); struct drm_crtc *crtc = new_plane_state->crtc; struct drm_crtc_state *crtc_state; int min_scale, max_scale; @@ -259,36 +210,18 @@ static int sun8i_ui_layer_atomic_check(struct drm_plane *plane, true, true); } -static void sun8i_ui_layer_atomic_disable(struct drm_plane *plane, - struct drm_atomic_state *state) -{ - struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, - plane); - struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); - unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; - - sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0, - old_zpos); -} static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state) { - struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, - plane); struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); - struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); + struct sun8i_layer *layer = plane_to_sun8i_layer(plane); unsigned int zpos = new_state->normalized_zpos; - unsigned int old_zpos = old_state->normalized_zpos; struct sun8i_mixer *mixer = layer->mixer; - if (!new_state->visible) { - sun8i_ui_layer_enable(mixer, layer->channel, - layer->overlay, false, 0, old_zpos); + if (!new_state->crtc || !new_state->visible) return; - } sun8i_ui_layer_update_coord(mixer, layer->channel, layer->overlay, plane, zpos); @@ -298,13 +231,10 @@ static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, layer->overlay, plane); sun8i_ui_layer_update_buffer(mixer, layer->channel, layer->overlay, plane); - sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, - true, zpos, old_zpos); } static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = { .atomic_check = sun8i_ui_layer_atomic_check, - .atomic_disable = sun8i_ui_layer_atomic_disable, .atomic_update = sun8i_ui_layer_atomic_update, }; @@ -345,13 +275,13 @@ static const uint64_t sun8i_layer_modifiers[] = { DRM_FORMAT_MOD_INVALID }; -struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, - int index) +struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm, + struct sun8i_mixer *mixer, + int index) { enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY; int channel = mixer->cfg->vi_num + index; - struct sun8i_ui_layer *layer; + struct sun8i_layer *layer; unsigned int plane_cnt; int ret; @@ -390,6 +320,7 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs); layer->mixer = mixer; + layer->type = SUN8I_LAYER_TYPE_UI; layer->channel = channel; layer->overlay = 0; diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h index e3e32ee1178d..83892f6ff211 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.h +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.h @@ -47,21 +47,9 @@ #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_COMBINED ((2) << 1) struct sun8i_mixer; +struct sun8i_layer; -struct sun8i_ui_layer { - struct drm_plane plane; - struct sun8i_mixer *mixer; - int channel; - int overlay; -}; - -static inline struct sun8i_ui_layer * -plane_to_sun8i_ui_layer(struct drm_plane *plane) -{ - return container_of(plane, struct sun8i_ui_layer, plane); -} - -struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, - int index); +struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm, + struct sun8i_mixer *mixer, + int index); #endif /* _SUN8I_UI_LAYER_H_ */ diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index f9c0a56d3a14..9c09d9c08496 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -18,55 +18,6 @@ #include "sun8i_vi_layer.h" #include "sun8i_vi_scaler.h" -static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, - int overlay, bool enable, unsigned int zpos, - unsigned int old_zpos) -{ - u32 val, bld_base, ch_base; - - bld_base = sun8i_blender_base(mixer); - ch_base = sun8i_channel_base(mixer, channel); - - DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n", - enable ? "En" : "Dis", channel, overlay); - - if (enable) - val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN; - else - val = 0; - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), - SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); - - if (!enable || zpos != old_zpos) { - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), - 0); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), - 0); - } - - if (enable) { - val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - val, val); - - val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), - val); - } -} - static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) { @@ -366,7 +317,7 @@ static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, { struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); + struct sun8i_layer *layer = plane_to_sun8i_layer(plane); struct drm_crtc *crtc = new_plane_state->crtc; struct drm_crtc_state *crtc_state; int min_scale, max_scale; @@ -393,36 +344,17 @@ static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, true, true); } -static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, - struct drm_atomic_state *state) -{ - struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, - plane); - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); - unsigned int old_zpos = old_state->normalized_zpos; - struct sun8i_mixer *mixer = layer->mixer; - - sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, - old_zpos); -} - static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state) { - struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, - plane); struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); - struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); + struct sun8i_layer *layer = plane_to_sun8i_layer(plane); unsigned int zpos = new_state->normalized_zpos; - unsigned int old_zpos = old_state->normalized_zpos; struct sun8i_mixer *mixer = layer->mixer; - if (!new_state->visible) { - sun8i_vi_layer_enable(mixer, layer->channel, - layer->overlay, false, 0, old_zpos); + if (!new_state->crtc || !new_state->visible) return; - } sun8i_vi_layer_update_coord(mixer, layer->channel, layer->overlay, plane, zpos); @@ -432,13 +364,10 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, layer->overlay, plane); sun8i_vi_layer_update_buffer(mixer, layer->channel, layer->overlay, plane); - sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, - true, zpos, old_zpos); } static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { .atomic_check = sun8i_vi_layer_atomic_check, - .atomic_disable = sun8i_vi_layer_atomic_disable, .atomic_update = sun8i_vi_layer_atomic_update, }; @@ -539,14 +468,14 @@ static const uint64_t sun8i_layer_modifiers[] = { DRM_FORMAT_MOD_INVALID }; -struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, - int index) +struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, + struct sun8i_mixer *mixer, + int index) { enum drm_plane_type type = DRM_PLANE_TYPE_OVERLAY; u32 supported_encodings, supported_ranges; unsigned int plane_cnt, format_count; - struct sun8i_vi_layer *layer; + struct sun8i_layer *layer; const u32 *formats; int ret; @@ -613,6 +542,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs); layer->mixer = mixer; + layer->type = SUN8I_LAYER_TYPE_VI; layer->channel = index; layer->overlay = 0; diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h index 48c399e1c86d..655440cdc78f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h @@ -52,21 +52,9 @@ #define SUN8I_MIXER_CHAN_VI_DS_M(x) ((x) << 0) struct sun8i_mixer; +struct sun8i_layer; -struct sun8i_vi_layer { - struct drm_plane plane; - struct sun8i_mixer *mixer; - int channel; - int overlay; -}; - -static inline struct sun8i_vi_layer * -plane_to_sun8i_vi_layer(struct drm_plane *plane) -{ - return container_of(plane, struct sun8i_vi_layer, plane); -} - -struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, - int index); +struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, + struct sun8i_mixer *mixer, + int index); #endif /* _SUN8I_VI_LAYER_H_ */ diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h index ec8cf9b2bda4..ec0c4932f15c 100644 --- a/drivers/gpu/drm/sun4i/sunxi_engine.h +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h @@ -7,6 +7,7 @@ #define _SUNXI_ENGINE_H_ struct drm_plane; +struct drm_crtc; struct drm_device; struct drm_crtc_state; struct drm_display_mode; @@ -59,7 +60,9 @@ struct sunxi_engine_ops { * * This function is optional. */ - void (*commit)(struct sunxi_engine *engine); + void (*commit)(struct sunxi_engine *engine, + struct drm_crtc *crtc, + struct drm_atomic_state *state); /** * @layers_init: @@ -144,12 +147,16 @@ struct sunxi_engine { /** * sunxi_engine_commit() - commit all changes of the engine * @engine: pointer to the engine + * @crtc: pointer to crtc the engine is associated with + * @state: atomic state */ static inline void -sunxi_engine_commit(struct sunxi_engine *engine) +sunxi_engine_commit(struct sunxi_engine *engine, + struct drm_crtc *crtc, + struct drm_atomic_state *state) { if (engine->ops && engine->ops->commit) - engine->ops->commit(engine); + engine->ops->commit(engine, crtc, state); } /** |