diff options
Diffstat (limited to 'drivers/gpu/drm/msm/msm_fence.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_fence.h | 44 | 
1 files changed, 37 insertions, 7 deletions
diff --git a/drivers/gpu/drm/msm/msm_fence.h b/drivers/gpu/drm/msm/msm_fence.h index 2d9af66dcca5..4783db528bcc 100644 --- a/drivers/gpu/drm/msm/msm_fence.h +++ b/drivers/gpu/drm/msm/msm_fence.h @@ -9,23 +9,53 @@  #include "msm_drv.h" +/** + * struct msm_fence_context - fence context for gpu + * + * Each ringbuffer has a single fence context, with the GPU writing an + * incrementing fence seqno at the end of each submit + */  struct msm_fence_context {  	struct drm_device *dev; +	/** name: human readable name for fence timeline */  	char name[32]; +	/** context: see dma_fence_context_alloc() */  	unsigned context; -	/* last_fence == completed_fence --> no pending work */ -	uint32_t last_fence;          /* last assigned fence */ -	uint32_t completed_fence;     /* last completed fence */ -	wait_queue_head_t event; + +	/** +	 * last_fence: +	 * +	 * Last assigned fence, incremented each time a fence is created +	 * on this fence context.  If last_fence == completed_fence, +	 * there is no remaining pending work +	 */ +	uint32_t last_fence; + +	/** +	 * completed_fence: +	 * +	 * The last completed fence, updated from the CPU after interrupt +	 * from GPU +	 */ +	uint32_t completed_fence; + +	/** +	 * fenceptr: +	 * +	 * The address that the GPU directly writes with completed fence +	 * seqno.  This can be ahead of completed_fence.  We can peek at +	 * this to see if a fence has already signaled but the CPU hasn't +	 * gotten around to handling the irq and updating completed_fence +	 */ +	volatile uint32_t *fenceptr; +  	spinlock_t spinlock;  };  struct msm_fence_context * msm_fence_context_alloc(struct drm_device *dev, -		const char *name); +		volatile uint32_t *fenceptr, const char *name);  void msm_fence_context_free(struct msm_fence_context *fctx); -int msm_wait_fence(struct msm_fence_context *fctx, uint32_t fence, -		ktime_t *timeout, bool interruptible);  void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence);  struct dma_fence * msm_fence_alloc(struct msm_fence_context *fctx);  |