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path: root/drivers/gpu/drm/i915/display/intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b3ae81a6ab16..28d85e1e858e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -956,6 +956,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
enum pipe pipe = crtc->pipe;
+ intel_psr_post_plane_update(state, crtc);
+
intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits);
if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
@@ -3997,7 +3999,7 @@ intel_encoder_current_mode(struct intel_encoder *encoder)
}
if (!intel_crtc_get_pipe_config(crtc_state)) {
- kfree(crtc_state);
+ intel_crtc_destroy_state(&crtc->base, &crtc_state->uapi);
kfree(mode);
return NULL;
}
@@ -4006,7 +4008,7 @@ intel_encoder_current_mode(struct intel_encoder *encoder)
intel_mode_from_crtc_timings(mode, &crtc_state->hw.adjusted_mode);
- kfree(crtc_state);
+ intel_crtc_destroy_state(&crtc->base, &crtc_state->uapi);
return mode;
}
@@ -4986,9 +4988,6 @@ pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,
static bool fastboot_enabled(struct drm_i915_private *dev_priv)
{
- if (dev_priv->params.fastboot != -1)
- return dev_priv->params.fastboot;
-
/* Enable fastboot by default on Skylake and newer */
if (DISPLAY_VER(dev_priv) >= 9)
return true;
@@ -7216,7 +7215,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_set_cdclk_pre_plane_update(state);
- intel_modeset_verify_disabled(dev_priv, state);
+ intel_modeset_verify_disabled(state);
}
intel_sagv_pre_plane_update(state);
@@ -7296,14 +7295,13 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
}
intel_dbuf_post_plane_update(state);
- intel_psr_post_plane_update(state);
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
intel_post_plane_update(state, crtc);
intel_modeset_put_crtc_power_domains(crtc, &put_domains[crtc->pipe]);
- intel_modeset_verify_crtc(crtc, state, old_crtc_state, new_crtc_state);
+ intel_modeset_verify_crtc(state, crtc);
/* Must be done after gamma readout due to HSW split gamma vs. IPS w/a */
hsw_ips_post_update(state, crtc);