diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_crt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_crt.c | 64 |
1 files changed, 25 insertions, 39 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index 4a8ff2f97608..7267ffc7f539 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -34,6 +34,8 @@ #include <drm/drm_probe_helper.h> #include "i915_drv.h" +#include "i915_irq.h" +#include "i915_reg.h" #include "intel_connector.h" #include "intel_crt.h" #include "intel_crtc.h" @@ -680,30 +682,20 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) { struct drm_device *dev = crt->base.base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_uncore *uncore = &dev_priv->uncore; u32 save_bclrpat; u32 save_vtotal; u32 vtotal, vactive; u32 vsample; u32 vblank, vblank_start, vblank_end; u32 dsl; - i915_reg_t bclrpat_reg, vtotal_reg, - vblank_reg, vsync_reg, pipeconf_reg, pipe_dsl_reg; u8 st00; enum drm_connector_status status; drm_dbg_kms(&dev_priv->drm, "starting load-detect on CRT\n"); - bclrpat_reg = BCLRPAT(pipe); - vtotal_reg = VTOTAL(pipe); - vblank_reg = VBLANK(pipe); - vsync_reg = VSYNC(pipe); - pipeconf_reg = PIPECONF(pipe); - pipe_dsl_reg = PIPEDSL(pipe); - - save_bclrpat = intel_uncore_read(uncore, bclrpat_reg); - save_vtotal = intel_uncore_read(uncore, vtotal_reg); - vblank = intel_uncore_read(uncore, vblank_reg); + save_bclrpat = intel_de_read(dev_priv, BCLRPAT(pipe)); + save_vtotal = intel_de_read(dev_priv, VTOTAL(pipe)); + vblank = intel_de_read(dev_priv, VBLANK(pipe)); vtotal = ((save_vtotal >> 16) & 0xfff) + 1; vactive = (save_vtotal & 0x7ff) + 1; @@ -712,23 +704,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) vblank_end = ((vblank >> 16) & 0xfff) + 1; /* Set the border color to purple. */ - intel_uncore_write(uncore, bclrpat_reg, 0x500050); + intel_de_write(dev_priv, BCLRPAT(pipe), 0x500050); if (DISPLAY_VER(dev_priv) != 2) { - u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg); - intel_uncore_write(uncore, - pipeconf_reg, - pipeconf | PIPECONF_FORCE_BORDER); - intel_uncore_posting_read(uncore, pipeconf_reg); + u32 pipeconf = intel_de_read(dev_priv, PIPECONF(pipe)); + + intel_de_write(dev_priv, PIPECONF(pipe), + pipeconf | PIPECONF_FORCE_BORDER); + intel_de_posting_read(dev_priv, PIPECONF(pipe)); /* Wait for next Vblank to substitue * border color for Color info */ intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe)); - st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE); + st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE); status = ((st00 & (1 << 4)) != 0) ? connector_status_connected : connector_status_disconnected; - intel_uncore_write(uncore, pipeconf_reg, pipeconf); + intel_de_write(dev_priv, PIPECONF(pipe), pipeconf); } else { bool restore_vblank = false; int count, detect; @@ -738,14 +730,12 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) * Yes, this will flicker */ if (vblank_start <= vactive && vblank_end >= vtotal) { - u32 vsync = intel_de_read(dev_priv, vsync_reg); + u32 vsync = intel_de_read(dev_priv, VSYNC(pipe)); u32 vsync_start = (vsync & 0xffff) + 1; vblank_start = vsync_start; - intel_uncore_write(uncore, - vblank_reg, - (vblank_start - 1) | - ((vblank_end - 1) << 16)); + intel_de_write(dev_priv, VBLANK(pipe), + (vblank_start - 1) | ((vblank_end - 1) << 16)); restore_vblank = true; } /* sample in the vertical border, selecting the larger one */ @@ -757,10 +747,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) /* * Wait for the border to be displayed */ - while (intel_uncore_read(uncore, pipe_dsl_reg) >= vactive) + while (intel_de_read(dev_priv, PIPEDSL(pipe)) >= vactive) ; - while ((dsl = intel_uncore_read(uncore, pipe_dsl_reg)) <= - vsample) + while ((dsl = intel_de_read(dev_priv, PIPEDSL(pipe))) <= vsample) ; /* * Watch ST00 for an entire scanline @@ -770,14 +759,14 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) do { count++; /* Read the ST00 VGA status register */ - st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE); + st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE); if (st00 & (1 << 4)) detect++; - } while ((intel_uncore_read(uncore, pipe_dsl_reg) == dsl)); + } while ((intel_de_read(dev_priv, PIPEDSL(pipe)) == dsl)); /* restore vblank if necessary */ if (restore_vblank) - intel_uncore_write(uncore, vblank_reg, vblank); + intel_de_write(dev_priv, VBLANK(pipe), vblank); /* * If more than 3/4 of the scanline detected a monitor, * then it is assumed to be present. This works even on i830, @@ -790,7 +779,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) } /* Restore previous settings */ - intel_uncore_write(uncore, bclrpat_reg, save_bclrpat); + intel_de_write(dev_priv, BCLRPAT(pipe), save_bclrpat); return status; } @@ -1044,17 +1033,14 @@ void intel_crt_init(struct drm_i915_private *dev_priv) intel_connector_attach_encoder(intel_connector, &crt->base); crt->base.type = INTEL_OUTPUT_ANALOG; - crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI); + crt->base.cloneable = BIT(INTEL_OUTPUT_DVO) | BIT(INTEL_OUTPUT_HDMI); if (IS_I830(dev_priv)) crt->base.pipe_mask = BIT(PIPE_A); else crt->base.pipe_mask = ~0; - if (DISPLAY_VER(dev_priv) == 2) - connector->interlace_allowed = 0; - else - connector->interlace_allowed = 1; - connector->doublescan_allowed = 0; + if (DISPLAY_VER(dev_priv) != 2) + connector->interlace_allowed = true; crt->adpa_reg = adpa_reg; |