diff options
Diffstat (limited to 'drivers/gpu/drm/ast/ast_drv.h')
| -rw-r--r-- | drivers/gpu/drm/ast/ast_drv.h | 84 | 
1 files changed, 33 insertions, 51 deletions
diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h index d51b81fea9c8..a501169cddad 100644 --- a/drivers/gpu/drm/ast/ast_drv.h +++ b/drivers/gpu/drm/ast/ast_drv.h @@ -157,7 +157,7 @@ to_ast_sil164_connector(struct drm_connector *connector)   * Device   */ -struct ast_private { +struct ast_device {  	struct drm_device base;  	struct mutex ioregs_lock; /* Protects access to I/O registers in ioregs */ @@ -210,14 +210,14 @@ struct ast_private {  	const struct firmware *dp501_fw;	/* dp501 fw */  }; -static inline struct ast_private *to_ast_private(struct drm_device *dev) +static inline struct ast_device *to_ast_device(struct drm_device *dev)  { -	return container_of(dev, struct ast_private, base); +	return container_of(dev, struct ast_device, base);  } -struct ast_private *ast_device_create(const struct drm_driver *drv, -				      struct pci_dev *pdev, -				      unsigned long flags); +struct ast_device *ast_device_create(const struct drm_driver *drv, +				     struct pci_dev *pdev, +				     unsigned long flags);  #define AST_IO_AR_PORT_WRITE		(0x40)  #define AST_IO_MISC_PORT_WRITE		(0x42) @@ -238,62 +238,44 @@ struct ast_private *ast_device_create(const struct drm_driver *drv,  #define AST_IO_VGACRCB_HWC_ENABLED     BIT(1)  #define AST_IO_VGACRCB_HWC_16BPP       BIT(0) /* set: ARGB4444, cleared: 2bpp palette */ -#define __ast_read(x) \ -static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ -u##x val = 0;\ -val = ioread##x(ast->regs + reg); \ -return val;\ +static inline u32 ast_read32(struct ast_device *ast, u32 reg) +{ +	return ioread32(ast->regs + reg);  } -__ast_read(8); -__ast_read(16); -__ast_read(32) - -#define __ast_io_read(x) \ -static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ -u##x val = 0;\ -val = ioread##x(ast->ioregs + reg); \ -return val;\ +static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val) +{ +	iowrite32(val, ast->regs + reg);  } -__ast_io_read(8); -__ast_io_read(16); -__ast_io_read(32); - -#define __ast_write(x) \ -static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ -	iowrite##x(val, ast->regs + reg);\ -	} - -__ast_write(8); -__ast_write(16); -__ast_write(32); - -#define __ast_io_write(x) \ -static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ -	iowrite##x(val, ast->ioregs + reg);\ -	} +static inline u8 ast_io_read8(struct ast_device *ast, u32 reg) +{ +	return ioread8(ast->ioregs + reg); +} -__ast_io_write(8); -__ast_io_write(16); -#undef __ast_io_write +static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val) +{ +	iowrite8(val, ast->ioregs + reg); +} -static inline void ast_set_index_reg(struct ast_private *ast, +static inline void ast_set_index_reg(struct ast_device *ast,  				     uint32_t base, uint8_t index,  				     uint8_t val)  { -	ast_io_write16(ast, base, ((u16)val << 8) | index); +	ast_io_write8(ast, base, index); +	++base; +	ast_io_write8(ast, base, val);  } -void ast_set_index_reg_mask(struct ast_private *ast, +void ast_set_index_reg_mask(struct ast_device *ast,  			    uint32_t base, uint8_t index,  			    uint8_t mask, uint8_t val); -uint8_t ast_get_index_reg(struct ast_private *ast, +uint8_t ast_get_index_reg(struct ast_device *ast,  			  uint32_t base, uint8_t index); -uint8_t ast_get_index_reg_mask(struct ast_private *ast, +uint8_t ast_get_index_reg_mask(struct ast_device *ast,  			       uint32_t base, uint8_t index, uint8_t mask); -static inline void ast_open_key(struct ast_private *ast) +static inline void ast_open_key(struct ast_device *ast)  {  	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8);  } @@ -352,7 +334,7 @@ struct ast_crtc_state {  #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base) -int ast_mode_config_init(struct ast_private *ast); +int ast_mode_config_init(struct ast_device *ast);  #define AST_MM_ALIGN_SHIFT 4  #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) @@ -476,16 +458,16 @@ int ast_mode_config_init(struct ast_private *ast);  #define ASTDP_1366x768_60		0x1E  #define ASTDP_1152x864_75		0x1F -int ast_mm_init(struct ast_private *ast); +int ast_mm_init(struct ast_device *ast);  /* ast post */  void ast_enable_vga(struct drm_device *dev);  void ast_enable_mmio(struct drm_device *dev);  bool ast_is_vga_enabled(struct drm_device *dev);  void ast_post_gpu(struct drm_device *dev); -u32 ast_mindwm(struct ast_private *ast, u32 r); -void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); -void ast_patch_ahb_2500(struct ast_private *ast); +u32 ast_mindwm(struct ast_device *ast, u32 r); +void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); +void ast_patch_ahb_2500(struct ast_device *ast);  /* ast dp501 */  void ast_set_dp501_video_output(struct drm_device *dev, u8 mode);  bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size);  |