aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/include/atomfirmware.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/include/atomfirmware.h')
-rw-r--r--drivers/gpu/drm/amd/include/atomfirmware.h76
1 files changed, 68 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
index f2564ba21c0b..44955458fe38 100644
--- a/drivers/gpu/drm/amd/include/atomfirmware.h
+++ b/drivers/gpu/drm/amd/include/atomfirmware.h
@@ -197,6 +197,9 @@ enum atom_dp_vs_preemph_def{
DP_VS_LEVEL0_PREEMPH_LEVEL3 = 0x18,
};
+#define BIOS_ATOM_PREFIX "ATOMBIOS"
+#define BIOS_VERSION_PREFIX "ATOMBIOSBK-AMD"
+#define BIOS_STRING_LENGTH 43
/*
enum atom_string_def{
@@ -209,12 +212,14 @@ atom_bios_string = "ATOM"
#pragma pack(1) /* BIOS data must use byte aligment*/
enum atombios_image_offset{
-OFFSET_TO_ATOM_ROM_HEADER_POINTER =0x00000048,
-OFFSET_TO_ATOM_ROM_IMAGE_SIZE =0x00000002,
-OFFSET_TO_ATOMBIOS_ASIC_BUS_MEM_TYPE =0x94,
-MAXSIZE_OF_ATOMBIOS_ASIC_BUS_MEM_TYPE =20, /*including the terminator 0x0!*/
-OFFSET_TO_GET_ATOMBIOS_NUMBER_OF_STRINGS =0x2f,
-OFFSET_TO_GET_ATOMBIOS_STRING_START =0x6e,
+ OFFSET_TO_ATOM_ROM_HEADER_POINTER = 0x00000048,
+ OFFSET_TO_ATOM_ROM_IMAGE_SIZE = 0x00000002,
+ OFFSET_TO_ATOMBIOS_ASIC_BUS_MEM_TYPE = 0x94,
+ MAXSIZE_OF_ATOMBIOS_ASIC_BUS_MEM_TYPE = 20, /*including the terminator 0x0!*/
+ OFFSET_TO_GET_ATOMBIOS_NUMBER_OF_STRINGS = 0x2f,
+ OFFSET_TO_GET_ATOMBIOS_STRING_START = 0x6e,
+ OFFSET_TO_VBIOS_PART_NUMBER = 0x80,
+ OFFSET_TO_VBIOS_DATE = 0x50,
};
/****************************************************************************
@@ -501,6 +506,7 @@ enum atombios_firmware_capability
ATOM_FIRMWARE_CAP_SRAM_ECC = 0x00000200,
ATOM_FIRMWARE_CAP_ENABLE_2STAGE_BIST_TRAINING = 0x00000400,
ATOM_FIRMWARE_CAP_ENABLE_2ND_USB20PORT = 0x0008000,
+ ATOM_FIRMWARE_CAP_DYNAMIC_BOOT_CFG_ENABLE = 0x0020000,
};
enum atom_cooling_solution_id{
@@ -584,7 +590,7 @@ struct atom_firmware_info_v3_4 {
uint8_t board_i2c_feature_id; // enum of atom_board_i2c_feature_id_def
uint8_t board_i2c_feature_gpio_id; // i2c id find in gpio_lut data table gpio_id
uint8_t board_i2c_feature_slave_addr;
- uint8_t reserved3;
+ uint8_t ras_rom_i2c_slave_addr;
uint16_t bootup_mvddq_mv;
uint16_t bootup_mvpp_mv;
uint32_t zfbstartaddrin16mb;
@@ -877,7 +883,8 @@ struct atom_bracket_layout_record
};
enum atom_display_device_tag_def{
- ATOM_DISPLAY_LCD1_SUPPORT = 0x0002, //an embedded display is either an LVDS or eDP signal type of display
+ ATOM_DISPLAY_LCD1_SUPPORT = 0x0002, //an embedded display is either an LVDS or eDP signal type of display
+ ATOM_DISPLAY_LCD2_SUPPORT = 0x0020, //second edp device tag 0x0020 for backward compability
ATOM_DISPLAY_DFP1_SUPPORT = 0x0008,
ATOM_DISPLAY_DFP2_SUPPORT = 0x0080,
ATOM_DISPLAY_DFP3_SUPPORT = 0x0200,
@@ -1407,6 +1414,59 @@ struct atom_integrated_system_info_v2_1
};
+struct atom_n6_display_phy_tuning_set {
+ uint8_t display_signal_type;
+ uint8_t phy_sel;
+ uint8_t preset_level;
+ uint8_t reserved1;
+ uint32_t reserved2;
+ uint32_t speed_upto;
+ uint8_t tx_vboost_level;
+ uint8_t tx_vreg_v2i;
+ uint8_t tx_vregdrv_byp;
+ uint8_t tx_term_cntl;
+ uint8_t tx_peak_level;
+ uint8_t tx_slew_en;
+ uint8_t tx_eq_pre;
+ uint8_t tx_eq_main;
+ uint8_t tx_eq_post;
+ uint8_t tx_en_inv_pre;
+ uint8_t tx_en_inv_post;
+ uint8_t reserved3;
+ uint32_t reserved4;
+ uint32_t reserved5;
+ uint32_t reserved6;
+};
+
+struct atom_display_phy_tuning_info {
+ struct atom_common_table_header table_header;
+ struct atom_n6_display_phy_tuning_set disp_phy_tuning[1];
+};
+
+struct atom_integrated_system_info_v2_2
+{
+ struct atom_common_table_header table_header;
+ uint32_t vbios_misc; //enum of atom_system_vbiosmisc_def
+ uint32_t gpucapinfo; //enum of atom_system_gpucapinf_def
+ uint32_t system_config;
+ uint32_t cpucapinfo;
+ uint16_t gpuclk_ss_percentage; //unit of 0.001%, 1000 mean 1%
+ uint16_t gpuclk_ss_type;
+ uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
+ uint8_t memorytype; // enum of atom_dmi_t17_mem_type_def, APU memory type indication.
+ uint8_t umachannelnumber; // number of memory channels
+ uint8_t htc_hyst_limit;
+ uint8_t htc_tmp_limit;
+ uint8_t reserved1;
+ uint8_t reserved2;
+ struct edp_info_table edp1_info;
+ struct edp_info_table edp2_info;
+ uint32_t reserved3[8];
+ struct atom_external_display_connection_info extdispconninfo;
+
+ uint32_t reserved4[189];
+};
+
// system_config
enum atom_system_vbiosmisc_def{
INTEGRATED_SYSTEM_INFO__GET_EDID_CALLBACK_FUNC_SUPPORT = 0x01,